Lines Matching +full:adc +full:- +full:joystick
1 // SPDX-License-Identifier: GPL-2.0-or-later
29 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
119 #define BA0_DMR_SIZE20 (1<<20) /* Sample is 20-bit */
123 #define BA0_DMR_SIZE8 (1<<16) /* Sample is 8-bit */
129 #define BA0_DMR_AUTO (1<<4) /* Auto-Initialize */
214 #define BA0_SLT12O 0x041c /* Slot 12 GPIO Output Register for AC-Link */
218 #define BA0_SERMC_ODSEN2 (1<<25) /* On-Demand Support Enable ASDIN2 */
219 #define BA0_SERMC_ODSEN1 (1<<24) /* On-Demand Support Enable ASDIN1 */
240 #define BA0_SLT12M 0x045c /* Slot 12 Monitor Register for Primary AC-Link */
254 #define BA0_ACOSV_SLV(x) (1<<((x)-3))
260 #define BA0_ACISV_SLV(x) (1<<((x)-3))
264 #define BA0_JSPT 0x0480 /* Joystick poll/trigger */
265 #define BA0_JSCTL 0x0484 /* Joystick control */
266 #define BA0_JSC1 0x0488 /* Joystick control */
267 #define BA0_JSC2 0x048c /* Joystick control */
281 #define BA0_MIDSR_RDA (1<<15) /* Sticky bit (RBE 1->0) */
282 #define BA0_MIDSR_TBE (1<<14) /* Sticky bit (TBF 0->1) */
289 #define BA0_AODSD1 0x04a8 /* AC'97 On-Demand Slot Disable for primary link (ro) */
290 #define BA0_AODSD1_NDS(x) (1<<((x)-3))
292 #define BA0_AODSD2 0x04ac /* AC'97 On-Demand Slot Disable for secondary link (ro) */
293 #define BA0_AODSD2_NDS(x) (1<<((x)-3))
296 #define BA0_SLT12M2 0x04dc /* Slot 12 Monitor Register 2 for secondary AC-link */
311 #define BA0_SSPM_JSEN (1<<3) /* Joystick Enable */
312 #define BA0_SSPM_ACLEN (1<<2) /* Serial Port Engine and AC-Link Enable */
315 #define BA0_DACSR 0x0744 /* DAC Sample Rate - Playback SRC */
316 #define BA0_ADCSR 0x0748 /* ADC Sample Rate - Capture SRC */
337 /* Source Slot Numbers - Playback */
350 /* Source Slot Numbers - Capture */
364 /* Source Slot Numbers - Others */
371 /* joystick bits */
501 writel(val, chip->ba0 + offset); in snd_cs4281_pokeBA0()
506 return readl(chip->ba0 + offset); in snd_cs4281_peekBA0()
519 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_write()
528 * set DCV - will clear when process completed in snd_cs4281_ac97_write()
529 * reset CRW - Write command in snd_cs4281_ac97_write()
530 * set VFRM - valid frame enabled in snd_cs4281_ac97_write()
531 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_write()
532 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_write()
537 BA0_ACCTL_ESYN | (ac97->num ? BA0_ACCTL_TC : 0)); in snd_cs4281_ac97_write()
551 dev_err(chip->card->dev, in snd_cs4281_ac97_write()
558 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_read()
563 volatile int ac97_num = ((volatile struct snd_ac97 *)ac97)->num; in snd_cs4281_ac97_read()
582 * set DCV - will clear when process completed in snd_cs4281_ac97_read()
583 * set CRW - Read command in snd_cs4281_ac97_read()
584 * set VFRM - valid frame enabled in snd_cs4281_ac97_read()
585 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_read()
586 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_read()
612 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
625 * VSTS - Valid Status in snd_cs4281_ac97_read()
632 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
654 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_trigger()
657 spin_lock(&chip->reg_lock); in snd_cs4281_trigger()
660 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
661 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
664 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
665 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
669 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR & ~BA0_DMR_DMA); in snd_cs4281_trigger()
670 dma->valDMR |= BA0_DMR_DMA; in snd_cs4281_trigger()
671 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
672 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
676 dma->valDMR &= ~(BA0_DMR_DMA|BA0_DMR_POLL); in snd_cs4281_trigger()
677 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
678 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
680 if (dma->regFCR != BA0_FCR0) in snd_cs4281_trigger()
681 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
684 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
685 return -EINVAL; in snd_cs4281_trigger()
687 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR); in snd_cs4281_trigger()
688 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR); in snd_cs4281_trigger()
689 snd_cs4281_pokeBA0(chip, dma->regDCR, dma->valDCR); in snd_cs4281_trigger()
690 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
723 dma->valDMR = BA0_DMR_TYPE_SINGLE | BA0_DMR_AUTO | in snd_cs4281_mode()
725 if (runtime->channels == 1) in snd_cs4281_mode()
726 dma->valDMR |= BA0_DMR_MONO; in snd_cs4281_mode()
727 if (snd_pcm_format_unsigned(runtime->format) > 0) in snd_cs4281_mode()
728 dma->valDMR |= BA0_DMR_USIGN; in snd_cs4281_mode()
729 if (snd_pcm_format_big_endian(runtime->format) > 0) in snd_cs4281_mode()
730 dma->valDMR |= BA0_DMR_BEND; in snd_cs4281_mode()
731 switch (snd_pcm_format_width(runtime->format)) { in snd_cs4281_mode()
732 case 8: dma->valDMR |= BA0_DMR_SIZE8; in snd_cs4281_mode()
733 if (runtime->channels == 1) in snd_cs4281_mode()
734 dma->valDMR |= BA0_DMR_SWAPC; in snd_cs4281_mode()
736 case 32: dma->valDMR |= BA0_DMR_SIZE20; break; in snd_cs4281_mode()
738 dma->frag = 0; /* for workaround */ in snd_cs4281_mode()
739 dma->valDCR = BA0_DCR_TCIE | BA0_DCR_MSK; in snd_cs4281_mode()
740 if (runtime->buffer_size != runtime->period_size) in snd_cs4281_mode()
741 dma->valDCR |= BA0_DCR_HTCIE; in snd_cs4281_mode()
743 snd_cs4281_pokeBA0(chip, dma->regDBA, runtime->dma_addr); in snd_cs4281_mode()
744 snd_cs4281_pokeBA0(chip, dma->regDBC, runtime->buffer_size - 1); in snd_cs4281_mode()
745 rec_mono = (chip->dma[1].valDMR & BA0_DMR_MONO) == BA0_DMR_MONO; in snd_cs4281_mode()
746 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_mode()
747 (chip->src_right_play_slot << 8) | in snd_cs4281_mode()
748 (chip->src_left_rec_slot << 16) | in snd_cs4281_mode()
749 ((rec_mono ? 31 : chip->src_right_rec_slot) << 24)); in snd_cs4281_mode()
753 if (dma->left_slot == chip->src_left_play_slot) { in snd_cs4281_mode()
754 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
755 snd_BUG_ON(dma->right_slot != chip->src_right_play_slot); in snd_cs4281_mode()
759 if (dma->left_slot == chip->src_left_rec_slot) { in snd_cs4281_mode()
760 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
761 snd_BUG_ON(dma->right_slot != chip->src_right_rec_slot); in snd_cs4281_mode()
767 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
768 snd_cs4281_pokeBA0(chip, dma->regFCR, snd_cs4281_peekBA0(chip, dma->regFCR) & ~BA0_FCR_FEN); in snd_cs4281_mode()
770 dma->valFCR = BA0_FCR_LS(dma->left_slot) | in snd_cs4281_mode()
771 BA0_FCR_RS(capture && (dma->valDMR & BA0_DMR_MONO) ? 31 : dma->right_slot) | in snd_cs4281_mode()
773 BA0_FCR_OF(dma->fifo_offset); in snd_cs4281_mode()
774 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | (capture ? BA0_FCR_PSH : 0)); in snd_cs4281_mode()
776 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
777 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | BA0_FCR_FEN); in snd_cs4281_mode()
779 snd_cs4281_pokeBA0(chip, dma->regFSIC, 0); in snd_cs4281_mode()
784 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_prepare()
785 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_playback_prepare()
788 spin_lock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
790 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
796 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_prepare()
797 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_capture_prepare()
800 spin_lock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
802 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
808 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_pointer()
809 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_pointer()
813 dev_dbg(chip->card->dev, in snd_cs4281_pointer()
815 snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size, in snd_cs4281_pointer()
818 return runtime->buffer_size - in snd_cs4281_pointer()
819 snd_cs4281_peekBA0(chip, dma->regDCC) - 1; in snd_cs4281_pointer()
875 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_open()
878 dma = &chip->dma[0]; in snd_cs4281_playback_open()
879 dma->substream = substream; in snd_cs4281_playback_open()
880 dma->left_slot = 0; in snd_cs4281_playback_open()
881 dma->right_slot = 1; in snd_cs4281_playback_open()
882 runtime->private_data = dma; in snd_cs4281_playback_open()
883 runtime->hw = snd_cs4281_playback; in snd_cs4281_playback_open()
885 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_playback_open()
886 samples are 20-bit */ in snd_cs4281_playback_open()
894 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_open()
897 dma = &chip->dma[1]; in snd_cs4281_capture_open()
898 dma->substream = substream; in snd_cs4281_capture_open()
899 dma->left_slot = 10; in snd_cs4281_capture_open()
900 dma->right_slot = 11; in snd_cs4281_capture_open()
901 runtime->private_data = dma; in snd_cs4281_capture_open()
902 runtime->hw = snd_cs4281_capture; in snd_cs4281_capture_open()
904 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_capture_open()
905 samples are 20-bit */ in snd_cs4281_capture_open()
912 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_playback_close()
914 dma->substream = NULL; in snd_cs4281_playback_close()
920 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_capture_close()
922 dma->substream = NULL; in snd_cs4281_capture_close()
947 err = snd_pcm_new(chip->card, "CS4281", device, 1, 1, &pcm); in snd_cs4281_pcm()
954 pcm->private_data = chip; in snd_cs4281_pcm()
955 pcm->info_flags = 0; in snd_cs4281_pcm()
956 strcpy(pcm->name, "CS4281"); in snd_cs4281_pcm()
957 chip->pcm = pcm; in snd_cs4281_pcm()
959 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev, in snd_cs4281_pcm()
974 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in snd_cs4281_info_volume()
975 uinfo->count = 2; in snd_cs4281_info_volume()
976 uinfo->value.integer.min = 0; in snd_cs4281_info_volume()
977 uinfo->value.integer.max = CS_VOL_MASK; in snd_cs4281_info_volume()
985 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_get_volume()
986 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_get_volume()
989 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_get_volume()
990 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_get_volume()
992 ucontrol->value.integer.value[0] = volL; in snd_cs4281_get_volume()
993 ucontrol->value.integer.value[1] = volR; in snd_cs4281_get_volume()
1002 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_put_volume()
1003 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_put_volume()
1006 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_put_volume()
1007 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_put_volume()
1009 if (ucontrol->value.integer.value[0] != volL) { in snd_cs4281_put_volume()
1010 volL = CS_VOL_MASK - (ucontrol->value.integer.value[0] & CS_VOL_MASK); in snd_cs4281_put_volume()
1014 if (ucontrol->value.integer.value[1] != volR) { in snd_cs4281_put_volume()
1015 volR = CS_VOL_MASK - (ucontrol->value.integer.value[1] & CS_VOL_MASK); in snd_cs4281_put_volume()
1022 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -4650, 150, 0);
1048 struct cs4281 *chip = bus->private_data; in snd_cs4281_mixer_free_ac97_bus()
1049 chip->ac97_bus = NULL; in snd_cs4281_mixer_free_ac97_bus()
1054 struct cs4281 *chip = ac97->private_data; in snd_cs4281_mixer_free_ac97()
1055 if (ac97->num) in snd_cs4281_mixer_free_ac97()
1056 chip->ac97_secondary = NULL; in snd_cs4281_mixer_free_ac97()
1058 chip->ac97 = NULL; in snd_cs4281_mixer_free_ac97()
1063 struct snd_card *card = chip->card; in snd_cs4281_mixer()
1071 err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); in snd_cs4281_mixer()
1074 chip->ac97_bus->private_free = snd_cs4281_mixer_free_ac97_bus; in snd_cs4281_mixer()
1079 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); in snd_cs4281_mixer()
1082 if (chip->dual_codec) { in snd_cs4281_mixer()
1084 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_secondary); in snd_cs4281_mixer()
1105 struct cs4281 *chip = entry->private_data; in snd_cs4281_proc_read()
1108 snd_iprintf(buffer, "Spurious half IRQs : %u\n", chip->spurious_dhtc_irq); in snd_cs4281_proc_read()
1109 snd_iprintf(buffer, "Spurious end IRQs : %u\n", chip->spurious_dtc_irq); in snd_cs4281_proc_read()
1117 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA0_read()
1119 if (copy_to_user_fromio(buf, chip->ba0 + pos, count)) in snd_cs4281_BA0_read()
1120 return -EFAULT; in snd_cs4281_BA0_read()
1129 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA1_read()
1131 if (copy_to_user_fromio(buf, chip->ba1 + pos, count)) in snd_cs4281_BA1_read()
1132 return -EFAULT; in snd_cs4281_BA1_read()
1148 snd_card_ro_proc_new(chip->card, "cs4281", chip, snd_cs4281_proc_read); in snd_cs4281_proc_init()
1149 if (! snd_card_proc_new(chip->card, "cs4281_BA0", &entry)) { in snd_cs4281_proc_init()
1150 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1151 entry->private_data = chip; in snd_cs4281_proc_init()
1152 entry->c.ops = &snd_cs4281_proc_ops_BA0; in snd_cs4281_proc_init()
1153 entry->size = CS4281_BA0_SIZE; in snd_cs4281_proc_init()
1155 if (! snd_card_proc_new(chip->card, "cs4281_BA1", &entry)) { in snd_cs4281_proc_init()
1156 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1157 entry->private_data = chip; in snd_cs4281_proc_init()
1158 entry->c.ops = &snd_cs4281_proc_ops_BA1; in snd_cs4281_proc_init()
1159 entry->size = CS4281_BA1_SIZE; in snd_cs4281_proc_init()
1164 * joystick support
1209 if (axes[jst] == 0xFFFF) axes[jst] = -1; in snd_cs4281_gameport_cooked_read()
1226 return -1; in snd_cs4281_gameport_open()
1235 chip->gameport = gp = gameport_allocate_port(); in snd_cs4281_create_gameport()
1237 dev_err(chip->card->dev, in snd_cs4281_create_gameport()
1239 return -ENOMEM; in snd_cs4281_create_gameport()
1243 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); in snd_cs4281_create_gameport()
1244 gameport_set_dev_parent(gp, &chip->pci->dev); in snd_cs4281_create_gameport()
1245 gp->open = snd_cs4281_gameport_open; in snd_cs4281_create_gameport()
1246 gp->read = snd_cs4281_gameport_read; in snd_cs4281_create_gameport()
1247 gp->trigger = snd_cs4281_gameport_trigger; in snd_cs4281_create_gameport()
1248 gp->cooked_read = snd_cs4281_gameport_cooked_read; in snd_cs4281_create_gameport()
1261 if (chip->gameport) { in snd_cs4281_free_gameport()
1262 gameport_unregister_port(chip->gameport); in snd_cs4281_free_gameport()
1263 chip->gameport = NULL; in snd_cs4281_free_gameport()
1267 static inline int snd_cs4281_create_gameport(struct cs4281 *chip) { return -ENOSYS; } in snd_cs4281_create_gameport()
1273 struct cs4281 *chip = card->private_data; in snd_cs4281_free()
1281 /* Sound System Power Management - Turn Everything OFF */ in snd_cs4281_free()
1291 struct cs4281 *chip = card->private_data; in snd_cs4281_create()
1297 spin_lock_init(&chip->reg_lock); in snd_cs4281_create()
1298 chip->card = card; in snd_cs4281_create()
1299 chip->pci = pci; in snd_cs4281_create()
1300 chip->irq = -1; in snd_cs4281_create()
1303 dev_err(card->dev, "invalid dual_codec option %d\n", dual_codec); in snd_cs4281_create()
1306 chip->dual_codec = dual_codec; in snd_cs4281_create()
1311 chip->ba0_addr = pci_resource_start(pci, 0); in snd_cs4281_create()
1312 chip->ba1_addr = pci_resource_start(pci, 1); in snd_cs4281_create()
1314 chip->ba0 = pcim_iomap_table(pci)[0]; in snd_cs4281_create()
1315 chip->ba1 = pcim_iomap_table(pci)[1]; in snd_cs4281_create()
1317 if (devm_request_irq(&pci->dev, pci->irq, snd_cs4281_interrupt, in snd_cs4281_create()
1319 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); in snd_cs4281_create()
1320 return -ENOMEM; in snd_cs4281_create()
1322 chip->irq = pci->irq; in snd_cs4281_create()
1323 card->sync_irq = chip->irq; in snd_cs4281_create()
1324 card->private_free = snd_cs4281_free; in snd_cs4281_create()
1351 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1353 return -EIO; in snd_cs4281_chip_init()
1358 * to 4281h. Allows vendor-defined configuration in snd_cs4281_chip_init()
1364 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1366 return -EIO; in snd_cs4281_chip_init()
1370 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1372 return -EIO; in snd_cs4281_chip_init()
1402 if (chip->dual_codec) in snd_cs4281_chip_init()
1409 (chip->dual_codec ? BA0_SERMC_TCID(chip->dual_codec) : BA0_SERMC_TCID(1)) | in snd_cs4281_chip_init()
1433 dev_err(chip->card->dev, "DLLRDY not seen\n"); in snd_cs4281_chip_init()
1434 return -EIO; in snd_cs4281_chip_init()
1459 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1462 return -EIO; in snd_cs4281_chip_init()
1465 if (chip->dual_codec) { in snd_cs4281_chip_init()
1472 dev_info(chip->card->dev, in snd_cs4281_chip_init()
1474 chip->dual_codec = 0; in snd_cs4281_chip_init()
1487 * the codec is pumping ADC data across the AC-link. in snd_cs4281_chip_init()
1501 if (--retry_count > 0) in snd_cs4281_chip_init()
1503 dev_err(chip->card->dev, "never read ISV3 and ISV4 from AC'97\n"); in snd_cs4281_chip_init()
1504 return -EIO; in snd_cs4281_chip_init()
1518 struct cs4281_dma *dma = &chip->dma[tmp]; in snd_cs4281_chip_init()
1519 dma->regDBA = BA0_DBA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1520 dma->regDCA = BA0_DCA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1521 dma->regDBC = BA0_DBC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1522 dma->regDCC = BA0_DCC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1523 dma->regDMR = BA0_DMR0 + (tmp * 8); in snd_cs4281_chip_init()
1524 dma->regDCR = BA0_DCR0 + (tmp * 8); in snd_cs4281_chip_init()
1525 dma->regHDSR = BA0_HDSR0 + (tmp * 4); in snd_cs4281_chip_init()
1526 dma->regFCR = BA0_FCR0 + (tmp * 4); in snd_cs4281_chip_init()
1527 dma->regFSIC = BA0_FSIC0 + (tmp * 4); in snd_cs4281_chip_init()
1528 dma->fifo_offset = tmp * CS4281_FIFO_SIZE; in snd_cs4281_chip_init()
1529 snd_cs4281_pokeBA0(chip, dma->regFCR, in snd_cs4281_chip_init()
1533 BA0_FCR_OF(dma->fifo_offset)); in snd_cs4281_chip_init()
1536 chip->src_left_play_slot = 0; /* AC'97 left PCM playback (3) */ in snd_cs4281_chip_init()
1537 chip->src_right_play_slot = 1; /* AC'97 right PCM playback (4) */ in snd_cs4281_chip_init()
1538 chip->src_left_rec_slot = 10; /* AC'97 left PCM record (3) */ in snd_cs4281_chip_init()
1539 chip->src_right_rec_slot = 11; /* AC'97 right PCM record (4) */ in snd_cs4281_chip_init()
1542 chip->dma[0].valFCR = BA0_FCR_FEN | BA0_FCR_LS(0) | in snd_cs4281_chip_init()
1545 BA0_FCR_OF(chip->dma[0].fifo_offset); in snd_cs4281_chip_init()
1546 snd_cs4281_pokeBA0(chip, chip->dma[0].regFCR, chip->dma[0].valFCR); in snd_cs4281_chip_init()
1547 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_chip_init()
1548 (chip->src_right_play_slot << 8) | in snd_cs4281_chip_init()
1549 (chip->src_left_rec_slot << 16) | in snd_cs4281_chip_init()
1550 (chip->src_right_rec_slot << 24)); in snd_cs4281_chip_init()
1576 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1578 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1583 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_open()
1585 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1586 chip->midcr |= BA0_MIDCR_RXE; in snd_cs4281_midi_input_open()
1587 chip->midi_input = substream; in snd_cs4281_midi_input_open()
1588 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_open()
1591 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1593 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1599 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_close()
1601 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1602 chip->midcr &= ~(BA0_MIDCR_RXE | BA0_MIDCR_RIE); in snd_cs4281_midi_input_close()
1603 chip->midi_input = NULL; in snd_cs4281_midi_input_close()
1604 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_close()
1607 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1609 chip->uartm &= ~CS4281_MODE_INPUT; in snd_cs4281_midi_input_close()
1610 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1616 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_open()
1618 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1619 chip->uartm |= CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_open()
1620 chip->midcr |= BA0_MIDCR_TXE; in snd_cs4281_midi_output_open()
1621 chip->midi_output = substream; in snd_cs4281_midi_output_open()
1622 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_open()
1625 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1627 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1633 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_close()
1635 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1636 chip->midcr &= ~(BA0_MIDCR_TXE | BA0_MIDCR_TIE); in snd_cs4281_midi_output_close()
1637 chip->midi_output = NULL; in snd_cs4281_midi_output_close()
1638 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_close()
1641 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1643 chip->uartm &= ~CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_close()
1644 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1651 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_trigger()
1653 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1655 if ((chip->midcr & BA0_MIDCR_RIE) == 0) { in snd_cs4281_midi_input_trigger()
1656 chip->midcr |= BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1657 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1660 if (chip->midcr & BA0_MIDCR_RIE) { in snd_cs4281_midi_input_trigger()
1661 chip->midcr &= ~BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1662 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1665 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1671 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_trigger()
1674 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1676 if ((chip->midcr & BA0_MIDCR_TIE) == 0) { in snd_cs4281_midi_output_trigger()
1677 chip->midcr |= BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1679 while ((chip->midcr & BA0_MIDCR_TIE) && in snd_cs4281_midi_output_trigger()
1682 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1687 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1690 if (chip->midcr & BA0_MIDCR_TIE) { in snd_cs4281_midi_output_trigger()
1691 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1692 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1695 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1717 err = snd_rawmidi_new(chip->card, "CS4281", device, 1, 1, &rmidi); in snd_cs4281_midi()
1720 strcpy(rmidi->name, "CS4281"); in snd_cs4281_midi()
1723 …rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUP… in snd_cs4281_midi()
1724 rmidi->private_data = chip; in snd_cs4281_midi()
1725 chip->rmidi = rmidi; in snd_cs4281_midi()
1750 cdma = &chip->dma[dma]; in snd_cs4281_interrupt()
1751 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1753 val = snd_cs4281_peekBA0(chip, cdma->regHDSR); in snd_cs4281_interrupt()
1756 cdma->frag++; in snd_cs4281_interrupt()
1757 if ((val & BA0_HDSR_DHTC) && !(cdma->frag & 1)) { in snd_cs4281_interrupt()
1758 cdma->frag--; in snd_cs4281_interrupt()
1759 chip->spurious_dhtc_irq++; in snd_cs4281_interrupt()
1760 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1763 if ((val & BA0_HDSR_DTC) && (cdma->frag & 1)) { in snd_cs4281_interrupt()
1764 cdma->frag--; in snd_cs4281_interrupt()
1765 chip->spurious_dtc_irq++; in snd_cs4281_interrupt()
1766 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1769 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1770 snd_pcm_period_elapsed(cdma->substream); in snd_cs4281_interrupt()
1774 if ((status & BA0_HISR_MIDI) && chip->rmidi) { in snd_cs4281_interrupt()
1777 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1780 if ((chip->midcr & BA0_MIDCR_RIE) == 0) in snd_cs4281_interrupt()
1782 snd_rawmidi_receive(chip->midi_input, &c, 1); in snd_cs4281_interrupt()
1785 if ((chip->midcr & BA0_MIDCR_TIE) == 0) in snd_cs4281_interrupt()
1787 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { in snd_cs4281_interrupt()
1788 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_interrupt()
1789 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1794 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1811 struct cs4281 *chip = opl3->private_data; in snd_cs4281_opl3_command()
1815 port = chip->ba0 + BA0_B1AP; /* right port */ in snd_cs4281_opl3_command()
1817 port = chip->ba0 + BA0_B0AP; /* left port */ in snd_cs4281_opl3_command()
1819 spin_lock_irqsave(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1827 spin_unlock_irqrestore(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1840 return -ENODEV; in __snd_cs4281_probe()
1843 return -ENOENT; in __snd_cs4281_probe()
1846 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, in __snd_cs4281_probe()
1850 chip = card->private_data; in __snd_cs4281_probe()
1868 opl3->private_data = chip; in __snd_cs4281_probe()
1869 opl3->command = snd_cs4281_opl3_command; in __snd_cs4281_probe()
1875 strcpy(card->driver, "CS4281"); in __snd_cs4281_probe()
1876 strcpy(card->shortname, "Cirrus Logic CS4281"); in __snd_cs4281_probe()
1877 sprintf(card->longname, "%s at 0x%lx, irq %d", in __snd_cs4281_probe()
1878 card->shortname, in __snd_cs4281_probe()
1879 chip->ba0_addr, in __snd_cs4281_probe()
1880 chip->irq); in __snd_cs4281_probe()
1894 return snd_card_free_on_error(&pci->dev, __snd_cs4281_probe(pci, pci_id)); in snd_cs4281_probe()
1923 struct cs4281 *chip = card->private_data; in cs4281_suspend()
1928 snd_ac97_suspend(chip->ac97); in cs4281_suspend()
1929 snd_ac97_suspend(chip->ac97_secondary); in cs4281_suspend()
1941 chip->suspend_regs[i] = snd_cs4281_peekBA0(chip, saved_regs[i]); in cs4281_suspend()
1946 /* Power off FM, Joystick, AC link, */ in cs4281_suspend()
1964 struct cs4281 *chip = card->private_data; in cs4281_resume()
1977 snd_cs4281_pokeBA0(chip, saved_regs[i], chip->suspend_regs[i]); in cs4281_resume()
1979 snd_ac97_resume(chip->ac97); in cs4281_resume()
1980 snd_ac97_resume(chip->ac97_secondary); in cs4281_resume()