Lines Matching +full:exynos5433 +full:- +full:uart
1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
25 #include <linux/dma-mapping.h>
46 /* UART name and device definitions */
89 /* uart port features */
166 #define portaddr(port, reg) ((port)->membase + (reg))
168 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
172 switch (port->iotype) { in rd_reg()
187 switch (port->iotype) { in wr_reg()
199 /* Byte-order aware bit setting/clearing functions. */
236 return to_platform_device(port->dev)->name; in s3c24xx_serial_portname()
251 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_rx_enable()
253 while (--count && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_rx_enable()
264 ourport->rx_enabled = 1; in s3c24xx_serial_rx_enable()
265 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_rx_enable()
274 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_rx_disable()
280 ourport->rx_enabled = 0; in s3c24xx_serial_rx_disable()
281 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_rx_disable()
287 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_tx()
291 if (!ourport->tx_enabled) in s3c24xx_serial_stop_tx()
294 switch (ourport->info->type) { in s3c24xx_serial_stop_tx()
302 disable_irq_nosync(ourport->tx_irq); in s3c24xx_serial_stop_tx()
306 if (dma && dma->tx_chan && ourport->tx_in_progress == S3C24XX_TX_DMA) { in s3c24xx_serial_stop_tx()
307 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_tx()
308 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_stop_tx()
309 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_stop_tx()
310 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_stop_tx()
311 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_stop_tx()
313 async_tx_ack(dma->tx_desc); in s3c24xx_serial_stop_tx()
314 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_stop_tx()
318 ourport->tx_enabled = 0; in s3c24xx_serial_stop_tx()
319 ourport->tx_in_progress = 0; in s3c24xx_serial_stop_tx()
321 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_stop_tx()
324 ourport->tx_mode = 0; in s3c24xx_serial_stop_tx()
332 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_dma_complete()
333 struct circ_buf *xmit = &port->state->xmit; in s3c24xx_serial_tx_dma_complete()
334 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_tx_dma_complete()
339 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_tx_dma_complete()
340 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_tx_dma_complete()
341 async_tx_ack(dma->tx_desc); in s3c24xx_serial_tx_dma_complete()
343 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_tx_dma_complete()
344 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_tx_dma_complete()
347 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_tx_dma_complete()
350 ourport->tx_in_progress = 0; in s3c24xx_serial_tx_dma_complete()
356 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_tx_dma_complete()
361 const struct uart_port *port = &ourport->port; in enable_tx_dma()
365 switch (ourport->info->type) { in enable_tx_dma()
373 disable_irq_nosync(ourport->tx_irq); in enable_tx_dma()
384 ourport->tx_mode = S3C24XX_TX_DMA; in enable_tx_dma()
389 const struct uart_port *port = &ourport->port; in enable_tx_pio()
393 ourport->tx_in_progress = S3C24XX_TX_PIO; in enable_tx_pio()
404 switch (ourport->info->type) { in enable_tx_pio()
414 enable_irq(ourport->tx_irq); in enable_tx_pio()
418 ourport->tx_mode = S3C24XX_TX_PIO; in enable_tx_pio()
424 if (ourport->info->type == TYPE_APPLE_S5L) in enable_tx_pio()
430 if (ourport->tx_mode != S3C24XX_TX_PIO) in s3c24xx_serial_start_tx_pio()
437 struct uart_port *port = &ourport->port; in s3c24xx_serial_start_tx_dma()
438 struct circ_buf *xmit = &port->state->xmit; in s3c24xx_serial_start_tx_dma()
439 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_start_tx_dma()
441 if (ourport->tx_mode != S3C24XX_TX_DMA) in s3c24xx_serial_start_tx_dma()
444 dma->tx_size = count & ~(dma_get_cache_alignment() - 1); in s3c24xx_serial_start_tx_dma()
445 dma->tx_transfer_addr = dma->tx_addr + xmit->tail; in s3c24xx_serial_start_tx_dma()
447 dma_sync_single_for_device(dma->tx_chan->device->dev, in s3c24xx_serial_start_tx_dma()
448 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
451 dma->tx_desc = dmaengine_prep_slave_single(dma->tx_chan, in s3c24xx_serial_start_tx_dma()
452 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
454 if (!dma->tx_desc) { in s3c24xx_serial_start_tx_dma()
455 dev_err(ourport->port.dev, "Unable to get desc for Tx\n"); in s3c24xx_serial_start_tx_dma()
456 return -EIO; in s3c24xx_serial_start_tx_dma()
459 dma->tx_desc->callback = s3c24xx_serial_tx_dma_complete; in s3c24xx_serial_start_tx_dma()
460 dma->tx_desc->callback_param = ourport; in s3c24xx_serial_start_tx_dma()
461 dma->tx_bytes_requested = dma->tx_size; in s3c24xx_serial_start_tx_dma()
463 ourport->tx_in_progress = S3C24XX_TX_DMA; in s3c24xx_serial_start_tx_dma()
464 dma->tx_cookie = dmaengine_submit(dma->tx_desc); in s3c24xx_serial_start_tx_dma()
465 dma_async_issue_pending(dma->tx_chan); in s3c24xx_serial_start_tx_dma()
471 struct uart_port *port = &ourport->port; in s3c24xx_serial_start_next_tx()
472 struct circ_buf *xmit = &port->state->xmit; in s3c24xx_serial_start_next_tx()
476 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in s3c24xx_serial_start_next_tx()
483 if (!ourport->dma || !ourport->dma->tx_chan || in s3c24xx_serial_start_next_tx()
484 count < ourport->min_dma_size || in s3c24xx_serial_start_next_tx()
485 xmit->tail & (dma_get_cache_alignment() - 1)) in s3c24xx_serial_start_next_tx()
494 struct circ_buf *xmit = &port->state->xmit; in s3c24xx_serial_start_tx()
496 if (!ourport->tx_enabled) { in s3c24xx_serial_start_tx()
497 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_start_tx()
500 ourport->tx_enabled = 1; in s3c24xx_serial_start_tx()
501 if (!ourport->dma || !ourport->dma->tx_chan) in s3c24xx_serial_start_tx()
505 if (ourport->dma && ourport->dma->tx_chan) { in s3c24xx_serial_start_tx()
506 if (!uart_circ_empty(xmit) && !ourport->tx_in_progress) in s3c24xx_serial_start_tx()
514 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_uart_copy_rx_to_tty()
520 dma_sync_single_for_cpu(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_uart_copy_rx_to_tty()
521 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_uart_copy_rx_to_tty()
523 ourport->port.icount.rx += count; in s3c24xx_uart_copy_rx_to_tty()
525 dev_err(ourport->port.dev, "No tty port\n"); in s3c24xx_uart_copy_rx_to_tty()
529 ((unsigned char *)(ourport->dma->rx_buf)), count); in s3c24xx_uart_copy_rx_to_tty()
532 dev_err(ourport->port.dev, "RxData copy to tty layer failed\n"); in s3c24xx_uart_copy_rx_to_tty()
539 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_rx()
540 struct tty_port *t = &port->state->port; in s3c24xx_serial_stop_rx()
545 if (ourport->rx_enabled) { in s3c24xx_serial_stop_rx()
546 dev_dbg(port->dev, "stopping rx\n"); in s3c24xx_serial_stop_rx()
547 switch (ourport->info->type) { in s3c24xx_serial_stop_rx()
557 disable_irq_nosync(ourport->rx_irq); in s3c24xx_serial_stop_rx()
560 ourport->rx_enabled = 0; in s3c24xx_serial_stop_rx()
562 if (dma && dma->rx_chan) { in s3c24xx_serial_stop_rx()
563 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_rx()
564 dma_status = dmaengine_tx_status(dma->rx_chan, in s3c24xx_serial_stop_rx()
565 dma->rx_cookie, &state); in s3c24xx_serial_stop_rx()
568 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_stop_rx()
569 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_stop_rx()
578 return to_ourport(port)->info; in s3c24xx_port_to_info()
586 if (port->dev == NULL) in s3c24xx_port_to_cfg()
590 return ourport->cfg; in s3c24xx_port_to_cfg()
596 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_rx_fifocnt()
598 if (ufstat & info->rx_fifofull) in s3c24xx_serial_rx_fifocnt()
599 return ourport->port.fifosize; in s3c24xx_serial_rx_fifocnt()
601 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; in s3c24xx_serial_rx_fifocnt()
608 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_dma_complete()
610 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_dma_complete()
611 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_dma_complete()
612 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_dma_complete()
618 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_dma_complete()
619 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_dma_complete()
620 async_tx_ack(dma->rx_desc); in s3c24xx_serial_rx_dma_complete()
622 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_rx_dma_complete()
634 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_rx_dma_complete()
639 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c64xx_start_rx_dma()
641 dma_sync_single_for_device(dma->rx_chan->device->dev, dma->rx_addr, in s3c64xx_start_rx_dma()
642 dma->rx_size, DMA_FROM_DEVICE); in s3c64xx_start_rx_dma()
644 dma->rx_desc = dmaengine_prep_slave_single(dma->rx_chan, in s3c64xx_start_rx_dma()
645 dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, in s3c64xx_start_rx_dma()
647 if (!dma->rx_desc) { in s3c64xx_start_rx_dma()
648 dev_err(ourport->port.dev, "Unable to get desc for Rx\n"); in s3c64xx_start_rx_dma()
652 dma->rx_desc->callback = s3c24xx_serial_rx_dma_complete; in s3c64xx_start_rx_dma()
653 dma->rx_desc->callback_param = ourport; in s3c64xx_start_rx_dma()
654 dma->rx_bytes_requested = dma->rx_size; in s3c64xx_start_rx_dma()
656 dma->rx_cookie = dmaengine_submit(dma->rx_desc); in s3c64xx_start_rx_dma()
657 dma_async_issue_pending(dma->rx_chan); in s3c64xx_start_rx_dma()
660 /* ? - where has parity gone?? */
665 struct uart_port *port = &ourport->port; in enable_rx_dma()
683 ourport->rx_mode = S3C24XX_RX_DMA; in enable_rx_dma()
688 struct uart_port *port = &ourport->port; in enable_rx_pio()
697 if (ourport->info->type != TYPE_APPLE_S5L) { in enable_rx_pio()
707 ourport->rx_mode = S3C24XX_RX_PIO; in enable_rx_pio()
716 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_dma()
717 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_chars_dma()
718 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_chars_dma()
719 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_chars_dma()
725 spin_lock(&port->lock); in s3c24xx_serial_rx_chars_dma()
729 if (ourport->rx_mode == S3C24XX_RX_PIO) in s3c24xx_serial_rx_chars_dma()
734 if (ourport->rx_mode == S3C24XX_RX_DMA) { in s3c24xx_serial_rx_chars_dma()
735 dmaengine_pause(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
736 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_chars_dma()
737 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
738 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_chars_dma()
754 spin_unlock(&port->lock); in s3c24xx_serial_rx_chars_dma()
761 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_drain_fifo()
764 int max_count = port->fifosize; in s3c24xx_serial_rx_drain_fifo()
767 while (max_count-- > 0) { in s3c24xx_serial_rx_drain_fifo()
778 fifocnt--; in s3c24xx_serial_rx_drain_fifo()
783 if (port->flags & UPF_CONS_FLOW) { in s3c24xx_serial_rx_drain_fifo()
786 if (ourport->rx_enabled) { in s3c24xx_serial_rx_drain_fifo()
788 ourport->rx_enabled = 0; in s3c24xx_serial_rx_drain_fifo()
796 ourport->rx_enabled = 1; in s3c24xx_serial_rx_drain_fifo()
806 port->icount.rx++; in s3c24xx_serial_rx_drain_fifo()
809 dev_dbg(port->dev, in s3c24xx_serial_rx_drain_fifo()
815 dev_dbg(port->dev, "break!\n"); in s3c24xx_serial_rx_drain_fifo()
816 port->icount.brk++; in s3c24xx_serial_rx_drain_fifo()
822 port->icount.frame++; in s3c24xx_serial_rx_drain_fifo()
824 port->icount.overrun++; in s3c24xx_serial_rx_drain_fifo()
826 uerstat &= port->read_status_mask; in s3c24xx_serial_rx_drain_fifo()
844 tty_flip_buffer_push(&port->state->port); in s3c24xx_serial_rx_drain_fifo()
850 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_pio()
852 spin_lock(&port->lock); in s3c24xx_serial_rx_chars_pio()
854 spin_unlock(&port->lock); in s3c24xx_serial_rx_chars_pio()
863 if (ourport->dma && ourport->dma->rx_chan) in s3c24xx_serial_rx_irq()
870 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_chars()
871 struct circ_buf *xmit = &port->state->xmit; in s3c24xx_serial_tx_chars()
874 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in s3c24xx_serial_tx_chars()
876 if (ourport->dma && ourport->dma->tx_chan && in s3c24xx_serial_tx_chars()
877 count >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
878 int align = dma_get_cache_alignment() - in s3c24xx_serial_tx_chars()
879 (xmit->tail & (dma_get_cache_alignment() - 1)); in s3c24xx_serial_tx_chars()
880 if (count - align >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
881 dma_count = count - align; in s3c24xx_serial_tx_chars()
886 if (port->x_char) { in s3c24xx_serial_tx_chars()
887 wr_reg(port, S3C2410_UTXH, port->x_char); in s3c24xx_serial_tx_chars()
888 port->icount.tx++; in s3c24xx_serial_tx_chars()
889 port->x_char = 0; in s3c24xx_serial_tx_chars()
893 /* if there isn't anything more to transmit, or the uart is now in s3c24xx_serial_tx_chars()
894 * stopped, disable the uart and exit in s3c24xx_serial_tx_chars()
904 if (count > port->fifosize) { in s3c24xx_serial_tx_chars()
905 count = port->fifosize; in s3c24xx_serial_tx_chars()
910 if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) in s3c24xx_serial_tx_chars()
913 wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); in s3c24xx_serial_tx_chars()
915 count--; in s3c24xx_serial_tx_chars()
933 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_irq()
935 spin_lock(&port->lock); in s3c24xx_serial_tx_irq()
939 spin_unlock(&port->lock); in s3c24xx_serial_tx_irq()
947 const struct uart_port *port = &ourport->port; in s3c64xx_serial_handle_irq()
966 const struct uart_port *port = &ourport->port; in apple_serial_handle_irq()
990 if ((ufstat & info->tx_fifomask) != 0 || in s3c24xx_serial_tx_empty()
991 (ufstat & info->tx_fifofull)) in s3c24xx_serial_tx_empty()
1035 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_break_ctl()
1046 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_break_ctl()
1051 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_request_dma()
1057 dma->rx_conf.direction = DMA_DEV_TO_MEM; in s3c24xx_serial_request_dma()
1058 dma->rx_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1059 dma->rx_conf.src_addr = p->port.mapbase + S3C2410_URXH; in s3c24xx_serial_request_dma()
1060 dma->rx_conf.src_maxburst = 1; in s3c24xx_serial_request_dma()
1062 dma->tx_conf.direction = DMA_MEM_TO_DEV; in s3c24xx_serial_request_dma()
1063 dma->tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1064 dma->tx_conf.dst_addr = p->port.mapbase + S3C2410_UTXH; in s3c24xx_serial_request_dma()
1065 dma->tx_conf.dst_maxburst = 1; in s3c24xx_serial_request_dma()
1067 dma->rx_chan = dma_request_chan(p->port.dev, "rx"); in s3c24xx_serial_request_dma()
1069 if (IS_ERR(dma->rx_chan)) { in s3c24xx_serial_request_dma()
1071 ret = PTR_ERR(dma->rx_chan); in s3c24xx_serial_request_dma()
1075 ret = dma_get_slave_caps(dma->rx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1079 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1083 dmaengine_slave_config(dma->rx_chan, &dma->rx_conf); in s3c24xx_serial_request_dma()
1085 dma->tx_chan = dma_request_chan(p->port.dev, "tx"); in s3c24xx_serial_request_dma()
1086 if (IS_ERR(dma->tx_chan)) { in s3c24xx_serial_request_dma()
1088 ret = PTR_ERR(dma->tx_chan); in s3c24xx_serial_request_dma()
1092 ret = dma_get_slave_caps(dma->tx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1096 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1100 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf); in s3c24xx_serial_request_dma()
1103 dma->rx_size = PAGE_SIZE; in s3c24xx_serial_request_dma()
1105 dma->rx_buf = kmalloc(dma->rx_size, GFP_KERNEL); in s3c24xx_serial_request_dma()
1106 if (!dma->rx_buf) { in s3c24xx_serial_request_dma()
1107 ret = -ENOMEM; in s3c24xx_serial_request_dma()
1111 dma->rx_addr = dma_map_single(dma->rx_chan->device->dev, dma->rx_buf, in s3c24xx_serial_request_dma()
1112 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1113 if (dma_mapping_error(dma->rx_chan->device->dev, dma->rx_addr)) { in s3c24xx_serial_request_dma()
1115 ret = -EIO; in s3c24xx_serial_request_dma()
1120 dma->tx_addr = dma_map_single(dma->tx_chan->device->dev, in s3c24xx_serial_request_dma()
1121 p->port.state->xmit.buf, UART_XMIT_SIZE, in s3c24xx_serial_request_dma()
1123 if (dma_mapping_error(dma->tx_chan->device->dev, dma->tx_addr)) { in s3c24xx_serial_request_dma()
1125 ret = -EIO; in s3c24xx_serial_request_dma()
1132 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_request_dma()
1133 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1135 kfree(dma->rx_buf); in s3c24xx_serial_request_dma()
1137 dma_release_channel(dma->tx_chan); in s3c24xx_serial_request_dma()
1139 dma_release_channel(dma->rx_chan); in s3c24xx_serial_request_dma()
1142 dev_warn(p->port.dev, "%s, DMA will not be used\n", reason); in s3c24xx_serial_request_dma()
1148 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_release_dma()
1150 if (dma->rx_chan) { in s3c24xx_serial_release_dma()
1151 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_release_dma()
1152 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_release_dma()
1153 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_release_dma()
1154 kfree(dma->rx_buf); in s3c24xx_serial_release_dma()
1155 dma_release_channel(dma->rx_chan); in s3c24xx_serial_release_dma()
1156 dma->rx_chan = NULL; in s3c24xx_serial_release_dma()
1159 if (dma->tx_chan) { in s3c24xx_serial_release_dma()
1160 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_release_dma()
1161 dma_unmap_single(dma->tx_chan->device->dev, dma->tx_addr, in s3c24xx_serial_release_dma()
1163 dma_release_channel(dma->tx_chan); in s3c24xx_serial_release_dma()
1164 dma->tx_chan = NULL; in s3c24xx_serial_release_dma()
1172 if (ourport->tx_claimed) { in s3c24xx_serial_shutdown()
1173 free_irq(ourport->tx_irq, ourport); in s3c24xx_serial_shutdown()
1174 ourport->tx_enabled = 0; in s3c24xx_serial_shutdown()
1175 ourport->tx_claimed = 0; in s3c24xx_serial_shutdown()
1176 ourport->tx_mode = 0; in s3c24xx_serial_shutdown()
1179 if (ourport->rx_claimed) { in s3c24xx_serial_shutdown()
1180 free_irq(ourport->rx_irq, ourport); in s3c24xx_serial_shutdown()
1181 ourport->rx_claimed = 0; in s3c24xx_serial_shutdown()
1182 ourport->rx_enabled = 0; in s3c24xx_serial_shutdown()
1185 if (ourport->dma) in s3c24xx_serial_shutdown()
1188 ourport->tx_in_progress = 0; in s3c24xx_serial_shutdown()
1195 ourport->tx_enabled = 0; in s3c64xx_serial_shutdown()
1196 ourport->tx_mode = 0; in s3c64xx_serial_shutdown()
1197 ourport->rx_enabled = 0; in s3c64xx_serial_shutdown()
1199 free_irq(port->irq, ourport); in s3c64xx_serial_shutdown()
1204 if (ourport->dma) in s3c64xx_serial_shutdown()
1207 ourport->tx_in_progress = 0; in s3c64xx_serial_shutdown()
1224 free_irq(port->irq, ourport); in apple_s5l_serial_shutdown()
1226 ourport->tx_enabled = 0; in apple_s5l_serial_shutdown()
1227 ourport->tx_mode = 0; in apple_s5l_serial_shutdown()
1228 ourport->rx_enabled = 0; in apple_s5l_serial_shutdown()
1230 if (ourport->dma) in apple_s5l_serial_shutdown()
1233 ourport->tx_in_progress = 0; in apple_s5l_serial_shutdown()
1241 ourport->rx_enabled = 1; in s3c24xx_serial_startup()
1243 ret = request_irq(ourport->rx_irq, s3c24xx_serial_rx_irq, 0, in s3c24xx_serial_startup()
1247 dev_err(port->dev, "cannot get irq %d\n", ourport->rx_irq); in s3c24xx_serial_startup()
1251 ourport->rx_claimed = 1; in s3c24xx_serial_startup()
1253 dev_dbg(port->dev, "requesting tx irq...\n"); in s3c24xx_serial_startup()
1255 ourport->tx_enabled = 1; in s3c24xx_serial_startup()
1257 ret = request_irq(ourport->tx_irq, s3c24xx_serial_tx_irq, 0, in s3c24xx_serial_startup()
1261 dev_err(port->dev, "cannot get irq %d\n", ourport->tx_irq); in s3c24xx_serial_startup()
1265 ourport->tx_claimed = 1; in s3c24xx_serial_startup()
1286 if (ourport->dma) { in s3c64xx_serial_startup()
1289 devm_kfree(port->dev, ourport->dma); in s3c64xx_serial_startup()
1290 ourport->dma = NULL; in s3c64xx_serial_startup()
1294 ret = request_irq(port->irq, s3c64xx_serial_handle_irq, IRQF_SHARED, in s3c64xx_serial_startup()
1297 dev_err(port->dev, "cannot get irq %d\n", port->irq); in s3c64xx_serial_startup()
1302 ourport->rx_enabled = 1; in s3c64xx_serial_startup()
1303 ourport->tx_enabled = 0; in s3c64xx_serial_startup()
1305 spin_lock_irqsave(&port->lock, flags); in s3c64xx_serial_startup()
1315 spin_unlock_irqrestore(&port->lock, flags); in s3c64xx_serial_startup()
1332 ret = request_irq(port->irq, apple_serial_handle_irq, 0, in apple_s5l_serial_startup()
1335 dev_err(port->dev, "cannot get irq %d\n", port->irq); in apple_s5l_serial_startup()
1340 ourport->rx_enabled = 1; in apple_s5l_serial_startup()
1341 ourport->tx_enabled = 0; in apple_s5l_serial_startup()
1343 spin_lock_irqsave(&port->lock, flags); in apple_s5l_serial_startup()
1353 spin_unlock_irqrestore(&port->lock, flags); in apple_s5l_serial_startup()
1370 ourport->pm_level = level; in s3c24xx_serial_pm()
1374 while (--timeout && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_pm()
1377 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1378 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_pm()
1380 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_pm()
1384 clk_prepare_enable(ourport->clk); in s3c24xx_serial_pm()
1386 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1387 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_pm()
1390 dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level); in s3c24xx_serial_pm()
1414 if (info->num_clks == 1) in s3c24xx_serial_getsource()
1418 ucon &= info->clksel_mask; in s3c24xx_serial_getsource()
1419 return ucon >> info->clksel_shift; in s3c24xx_serial_getsource()
1428 if (info->num_clks == 1) in s3c24xx_serial_setsource()
1432 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) in s3c24xx_serial_setsource()
1435 ucon &= ~info->clksel_mask; in s3c24xx_serial_setsource()
1436 ucon |= clk_sel << info->clksel_shift; in s3c24xx_serial_setsource()
1444 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_getclk()
1449 int calc_deviation, deviation = (1 << 30) - 1; in s3c24xx_serial_getclk()
1451 for (cnt = 0; cnt < info->num_clks; cnt++) { in s3c24xx_serial_getclk()
1453 if (ourport->cfg->clk_sel && in s3c24xx_serial_getclk()
1454 !(ourport->cfg->clk_sel & (1 << cnt))) in s3c24xx_serial_getclk()
1458 clk = clk_get(ourport->port.dev, clkname); in s3c24xx_serial_getclk()
1464 dev_err(ourport->port.dev, in s3c24xx_serial_getclk()
1470 if (ourport->info->has_divslot) { in s3c24xx_serial_getclk()
1487 quot--; in s3c24xx_serial_getclk()
1489 calc_deviation = abs(req_baud - baud); in s3c24xx_serial_getclk()
1540 struct clk *clk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1550 termios->c_cflag &= ~(HUPCL | CMSPAR); in s3c24xx_serial_set_termios()
1551 termios->c_cflag |= CLOCAL; in s3c24xx_serial_set_termios()
1559 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) in s3c24xx_serial_set_termios()
1560 quot = port->custom_divisor; in s3c24xx_serial_set_termios()
1566 if (ourport->baudclk != clk) { in s3c24xx_serial_set_termios()
1571 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_set_termios()
1572 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_set_termios()
1573 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1576 ourport->baudclk = clk; in s3c24xx_serial_set_termios()
1577 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; in s3c24xx_serial_set_termios()
1580 if (ourport->info->has_divslot) { in s3c24xx_serial_set_termios()
1581 unsigned int div = ourport->baudclk_rate / baud; in s3c24xx_serial_set_termios()
1583 if (cfg->has_fracval) { in s3c24xx_serial_set_termios()
1585 dev_dbg(port->dev, "fracval = %04x\n", udivslot); in s3c24xx_serial_set_termios()
1588 dev_dbg(port->dev, "udivslot = %04x (div %d)\n", in s3c24xx_serial_set_termios()
1593 switch (termios->c_cflag & CSIZE) { in s3c24xx_serial_set_termios()
1595 dev_dbg(port->dev, "config: 5bits/char\n"); in s3c24xx_serial_set_termios()
1599 dev_dbg(port->dev, "config: 6bits/char\n"); in s3c24xx_serial_set_termios()
1603 dev_dbg(port->dev, "config: 7bits/char\n"); in s3c24xx_serial_set_termios()
1608 dev_dbg(port->dev, "config: 8bits/char\n"); in s3c24xx_serial_set_termios()
1614 ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); in s3c24xx_serial_set_termios()
1616 if (termios->c_cflag & CSTOPB) in s3c24xx_serial_set_termios()
1619 if (termios->c_cflag & PARENB) { in s3c24xx_serial_set_termios()
1620 if (termios->c_cflag & PARODD) in s3c24xx_serial_set_termios()
1628 spin_lock_irqsave(&port->lock, flags); in s3c24xx_serial_set_termios()
1630 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1637 port->status &= ~UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1640 if (termios->c_cflag & CRTSCTS) { in s3c24xx_serial_set_termios()
1644 port->status = UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1650 if (ourport->info->has_divslot) in s3c24xx_serial_set_termios()
1653 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1654 "uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", in s3c24xx_serial_set_termios()
1660 * Update the per-port timeout. in s3c24xx_serial_set_termios()
1662 uart_update_timeout(port, termios->c_cflag, baud); in s3c24xx_serial_set_termios()
1667 port->read_status_mask = S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1668 if (termios->c_iflag & INPCK) in s3c24xx_serial_set_termios()
1669 port->read_status_mask |= S3C2410_UERSTAT_FRAME | in s3c24xx_serial_set_termios()
1674 port->ignore_status_mask = 0; in s3c24xx_serial_set_termios()
1675 if (termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1676 port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1677 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1678 port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; in s3c24xx_serial_set_termios()
1683 if ((termios->c_cflag & CREAD) == 0) in s3c24xx_serial_set_termios()
1684 port->ignore_status_mask |= RXSTAT_DUMMY_READ; in s3c24xx_serial_set_termios()
1686 spin_unlock_irqrestore(&port->lock, flags); in s3c24xx_serial_set_termios()
1693 switch (ourport->info->type) { in s3c24xx_serial_type()
1710 port->type = info->port_type; in s3c24xx_serial_config_port()
1721 if (ser->type != PORT_UNKNOWN && ser->type != info->port_type) in s3c24xx_serial_verify_port()
1722 return -EINVAL; in s3c24xx_serial_verify_port()
1833 spin_lock_init(&port->lock); in s3c24xx_serial_init_port_default()
1835 port->iotype = UPIO_MEM; in s3c24xx_serial_init_port_default()
1836 port->uartclk = 0; in s3c24xx_serial_init_port_default()
1837 port->fifosize = 16; in s3c24xx_serial_init_port_default()
1838 port->ops = &s3c24xx_serial_ops; in s3c24xx_serial_init_port_default()
1839 port->flags = UPF_BOOT_AUTOCONF; in s3c24xx_serial_init_port_default()
1840 port->line = index; in s3c24xx_serial_init_port_default()
1854 ucon &= (info->clksel_mask | info->ucon_mask); in s3c24xx_serial_resetport()
1855 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); in s3c24xx_serial_resetport()
1858 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); in s3c24xx_serial_resetport()
1859 wr_regl(port, S3C2410_UFCON, cfg->ufcon); in s3c24xx_serial_resetport()
1867 struct device *dev = ourport->port.dev; in s3c24xx_serial_enable_baudclk()
1868 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_enable_baudclk()
1875 clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel; in s3c24xx_serial_enable_baudclk()
1876 for (clk_num = 0; clk_num < info->num_clks; clk_num++) { in s3c24xx_serial_enable_baudclk()
1891 ourport->baudclk = clk; in s3c24xx_serial_enable_baudclk()
1892 ourport->baudclk_rate = clk_get_rate(clk); in s3c24xx_serial_enable_baudclk()
1893 s3c24xx_serial_setsource(&ourport->port, clk_num); in s3c24xx_serial_enable_baudclk()
1898 return -EINVAL; in s3c24xx_serial_enable_baudclk()
1909 struct uart_port *port = &ourport->port; in s3c24xx_serial_init_port()
1910 const struct s3c2410_uartcfg *cfg = ourport->cfg; in s3c24xx_serial_init_port()
1915 return -ENODEV; in s3c24xx_serial_init_port()
1917 if (port->mapbase != 0) in s3c24xx_serial_init_port()
1918 return -EINVAL; in s3c24xx_serial_init_port()
1921 port->dev = &platdev->dev; in s3c24xx_serial_init_port()
1923 port->uartclk = 1; in s3c24xx_serial_init_port()
1925 if (cfg->uart_flags & UPF_CONS_FLOW) { in s3c24xx_serial_init_port()
1926 dev_dbg(port->dev, "enabling flow control\n"); in s3c24xx_serial_init_port()
1927 port->flags |= UPF_CONS_FLOW; in s3c24xx_serial_init_port()
1930 /* sort our the physical and virtual addresses for each UART */ in s3c24xx_serial_init_port()
1934 dev_err(port->dev, "failed to find memory resource for uart\n"); in s3c24xx_serial_init_port()
1935 return -EINVAL; in s3c24xx_serial_init_port()
1938 dev_dbg(port->dev, "resource %pR)\n", res); in s3c24xx_serial_init_port()
1940 port->membase = devm_ioremap_resource(port->dev, res); in s3c24xx_serial_init_port()
1941 if (IS_ERR(port->membase)) { in s3c24xx_serial_init_port()
1942 dev_err(port->dev, "failed to remap controller address\n"); in s3c24xx_serial_init_port()
1943 return -EBUSY; in s3c24xx_serial_init_port()
1946 port->mapbase = res->start; in s3c24xx_serial_init_port()
1949 port->irq = 0; in s3c24xx_serial_init_port()
1951 port->irq = ret; in s3c24xx_serial_init_port()
1952 ourport->rx_irq = ret; in s3c24xx_serial_init_port()
1953 ourport->tx_irq = ret + 1; in s3c24xx_serial_init_port()
1956 switch (ourport->info->type) { in s3c24xx_serial_init_port()
1960 ourport->tx_irq = ret; in s3c24xx_serial_init_port()
1970 if (platdev->dev.of_node && of_find_property(platdev->dev.of_node, in s3c24xx_serial_init_port()
1972 ourport->dma = devm_kzalloc(port->dev, in s3c24xx_serial_init_port()
1973 sizeof(*ourport->dma), in s3c24xx_serial_init_port()
1975 if (!ourport->dma) { in s3c24xx_serial_init_port()
1976 ret = -ENOMEM; in s3c24xx_serial_init_port()
1981 ourport->clk = clk_get(&platdev->dev, "uart"); in s3c24xx_serial_init_port()
1982 if (IS_ERR(ourport->clk)) { in s3c24xx_serial_init_port()
1984 dev_name(&platdev->dev)); in s3c24xx_serial_init_port()
1985 ret = PTR_ERR(ourport->clk); in s3c24xx_serial_init_port()
1989 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_init_port()
1991 pr_err("uart: clock failed to prepare+enable: %d\n", ret); in s3c24xx_serial_init_port()
1992 clk_put(ourport->clk); in s3c24xx_serial_init_port()
1998 pr_warn("uart: failed to enable baudclk\n"); in s3c24xx_serial_init_port()
2001 switch (ourport->info->type) { in s3c24xx_serial_init_port()
2023 dev_dbg(port->dev, "port: map=%pa, mem=%p, irq=%d (%d,%d), clock=%u\n", in s3c24xx_serial_init_port()
2024 &port->mapbase, port->membase, port->irq, in s3c24xx_serial_init_port()
2025 ourport->rx_irq, ourport->tx_irq, port->uartclk); in s3c24xx_serial_init_port()
2027 /* reset the fifos (and setup the uart) */ in s3c24xx_serial_init_port()
2033 port->mapbase = 0; in s3c24xx_serial_init_port()
2044 if (dev_of_node(&pdev->dev)) in s3c24xx_get_driver_data()
2045 return of_device_get_match_data(&pdev->dev); in s3c24xx_get_driver_data()
2048 platform_get_device_id(pdev)->driver_data; in s3c24xx_get_driver_data()
2053 struct device_node *np = pdev->dev.of_node; in s3c24xx_serial_probe()
2065 dev_err(&pdev->dev, "serial%d out of range\n", index); in s3c24xx_serial_probe()
2066 return -EINVAL; in s3c24xx_serial_probe()
2072 ourport->drv_data = s3c24xx_get_driver_data(pdev); in s3c24xx_serial_probe()
2073 if (!ourport->drv_data) { in s3c24xx_serial_probe()
2074 dev_err(&pdev->dev, "could not find driver data\n"); in s3c24xx_serial_probe()
2075 return -ENODEV; in s3c24xx_serial_probe()
2078 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_probe()
2079 ourport->info = &ourport->drv_data->info; in s3c24xx_serial_probe()
2080 ourport->cfg = (dev_get_platdata(&pdev->dev)) ? in s3c24xx_serial_probe()
2081 dev_get_platdata(&pdev->dev) : in s3c24xx_serial_probe()
2082 &ourport->drv_data->def_cfg; in s3c24xx_serial_probe()
2084 switch (ourport->info->type) { in s3c24xx_serial_probe()
2086 ourport->port.ops = &s3c24xx_serial_ops; in s3c24xx_serial_probe()
2089 ourport->port.ops = &s3c64xx_serial_ops; in s3c24xx_serial_probe()
2092 ourport->port.ops = &apple_s5l_serial_ops; in s3c24xx_serial_probe()
2098 "samsung,uart-fifosize", &ourport->port.fifosize); in s3c24xx_serial_probe()
2100 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { in s3c24xx_serial_probe()
2103 ourport->port.iotype = UPIO_MEM; in s3c24xx_serial_probe()
2106 ourport->port.iotype = UPIO_MEM32; in s3c24xx_serial_probe()
2109 dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", in s3c24xx_serial_probe()
2111 return -EINVAL; in s3c24xx_serial_probe()
2116 if (ourport->drv_data->fifosize[index]) in s3c24xx_serial_probe()
2117 ourport->port.fifosize = ourport->drv_data->fifosize[index]; in s3c24xx_serial_probe()
2118 else if (ourport->info->fifosize) in s3c24xx_serial_probe()
2119 ourport->port.fifosize = ourport->info->fifosize; in s3c24xx_serial_probe()
2120 ourport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SAMSUNG_CONSOLE); in s3c24xx_serial_probe()
2126 ourport->min_dma_size = max_t(int, ourport->port.fifosize, in s3c24xx_serial_probe()
2129 dev_dbg(&pdev->dev, "%s: initialising port %p...\n", __func__, ourport); in s3c24xx_serial_probe()
2138 pr_err("Failed to register Samsung UART driver\n"); in s3c24xx_serial_probe()
2143 dev_dbg(&pdev->dev, "%s: adding port\n", __func__); in s3c24xx_serial_probe()
2144 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); in s3c24xx_serial_probe()
2145 platform_set_drvdata(pdev, &ourport->port); in s3c24xx_serial_probe()
2149 * so that a potential re-enablement through the pm-callback overlaps in s3c24xx_serial_probe()
2152 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_probe()
2153 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_probe()
2154 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_probe()
2163 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); in s3c24xx_serial_remove()
2174 /* UART power management code */
2192 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume()
2193 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2194 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume()
2196 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2197 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume()
2198 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume()
2213 switch (ourport->info->type) { in s3c24xx_serial_resume_noirq()
2217 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2219 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2221 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2222 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2223 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2225 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2226 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2227 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2234 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2239 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_resume_noirq()
2240 ret = clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2243 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2254 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2256 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2262 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2263 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2264 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2299 /* fifo mode - check amount of data in fifo registers... */ in s3c24xx_serial_console_txrdy()
2302 return (ufstat & info->tx_fifofull) ? 0 : 1; in s3c24xx_serial_console_txrdy()
2305 /* in non-fifo mode, we go and use the tx buffer empty */ in s3c24xx_serial_console_txrdy()
2320 * Console polling routines for writing and reading from the uart while
2375 if (cons_uart->sysrq) in s3c24xx_serial_console_write()
2378 locked = spin_trylock_irqsave(&cons_uart->lock, flags); in s3c24xx_serial_console_write()
2380 spin_lock_irqsave(&cons_uart->lock, flags); in s3c24xx_serial_console_write()
2385 spin_unlock_irqrestore(&cons_uart->lock, flags); in s3c24xx_serial_console_write()
2441 clk = clk_get(port->dev, clk_name); in s3c24xx_serial_get_options()
2448 dev_dbg(port->dev, "calculated baud %d\n", *baud); in s3c24xx_serial_get_options()
2464 if (co->index == -1 || co->index >= UART_NR) in s3c24xx_serial_console_setup()
2465 co->index = 0; in s3c24xx_serial_console_setup()
2467 port = &s3c24xx_serial_ports[co->index].port; in s3c24xx_serial_console_setup()
2471 if (port->mapbase == 0x0) in s3c24xx_serial_console_setup()
2472 return -ENODEV; in s3c24xx_serial_console_setup()
2477 * Check whether an invalid uart number has been specified, and in s3c24xx_serial_console_setup()
2486 dev_dbg(port->dev, "baud %d\n", baud); in s3c24xx_serial_console_setup()
2495 .index = -1,
2505 .name = "Samsung S3C6400 UART",
2534 .name = "Samsung S5PV210 UART",
2563 .name = "Samsung Exynos UART", \
2612 .name = "Apple S5L UART",
2641 .name = "Axis ARTPEC-8 UART",
2670 .name = "s3c6400-uart",
2673 .name = "s5pv210-uart",
2676 .name = "exynos4210-uart",
2679 .name = "exynos5433-uart",
2682 .name = "s5l-uart",
2685 .name = "exynos850-uart",
2688 .name = "artpec8-uart",
2697 { .compatible = "samsung,s3c6400-uart",
2699 { .compatible = "samsung,s5pv210-uart",
2701 { .compatible = "samsung,exynos4210-uart",
2703 { .compatible = "samsung,exynos5433-uart",
2705 { .compatible = "apple,s5l-uart",
2707 { .compatible = "samsung,exynos850-uart",
2709 { .compatible = "axis,artpec8-uart",
2721 .name = "samsung-uart",
2758 switch (port->iotype) { in wr_reg_barrier()
2775 while (!(readl(port->membase + S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE)) in samsung_early_busyuart()
2781 const struct samsung_early_console_data *data = port->private_data; in samsung_early_busyuart_fifo()
2783 while (readl(port->membase + S3C2410_UFSTAT) & data->txfull_mask) in samsung_early_busyuart_fifo()
2789 if (readl(port->membase + S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) in samsung_early_putc()
2800 struct earlycon_device *dev = con->data; in samsung_early_write()
2802 uart_console_write(&dev->port, s, n, samsung_early_putc); in samsung_early_write()
2807 struct earlycon_device *dev = con->data; in samsung_early_read()
2808 const struct samsung_early_console_data *data = dev->port.private_data; in samsung_early_read()
2812 ufstat = rd_regl(&dev->port, S3C2410_UFSTAT); in samsung_early_read()
2813 if (!(ufstat & data->rxfifo_mask)) in samsung_early_read()
2815 ch = rd_reg(&dev->port, S3C2410_URXH); in samsung_early_read()
2828 if (!device->port.membase) in samsung_early_console_setup()
2829 return -ENODEV; in samsung_early_console_setup()
2831 device->con->write = samsung_early_write; in samsung_early_console_setup()
2832 device->con->read = samsung_early_read; in samsung_early_console_setup()
2845 device->port.private_data = &s3c2410_early_console_data; in s3c2410_early_console_setup()
2849 OF_EARLYCON_DECLARE(s3c2410, "samsung,s3c2410-uart",
2861 device->port.private_data = &s3c2440_early_console_data; in s3c2440_early_console_setup()
2865 OF_EARLYCON_DECLARE(s3c2412, "samsung,s3c2412-uart",
2867 OF_EARLYCON_DECLARE(s3c2440, "samsung,s3c2440-uart",
2869 OF_EARLYCON_DECLARE(s3c6400, "samsung,s3c6400-uart",
2881 device->port.private_data = &s5pv210_early_console_data; in s5pv210_early_console_setup()
2885 OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart",
2887 OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart",
2889 OF_EARLYCON_DECLARE(artpec8, "axis,artpec8-uart",
2897 device->port.private_data = &s3c2410_early_console_data; in apple_s5l_early_console_setup()
2901 __set_fixmap(FIX_EARLYCON_MEM_BASE, device->port.mapbase, in apple_s5l_early_console_setup()
2907 OF_EARLYCON_DECLARE(s5l, "apple,s5l-uart", apple_s5l_early_console_setup);
2910 MODULE_ALIAS("platform:samsung-uart");