Lines Matching +full:cdr +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012 - 2014 Allwinner Tech
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
92 return readl(sspi->base_addr + reg); in sun4i_spi_read()
97 writel(value, sspi->base_addr + reg); in sun4i_spi_write()
138 while (len--) { in sun4i_spi_drain_fifo()
139 byte = readb(sspi->base_addr + SUN4I_RXDATA_REG); in sun4i_spi_drain_fifo()
140 if (sspi->rx_buf) in sun4i_spi_drain_fifo()
141 *sspi->rx_buf++ = byte; in sun4i_spi_drain_fifo()
151 cnt = SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi); in sun4i_spi_fill_fifo()
153 len = min3(len, (int)cnt, sspi->len); in sun4i_spi_fill_fifo()
155 while (len--) { in sun4i_spi_fill_fifo()
156 byte = sspi->tx_buf ? *sspi->tx_buf++ : 0; in sun4i_spi_fill_fifo()
157 writeb(byte, sspi->base_addr + SUN4I_TXDATA_REG); in sun4i_spi_fill_fifo()
158 sspi->len--; in sun4i_spi_fill_fifo()
164 struct sun4i_spi *sspi = spi_master_get_devdata(spi->master); in sun4i_spi_set_cs()
191 if (spi->mode & SPI_CS_HIGH) in sun4i_spi_set_cs()
201 return SUN4I_MAX_XFER_SIZE - 1; in sun4i_spi_max_transfer_size()
216 if (tfr->len > SUN4I_MAX_XFER_SIZE) in sun4i_spi_transfer_one()
217 return -EMSGSIZE; in sun4i_spi_transfer_one()
219 if (tfr->tx_buf && tfr->len >= SUN4I_MAX_XFER_SIZE) in sun4i_spi_transfer_one()
220 return -EMSGSIZE; in sun4i_spi_transfer_one()
222 reinit_completion(&sspi->done); in sun4i_spi_transfer_one()
223 sspi->tx_buf = tfr->tx_buf; in sun4i_spi_transfer_one()
224 sspi->rx_buf = tfr->rx_buf; in sun4i_spi_transfer_one()
225 sspi->len = tfr->len; in sun4i_spi_transfer_one()
241 if (spi->mode & SPI_CPOL) in sun4i_spi_transfer_one()
246 if (spi->mode & SPI_CPHA) in sun4i_spi_transfer_one()
251 if (spi->mode & SPI_LSB_FIRST) in sun4i_spi_transfer_one()
261 if (sspi->rx_buf) in sun4i_spi_transfer_one()
272 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
273 if (mclk_rate < (2 * tfr->speed_hz)) { in sun4i_spi_transfer_one()
274 clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); in sun4i_spi_transfer_one()
275 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
283 * SPI_CLK = MOD_CLK / (2 ^ (cdr + 1)) in sun4i_spi_transfer_one()
285 * SPI_CLK = MOD_CLK / (2 * (cdr + 1)) in sun4i_spi_transfer_one()
292 div = mclk_rate / (2 * tfr->speed_hz); in sun4i_spi_transfer_one()
295 div--; in sun4i_spi_transfer_one()
299 div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); in sun4i_spi_transfer_one()
306 if (sspi->tx_buf) in sun4i_spi_transfer_one()
307 tx_len = tfr->len; in sun4i_spi_transfer_one()
310 sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); in sun4i_spi_transfer_one()
318 sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); in sun4i_spi_transfer_one()
331 tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U); in sun4i_spi_transfer_one()
333 timeout = wait_for_completion_timeout(&sspi->done, in sun4i_spi_transfer_one()
337 dev_warn(&master->dev, in sun4i_spi_transfer_one()
339 dev_name(&spi->dev), tfr->len, tfr->speed_hz, in sun4i_spi_transfer_one()
340 jiffies_to_msecs(end - start), tx_time); in sun4i_spi_transfer_one()
341 ret = -ETIMEDOUT; in sun4i_spi_transfer_one()
361 complete(&sspi->done); in sun4i_spi_handler()
377 if (!sspi->len) in sun4i_spi_handler()
381 /* Only clear the interrupt _after_ re-seeding the FIFO */ in sun4i_spi_handler()
396 ret = clk_prepare_enable(sspi->hclk); in sun4i_spi_runtime_resume()
402 ret = clk_prepare_enable(sspi->mclk); in sun4i_spi_runtime_resume()
414 clk_disable_unprepare(sspi->hclk); in sun4i_spi_runtime_resume()
424 clk_disable_unprepare(sspi->mclk); in sun4i_spi_runtime_suspend()
425 clk_disable_unprepare(sspi->hclk); in sun4i_spi_runtime_suspend()
436 master = spi_alloc_master(&pdev->dev, sizeof(struct sun4i_spi)); in sun4i_spi_probe()
438 dev_err(&pdev->dev, "Unable to allocate SPI Master\n"); in sun4i_spi_probe()
439 return -ENOMEM; in sun4i_spi_probe()
445 sspi->base_addr = devm_platform_ioremap_resource(pdev, 0); in sun4i_spi_probe()
446 if (IS_ERR(sspi->base_addr)) { in sun4i_spi_probe()
447 ret = PTR_ERR(sspi->base_addr); in sun4i_spi_probe()
453 ret = -ENXIO; in sun4i_spi_probe()
457 ret = devm_request_irq(&pdev->dev, irq, sun4i_spi_handler, in sun4i_spi_probe()
458 0, "sun4i-spi", sspi); in sun4i_spi_probe()
460 dev_err(&pdev->dev, "Cannot request IRQ\n"); in sun4i_spi_probe()
464 sspi->master = master; in sun4i_spi_probe()
465 master->max_speed_hz = 100 * 1000 * 1000; in sun4i_spi_probe()
466 master->min_speed_hz = 3 * 1000; in sun4i_spi_probe()
467 master->set_cs = sun4i_spi_set_cs; in sun4i_spi_probe()
468 master->transfer_one = sun4i_spi_transfer_one; in sun4i_spi_probe()
469 master->num_chipselect = 4; in sun4i_spi_probe()
470 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; in sun4i_spi_probe()
471 master->bits_per_word_mask = SPI_BPW_MASK(8); in sun4i_spi_probe()
472 master->dev.of_node = pdev->dev.of_node; in sun4i_spi_probe()
473 master->auto_runtime_pm = true; in sun4i_spi_probe()
474 master->max_transfer_size = sun4i_spi_max_transfer_size; in sun4i_spi_probe()
476 sspi->hclk = devm_clk_get(&pdev->dev, "ahb"); in sun4i_spi_probe()
477 if (IS_ERR(sspi->hclk)) { in sun4i_spi_probe()
478 dev_err(&pdev->dev, "Unable to acquire AHB clock\n"); in sun4i_spi_probe()
479 ret = PTR_ERR(sspi->hclk); in sun4i_spi_probe()
483 sspi->mclk = devm_clk_get(&pdev->dev, "mod"); in sun4i_spi_probe()
484 if (IS_ERR(sspi->mclk)) { in sun4i_spi_probe()
485 dev_err(&pdev->dev, "Unable to acquire module clock\n"); in sun4i_spi_probe()
486 ret = PTR_ERR(sspi->mclk); in sun4i_spi_probe()
490 init_completion(&sspi->done); in sun4i_spi_probe()
493 * This wake-up/shutdown pattern is to be able to have the in sun4i_spi_probe()
496 ret = sun4i_spi_runtime_resume(&pdev->dev); in sun4i_spi_probe()
498 dev_err(&pdev->dev, "Couldn't resume the device\n"); in sun4i_spi_probe()
502 pm_runtime_set_active(&pdev->dev); in sun4i_spi_probe()
503 pm_runtime_enable(&pdev->dev); in sun4i_spi_probe()
504 pm_runtime_idle(&pdev->dev); in sun4i_spi_probe()
506 ret = devm_spi_register_master(&pdev->dev, master); in sun4i_spi_probe()
508 dev_err(&pdev->dev, "cannot register SPI master\n"); in sun4i_spi_probe()
515 pm_runtime_disable(&pdev->dev); in sun4i_spi_probe()
516 sun4i_spi_runtime_suspend(&pdev->dev); in sun4i_spi_probe()
524 pm_runtime_force_suspend(&pdev->dev); in sun4i_spi_remove()
528 { .compatible = "allwinner,sun4i-a10-spi", },
542 .name = "sun4i-spi",
550 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");