Lines Matching refs:stm32_spi_set_bits
362 static inline void stm32_spi_set_bits(struct stm32_spi *spi, in stm32_spi_set_bits() function
387 stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_SPE); in stm32h7_spi_get_fifo_size()
426 stm32_spi_set_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_DSIZE); in stm32h7_spi_get_bpw_mask()
642 stm32_spi_set_bits(spi, spi->cfg->regs->en.reg, in stm32_spi_enable()
1145 stm32_spi_set_bits(spi, STM32F4_SPI_CR2, cr2); in stm32f4_spi_transfer_one_irq()
1192 stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART); in stm32h7_spi_transfer_one_irq()
1216 stm32_spi_set_bits(spi, STM32F4_SPI_CR2, STM32F4_SPI_CR2_ERRIE); in stm32f4_spi_transfer_one_dma_start()
1235 stm32_spi_set_bits(spi, STM32H7_SPI_IER, ier); in stm32h7_spi_transfer_one_dma_start()
1240 stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART); in stm32h7_spi_transfer_one_dma_start()
1266 stm32_spi_set_bits(spi, spi->cfg->regs->dma_rx_en.reg, in stm32_spi_transfer_one_dma()
1322 stm32_spi_set_bits(spi, spi->cfg->regs->dma_tx_en.reg, in stm32_spi_transfer_one_dma()
1355 stm32_spi_set_bits(spi, STM32F4_SPI_CR1, STM32F4_SPI_CR1_DFF); in stm32f4_spi_set_bpw()
1442 stm32_spi_set_bits(spi, STM32F4_SPI_CR1, in stm32f4_spi_set_mode()
1451 stm32_spi_set_bits(spi, STM32F4_SPI_CR1, in stm32f4_spi_set_mode()
1477 stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_HDDIR); in stm32h7_spi_set_mode()
1694 stm32_spi_set_bits(spi, STM32F4_SPI_CR1, STM32F4_SPI_CR1_SSI | in stm32f4_spi_config()
1739 stm32_spi_set_bits(spi, STM32H7_SPI_CR1, cr1); in stm32h7_spi_config()
1740 stm32_spi_set_bits(spi, STM32H7_SPI_CFG2, cfg2); in stm32h7_spi_config()