Lines Matching +full:spi +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0
3 // SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs
7 // Based on spi-mt7621.c:
9 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
10 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
12 #include <linux/clk.h>
19 #include <linux/spi/spi.h>
21 #define DRIVER_NAME "spi-ar934x"
47 struct clk *clk; member
53 int div = DIV_ROUND_UP(sp->clk_freq, freq * 2) - 1; in ar934x_spi_clk_div()
58 return -EINVAL; in ar934x_spi_clk_div()
63 static int ar934x_spi_setup(struct spi_device *spi) in ar934x_spi_setup() argument
65 struct ar934x_spi *sp = spi_controller_get_devdata(spi->controller); in ar934x_spi_setup()
67 if ((spi->max_speed_hz == 0) || in ar934x_spi_setup()
68 (spi->max_speed_hz > (sp->clk_freq / 2))) { in ar934x_spi_setup()
69 spi->max_speed_hz = sp->clk_freq / 2; in ar934x_spi_setup()
70 } else if (spi->max_speed_hz < (sp->clk_freq / 128)) { in ar934x_spi_setup()
71 dev_err(&spi->dev, "spi clock is too low\n"); in ar934x_spi_setup()
72 return -EINVAL; in ar934x_spi_setup()
83 struct spi_device *spi = m->spi; in ar934x_spi_transfer_one_message() local
92 m->actual_length = 0; in ar934x_spi_transfer_one_message()
93 list_for_each_entry(t, &m->transfers, transfer_list) { in ar934x_spi_transfer_one_message()
94 if (t->bits_per_word >= 8 && t->bits_per_word < 32) in ar934x_spi_transfer_one_message()
95 bpw = t->bits_per_word >> 3; in ar934x_spi_transfer_one_message()
99 if (t->speed_hz) in ar934x_spi_transfer_one_message()
100 div = ar934x_spi_clk_div(sp, t->speed_hz); in ar934x_spi_transfer_one_message()
102 div = ar934x_spi_clk_div(sp, spi->max_speed_hz); in ar934x_spi_transfer_one_message()
104 stat = -EIO; in ar934x_spi_transfer_one_message()
108 reg = ioread32(sp->base + AR934X_SPI_REG_CTRL); in ar934x_spi_transfer_one_message()
111 iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL); in ar934x_spi_transfer_one_message()
112 iowrite32(0, sp->base + AR934X_SPI_DATAOUT); in ar934x_spi_transfer_one_message()
114 for (trx_done = 0; trx_done < t->len; trx_done += bpw) { in ar934x_spi_transfer_one_message()
115 trx_cur = t->len - trx_done; in ar934x_spi_transfer_one_message()
118 else if (list_is_last(&t->transfer_list, &m->transfers)) in ar934x_spi_transfer_one_message()
121 if (t->tx_buf) { in ar934x_spi_transfer_one_message()
122 tx_buf = t->tx_buf + trx_done; in ar934x_spi_transfer_one_message()
126 iowrite32(reg, sp->base + AR934X_SPI_DATAOUT); in ar934x_spi_transfer_one_message()
129 reg = AR934X_SPI_SHIFT_VAL(spi_get_chipselect(spi, 0), term, in ar934x_spi_transfer_one_message()
131 iowrite32(reg, sp->base + AR934X_SPI_REG_SHIFT_CTRL); in ar934x_spi_transfer_one_message()
133 sp->base + AR934X_SPI_REG_SHIFT_CTRL, reg, in ar934x_spi_transfer_one_message()
138 if (t->rx_buf) { in ar934x_spi_transfer_one_message()
139 reg = ioread32(sp->base + AR934X_SPI_DATAIN); in ar934x_spi_transfer_one_message()
140 buf = t->rx_buf + trx_done; in ar934x_spi_transfer_one_message()
142 buf[trx_cur - i - 1] = reg & 0xff; in ar934x_spi_transfer_one_message()
146 spi_delay_exec(&t->word_delay, t); in ar934x_spi_transfer_one_message()
148 m->actual_length += t->len; in ar934x_spi_transfer_one_message()
153 m->status = stat; in ar934x_spi_transfer_one_message()
160 { .compatible = "qca,ar934x-spi" },
170 struct clk *clk; in ar934x_spi_probe() local
177 clk = devm_clk_get(&pdev->dev, NULL); in ar934x_spi_probe()
178 if (IS_ERR(clk)) { in ar934x_spi_probe()
179 dev_err(&pdev->dev, "failed to get clock\n"); in ar934x_spi_probe()
180 return PTR_ERR(clk); in ar934x_spi_probe()
183 ret = clk_prepare_enable(clk); in ar934x_spi_probe()
187 ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*sp)); in ar934x_spi_probe()
189 dev_info(&pdev->dev, "failed to allocate spi controller\n"); in ar934x_spi_probe()
190 ret = -ENOMEM; in ar934x_spi_probe()
194 /* disable flash mapping and expose spi controller registers */ in ar934x_spi_probe()
196 /* restore pins to default state: CSn=1 DO=CLK=0 */ in ar934x_spi_probe()
199 ctlr->mode_bits = SPI_LSB_FIRST; in ar934x_spi_probe()
200 ctlr->setup = ar934x_spi_setup; in ar934x_spi_probe()
201 ctlr->transfer_one_message = ar934x_spi_transfer_one_message; in ar934x_spi_probe()
202 ctlr->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(24) | in ar934x_spi_probe()
204 ctlr->dev.of_node = pdev->dev.of_node; in ar934x_spi_probe()
205 ctlr->num_chipselect = 3; in ar934x_spi_probe()
207 dev_set_drvdata(&pdev->dev, ctlr); in ar934x_spi_probe()
210 sp->base = base; in ar934x_spi_probe()
211 sp->clk = clk; in ar934x_spi_probe()
212 sp->clk_freq = clk_get_rate(clk); in ar934x_spi_probe()
213 sp->ctlr = ctlr; in ar934x_spi_probe()
220 clk_disable_unprepare(clk); in ar934x_spi_probe()
229 ctlr = dev_get_drvdata(&pdev->dev); in ar934x_spi_remove()
233 clk_disable_unprepare(sp->clk); in ar934x_spi_remove()
247 MODULE_DESCRIPTION("SPI controller driver for Qualcomm Atheros AR934x/QCA95xx");