1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
168 /* VPPSYS0 */
722 		if (!mtx->mutex[i].claimed) {  in mtk_mutex_get()
723 			mtx->mutex[i].claimed = true;  in mtk_mutex_get()
724 			return &mtx->mutex[i];  in mtk_mutex_get()
727 	return ERR_PTR(-EBUSY);  in mtk_mutex_get()
734 						 mutex[mutex->id]);  in mtk_mutex_put()
736 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_put()
738 	mutex->claimed = false;  in mtk_mutex_put()
745 						 mutex[mutex->id]);  in mtk_mutex_prepare()
746 	return clk_prepare_enable(mtx->clk);  in mtk_mutex_prepare()
753 						 mutex[mutex->id]);  in mtk_mutex_unprepare()
754 	clk_disable_unprepare(mtx->clk);  in mtk_mutex_unprepare()
762 						 mutex[mutex->id]);  in mtk_mutex_add_comp()
767 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_add_comp()
795 		if (mtx->data->mutex_mod[id] < 32) {  in mtk_mutex_add_comp()
796 			offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_add_comp()
797 						    mutex->id);  in mtk_mutex_add_comp()
798 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_add_comp()
799 			reg |= 1 << mtx->data->mutex_mod[id];  in mtk_mutex_add_comp()
800 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_add_comp()
802 			offset = DISP_REG_MUTEX_MOD2(mutex->id);  in mtk_mutex_add_comp()
803 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_add_comp()
804 			reg |= 1 << (mtx->data->mutex_mod[id] - 32);  in mtk_mutex_add_comp()
805 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_add_comp()
810 	writel_relaxed(mtx->data->mutex_sof[sof_id],  in mtk_mutex_add_comp()
811 		       mtx->regs +  in mtk_mutex_add_comp()
812 		       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id));  in mtk_mutex_add_comp()
820 						 mutex[mutex->id]);  in mtk_mutex_remove_comp()
824 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_remove_comp()
836 			       mtx->regs +  in mtk_mutex_remove_comp()
837 			       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg,  in mtk_mutex_remove_comp()
838 						  mutex->id));  in mtk_mutex_remove_comp()
841 		if (mtx->data->mutex_mod[id] < 32) {  in mtk_mutex_remove_comp()
842 			offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_remove_comp()
843 						    mutex->id);  in mtk_mutex_remove_comp()
844 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_remove_comp()
845 			reg &= ~(1 << mtx->data->mutex_mod[id]);  in mtk_mutex_remove_comp()
846 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_remove_comp()
848 			offset = DISP_REG_MUTEX_MOD2(mutex->id);  in mtk_mutex_remove_comp()
849 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_remove_comp()
850 			reg &= ~(1 << (mtx->data->mutex_mod[id] - 32));  in mtk_mutex_remove_comp()
851 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_remove_comp()
861 						 mutex[mutex->id]);  in mtk_mutex_enable()
863 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_enable()
865 	writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_enable()
872 						 mutex[mutex->id]);  in mtk_mutex_enable_by_cmdq()
875 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_enable_by_cmdq()
877 	if (!mtx->cmdq_reg.size) {  in mtk_mutex_enable_by_cmdq()
878 		dev_err(mtx->dev, "mediatek,gce-client-reg hasn't been set");  in mtk_mutex_enable_by_cmdq()
879 		return -ENODEV;  in mtk_mutex_enable_by_cmdq()
882 	cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys,  in mtk_mutex_enable_by_cmdq()
883 		       mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1);  in mtk_mutex_enable_by_cmdq()
891 						 mutex[mutex->id]);  in mtk_mutex_disable()
893 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_disable()
895 	writel(0, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_disable()
902 						 mutex[mutex->id]);  in mtk_mutex_acquire()
905 	writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_acquire()
906 	writel(1, mtx->regs + DISP_REG_MUTEX(mutex->id));  in mtk_mutex_acquire()
907 	if (readl_poll_timeout_atomic(mtx->regs + DISP_REG_MUTEX(mutex->id),  in mtk_mutex_acquire()
909 		pr_err("could not acquire mutex %d\n", mutex->id);  in mtk_mutex_acquire()
916 						 mutex[mutex->id]);  in mtk_mutex_release()
918 	writel(0, mtx->regs + DISP_REG_MUTEX(mutex->id));  in mtk_mutex_release()
926 						 mutex[mutex->id]);  in mtk_mutex_write_mod()
930 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_write_mod()
934 		dev_err(mtx->dev, "Not supported MOD table index : %d", idx);  in mtk_mutex_write_mod()
935 		return -EINVAL;  in mtk_mutex_write_mod()
940 	 * are present, hence requiring multiple 32-bits registers.  in mtk_mutex_write_mod()
950 	if (mtx->data->mutex_table_mod[idx] < 32) {  in mtk_mutex_write_mod()
951 		reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_write_mod()
952 						mutex->id);  in mtk_mutex_write_mod()
954 		reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg,  in mtk_mutex_write_mod()
955 						 mutex->id);  in mtk_mutex_write_mod()
959 	reg = readl_relaxed(mtx->regs + reg_offset);  in mtk_mutex_write_mod()
961 		reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset);  in mtk_mutex_write_mod()
963 		reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset);  in mtk_mutex_write_mod()
965 	writel_relaxed(reg, mtx->regs + reg_offset);  in mtk_mutex_write_mod()
975 						 mutex[mutex->id]);  in mtk_mutex_write_sof()
977 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_write_sof()
981 		dev_err(mtx->dev, "Not supported SOF index : %d", idx);  in mtk_mutex_write_sof()
982 		return -EINVAL;  in mtk_mutex_write_sof()
985 	writel_relaxed(idx, mtx->regs +  in mtk_mutex_write_sof()
986 		       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id));  in mtk_mutex_write_sof()
994 	struct device *dev = &pdev->dev;  in mtk_mutex_probe()
1001 		return -ENOMEM;  in mtk_mutex_probe()
1004 		mtx->mutex[i].id = i;  in mtk_mutex_probe()
1006 	mtx->data = of_device_get_match_data(dev);  in mtk_mutex_probe()
1008 	if (!mtx->data->no_clk) {  in mtk_mutex_probe()
1009 		mtx->clk = devm_clk_get(dev, NULL);  in mtk_mutex_probe()
1010 		if (IS_ERR(mtx->clk))  in mtk_mutex_probe()
1011 			return dev_err_probe(dev, PTR_ERR(mtx->clk), "Failed to get clock\n");  in mtk_mutex_probe()
1014 	mtx->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &regs);  in mtk_mutex_probe()
1015 	if (IS_ERR(mtx->regs)) {  in mtk_mutex_probe()
1017 		return PTR_ERR(mtx->regs);  in mtk_mutex_probe()
1019 	mtx->addr = regs->start;  in mtk_mutex_probe()
1022 	ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0);  in mtk_mutex_probe()
1024 		dev_dbg(dev, "No mediatek,gce-client-reg!\n");  in mtk_mutex_probe()
1032 	{ .compatible = "mediatek,mt2701-disp-mutex", .data = &mt2701_mutex_driver_data },
1033 	{ .compatible = "mediatek,mt2712-disp-mutex", .data = &mt2712_mutex_driver_data },
1034 	{ .compatible = "mediatek,mt6795-disp-mutex", .data = &mt6795_mutex_driver_data },
1035 	{ .compatible = "mediatek,mt8167-disp-mutex", .data = &mt8167_mutex_driver_data },
1036 	{ .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data },
1037 	{ .compatible = "mediatek,mt8183-disp-mutex", .data = &mt8183_mutex_driver_data },
1038 	{ .compatible = "mediatek,mt8186-disp-mutex", .data = &mt8186_mutex_driver_data },
1039 	{ .compatible = "mediatek,mt8186-mdp3-mutex", .data = &mt8186_mdp_mutex_driver_data },
1040 	{ .compatible = "mediatek,mt8188-disp-mutex", .data = &mt8188_mutex_driver_data },
1041 	{ .compatible = "mediatek,mt8192-disp-mutex", .data = &mt8192_mutex_driver_data },
1042 	{ .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data },
1043 	{ .compatible = "mediatek,mt8195-vpp-mutex",  .data = &mt8195_vpp_mutex_driver_data },
1044 	{ .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data },
1052 		.name	= "mediatek-mutex",