71 static int pm8xxx_rtc_read_nvmem_offset(struct pm8xxx_rtc *rtc_dd)  in pm8xxx_rtc_read_nvmem_offset()  argument
77 	buf = nvmem_cell_read(rtc_dd->nvmem_cell, &len);  in pm8xxx_rtc_read_nvmem_offset()
80 		dev_dbg(rtc_dd->dev, "failed to read nvmem offset: %d\n", rc);  in pm8xxx_rtc_read_nvmem_offset()
85 		dev_dbg(rtc_dd->dev, "unexpected nvmem cell size %zu\n", len);  in pm8xxx_rtc_read_nvmem_offset()
90 	rtc_dd->offset = get_unaligned_le32(buf);  in pm8xxx_rtc_read_nvmem_offset()
97 static int pm8xxx_rtc_write_nvmem_offset(struct pm8xxx_rtc *rtc_dd, u32 offset)  in pm8xxx_rtc_write_nvmem_offset()  argument
104 	rc = nvmem_cell_write(rtc_dd->nvmem_cell, buf, sizeof(buf));  in pm8xxx_rtc_write_nvmem_offset()
106 		dev_dbg(rtc_dd->dev, "failed to write nvmem offset: %d\n", rc);  in pm8xxx_rtc_write_nvmem_offset()
113 static int pm8xxx_rtc_read_offset(struct pm8xxx_rtc *rtc_dd)  in pm8xxx_rtc_read_offset()  argument
115 	if (!rtc_dd->nvmem_cell)  in pm8xxx_rtc_read_offset()
118 	return pm8xxx_rtc_read_nvmem_offset(rtc_dd);  in pm8xxx_rtc_read_offset()
121 static int pm8xxx_rtc_read_raw(struct pm8xxx_rtc *rtc_dd, u32 *secs)  in pm8xxx_rtc_read_raw()  argument
123 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_rtc_read_raw()
128 	rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));  in pm8xxx_rtc_read_raw()
136 	rc = regmap_read(rtc_dd->regmap, regs->read, &reg);  in pm8xxx_rtc_read_raw()
141 		rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value,  in pm8xxx_rtc_read_raw()
152 static int pm8xxx_rtc_update_offset(struct pm8xxx_rtc *rtc_dd, u32 secs)  in pm8xxx_rtc_update_offset()  argument
158 	if (!rtc_dd->nvmem_cell)  in pm8xxx_rtc_update_offset()
161 	rc = pm8xxx_rtc_read_raw(rtc_dd, &raw_secs);  in pm8xxx_rtc_update_offset()
167 	if (offset == rtc_dd->offset)  in pm8xxx_rtc_update_offset()
170 	rc = pm8xxx_rtc_write_nvmem_offset(rtc_dd, offset);  in pm8xxx_rtc_update_offset()
174 	rtc_dd->offset = offset;  in pm8xxx_rtc_update_offset()
188 static int __pm8xxx_rtc_set_time(struct pm8xxx_rtc *rtc_dd, u32 secs)  in __pm8xxx_rtc_set_time()  argument
190 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in __pm8xxx_rtc_set_time()
197 	rc = regmap_update_bits_check(rtc_dd->regmap, regs->alarm_ctrl,  in __pm8xxx_rtc_set_time()
203 	rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE, 0);  in __pm8xxx_rtc_set_time()
208 	rc = regmap_write(rtc_dd->regmap, regs->write, 0);  in __pm8xxx_rtc_set_time()
213 	rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,  in __pm8xxx_rtc_set_time()
219 	rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);  in __pm8xxx_rtc_set_time()
224 	rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,  in __pm8xxx_rtc_set_time()
230 		rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,  in __pm8xxx_rtc_set_time()
241 	struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);  in pm8xxx_rtc_set_time()  local
247 	if (rtc_dd->allow_set_time)  in pm8xxx_rtc_set_time()
248 		rc = __pm8xxx_rtc_set_time(rtc_dd, secs);  in pm8xxx_rtc_set_time()
250 		rc = pm8xxx_rtc_update_offset(rtc_dd, secs);  in pm8xxx_rtc_set_time()
256 			secs - rtc_dd->offset, rtc_dd->offset);  in pm8xxx_rtc_set_time()
262 	struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);  in pm8xxx_rtc_read_time()  local
266 	rc = pm8xxx_rtc_read_raw(rtc_dd, &secs);  in pm8xxx_rtc_read_time()
270 	secs += rtc_dd->offset;  in pm8xxx_rtc_read_time()
274 			secs - rtc_dd->offset, rtc_dd->offset);  in pm8xxx_rtc_read_time()
280 	struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);  in pm8xxx_rtc_set_alarm()  local
281 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_rtc_set_alarm()
287 	secs -= rtc_dd->offset;  in pm8xxx_rtc_set_alarm()
290 	rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,  in pm8xxx_rtc_set_alarm()
295 	rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,  in pm8xxx_rtc_set_alarm()
301 		rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,  in pm8xxx_rtc_set_alarm()
314 	struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);  in pm8xxx_rtc_read_alarm()  local
315 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_rtc_read_alarm()
321 	rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,  in pm8xxx_rtc_read_alarm()
327 	secs += rtc_dd->offset;  in pm8xxx_rtc_read_alarm()
330 	rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);  in pm8xxx_rtc_read_alarm()
343 	struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);  in pm8xxx_rtc_alarm_irq_enable()  local
344 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_rtc_alarm_irq_enable()
354 	rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,  in pm8xxx_rtc_alarm_irq_enable()
361 		rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,  in pm8xxx_rtc_alarm_irq_enable()
380 	struct pm8xxx_rtc *rtc_dd = dev_id;  in pm8xxx_alarm_trigger()  local
381 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_alarm_trigger()
384 	rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);  in pm8xxx_alarm_trigger()
387 	rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,  in pm8xxx_alarm_trigger()
393 	rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl2,  in pm8xxx_alarm_trigger()
401 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)  in pm8xxx_rtc_enable()  argument
403 	const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;  in pm8xxx_rtc_enable()
405 	return regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,  in pm8xxx_rtc_enable()
461 	struct pm8xxx_rtc *rtc_dd;  in pm8xxx_rtc_probe()  local
468 	rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);  in pm8xxx_rtc_probe()
469 	if (rtc_dd == NULL)  in pm8xxx_rtc_probe()
472 	rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);  in pm8xxx_rtc_probe()
473 	if (!rtc_dd->regmap)  in pm8xxx_rtc_probe()
476 	rtc_dd->alarm_irq = platform_get_irq(pdev, 0);  in pm8xxx_rtc_probe()
477 	if (rtc_dd->alarm_irq < 0)  in pm8xxx_rtc_probe()
480 	rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,  in pm8xxx_rtc_probe()
483 	rtc_dd->nvmem_cell = devm_nvmem_cell_get(&pdev->dev, "offset");  in pm8xxx_rtc_probe()
484 	if (IS_ERR(rtc_dd->nvmem_cell)) {  in pm8xxx_rtc_probe()
485 		rc = PTR_ERR(rtc_dd->nvmem_cell);  in pm8xxx_rtc_probe()
488 		rtc_dd->nvmem_cell = NULL;  in pm8xxx_rtc_probe()
491 	rtc_dd->regs = match->data;  in pm8xxx_rtc_probe()
492 	rtc_dd->dev = &pdev->dev;  in pm8xxx_rtc_probe()
494 	if (!rtc_dd->allow_set_time) {  in pm8xxx_rtc_probe()
495 		rc = pm8xxx_rtc_read_offset(rtc_dd);  in pm8xxx_rtc_probe()
500 	rc = pm8xxx_rtc_enable(rtc_dd);  in pm8xxx_rtc_probe()
504 	platform_set_drvdata(pdev, rtc_dd);  in pm8xxx_rtc_probe()
508 	rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);  in pm8xxx_rtc_probe()
509 	if (IS_ERR(rtc_dd->rtc))  in pm8xxx_rtc_probe()
510 		return PTR_ERR(rtc_dd->rtc);  in pm8xxx_rtc_probe()
512 	rtc_dd->rtc->ops = &pm8xxx_rtc_ops;  in pm8xxx_rtc_probe()
513 	rtc_dd->rtc->range_max = U32_MAX;  in pm8xxx_rtc_probe()
515 	rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->alarm_irq,  in pm8xxx_rtc_probe()
518 					  "pm8xxx_rtc_alarm", rtc_dd);  in pm8xxx_rtc_probe()
522 	rc = devm_rtc_register_device(rtc_dd->rtc);  in pm8xxx_rtc_probe()
526 	rc = dev_pm_set_wake_irq(&pdev->dev, rtc_dd->alarm_irq);  in pm8xxx_rtc_probe()