Lines Matching refs:tcsr1
94 static bool xilinx_timer_pwm_enabled(u32 tcsr0, u32 tcsr1) in xilinx_timer_pwm_enabled() argument
97 (TCSR_PWM_MASK & tcsr1) == TCSR_PWM_SET; in xilinx_timer_pwm_enabled()
104 u32 tlr0, tlr1, tcsr0, tcsr1; in xilinx_pwm_apply() local
143 regmap_read(priv->map, TCSR1, &tcsr1); in xilinx_pwm_apply()
145 tlr1 = xilinx_timer_tlr_cycles(priv, tcsr1, duty_cycles); in xilinx_pwm_apply()
154 if (!xilinx_timer_pwm_enabled(tcsr0, tcsr1)) { in xilinx_pwm_apply()
157 regmap_write(priv->map, TCSR1, tcsr1 | TCSR_LOAD); in xilinx_pwm_apply()
160 tcsr1 = TCSR_PWM_SET | TCSR_ENALL | (tcsr1 & TCSR_UDT); in xilinx_pwm_apply()
162 regmap_write(priv->map, TCSR1, tcsr1); in xilinx_pwm_apply()
177 u32 tlr0, tlr1, tcsr0, tcsr1; in xilinx_pwm_get_state() local
182 regmap_read(priv->map, TCSR1, &tcsr1); in xilinx_pwm_get_state()
184 state->duty_cycle = xilinx_timer_get_period(priv, tlr1, tcsr1); in xilinx_pwm_get_state()
185 state->enabled = xilinx_timer_pwm_enabled(tcsr0, tcsr1); in xilinx_pwm_get_state()