1 // SPDX-License-Identifier: GPL-2.0
18 #include <linux/pwm.h>
22 /* PWM registers and bits definitions */
44  * struct pwm_mediatek_chip - struct representing PWM chip
45  * @chip: linux PWM chip representation
46  * @regs: base address of PWM chip
48  * @clk_main: the clock used by PWM core
49  * @clk_pwms: the clock used by each PWM channel
77 				   struct pwm_device *pwm)  in pwm_mediatek_clk_enable()  argument
82 	ret = clk_prepare_enable(pc->clk_top);  in pwm_mediatek_clk_enable()
86 	ret = clk_prepare_enable(pc->clk_main);  in pwm_mediatek_clk_enable()
90 	ret = clk_prepare_enable(pc->clk_pwms[pwm->hwpwm]);  in pwm_mediatek_clk_enable()
97 	clk_disable_unprepare(pc->clk_main);  in pwm_mediatek_clk_enable()
99 	clk_disable_unprepare(pc->clk_top);  in pwm_mediatek_clk_enable()
105 				     struct pwm_device *pwm)  in pwm_mediatek_clk_disable()  argument
109 	clk_disable_unprepare(pc->clk_pwms[pwm->hwpwm]);  in pwm_mediatek_clk_disable()
110 	clk_disable_unprepare(pc->clk_main);  in pwm_mediatek_clk_disable()
111 	clk_disable_unprepare(pc->clk_top);  in pwm_mediatek_clk_disable()
118 	writel(value, chip->regs + chip->soc->reg_offset[num] + offset);  in pwm_mediatek_writel()
121 static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,  in pwm_mediatek_config()  argument
131 	ret = pwm_mediatek_clk_enable(chip, pwm);  in pwm_mediatek_config()
135 	clk_rate = clk_get_rate(pc->clk_pwms[pwm->hwpwm]);  in pwm_mediatek_config()
137 		return -EINVAL;  in pwm_mediatek_config()
140 	if (pc->soc->has_ck_26m_sel)  in pwm_mediatek_config()
141 		writel(0, pc->regs + PWM_CK_26M_SEL);  in pwm_mediatek_config()
156 		pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_config()
157 		dev_err(chip->dev, "period of %d ns not supported\n", period_ns);  in pwm_mediatek_config()
158 		return -EINVAL;  in pwm_mediatek_config()
161 	if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) {  in pwm_mediatek_config()
163 		 * PWM[4,5] has distinct offset for PWMDWIDTH and PWMTHRES  in pwm_mediatek_config()
171 	pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);  in pwm_mediatek_config()
172 	pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period);  in pwm_mediatek_config()
173 	pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty);  in pwm_mediatek_config()
175 	pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_config()
180 static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_mediatek_enable()  argument
186 	ret = pwm_mediatek_clk_enable(chip, pwm);  in pwm_mediatek_enable()
190 	value = readl(pc->regs);  in pwm_mediatek_enable()
191 	value |= BIT(pwm->hwpwm);  in pwm_mediatek_enable()
192 	writel(value, pc->regs);  in pwm_mediatek_enable()
197 static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm)  in pwm_mediatek_disable()  argument
202 	value = readl(pc->regs);  in pwm_mediatek_disable()
203 	value &= ~BIT(pwm->hwpwm);  in pwm_mediatek_disable()
204 	writel(value, pc->regs);  in pwm_mediatek_disable()
206 	pwm_mediatek_clk_disable(chip, pwm);  in pwm_mediatek_disable()
209 static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm,  in pwm_mediatek_apply()  argument
214 	if (state->polarity != PWM_POLARITY_NORMAL)  in pwm_mediatek_apply()
215 		return -EINVAL;  in pwm_mediatek_apply()
217 	if (!state->enabled) {  in pwm_mediatek_apply()
218 		if (pwm->state.enabled)  in pwm_mediatek_apply()
219 			pwm_mediatek_disable(chip, pwm);  in pwm_mediatek_apply()
224 	err = pwm_mediatek_config(pwm->chip, pwm, state->duty_cycle, state->period);  in pwm_mediatek_apply()
228 	if (!pwm->state.enabled)  in pwm_mediatek_apply()
229 		err = pwm_mediatek_enable(chip, pwm);  in pwm_mediatek_apply()
245 	pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);  in pwm_mediatek_probe()
247 		return -ENOMEM;  in pwm_mediatek_probe()
249 	pc->soc = of_device_get_match_data(&pdev->dev);  in pwm_mediatek_probe()
251 	pc->regs = devm_platform_ioremap_resource(pdev, 0);  in pwm_mediatek_probe()
252 	if (IS_ERR(pc->regs))  in pwm_mediatek_probe()
253 		return PTR_ERR(pc->regs);  in pwm_mediatek_probe()
255 	pc->clk_pwms = devm_kmalloc_array(&pdev->dev, pc->soc->num_pwms,  in pwm_mediatek_probe()
256 				    sizeof(*pc->clk_pwms), GFP_KERNEL);  in pwm_mediatek_probe()
257 	if (!pc->clk_pwms)  in pwm_mediatek_probe()
258 		return -ENOMEM;  in pwm_mediatek_probe()
260 	pc->clk_top = devm_clk_get(&pdev->dev, "top");  in pwm_mediatek_probe()
261 	if (IS_ERR(pc->clk_top))  in pwm_mediatek_probe()
262 		return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_top),  in pwm_mediatek_probe()
265 	pc->clk_main = devm_clk_get(&pdev->dev, "main");  in pwm_mediatek_probe()
266 	if (IS_ERR(pc->clk_main))  in pwm_mediatek_probe()
267 		return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_main),  in pwm_mediatek_probe()
270 	for (i = 0; i < pc->soc->num_pwms; i++) {  in pwm_mediatek_probe()
273 		snprintf(name, sizeof(name), "pwm%d", i + 1);  in pwm_mediatek_probe()
275 		pc->clk_pwms[i] = devm_clk_get(&pdev->dev, name);  in pwm_mediatek_probe()
276 		if (IS_ERR(pc->clk_pwms[i]))  in pwm_mediatek_probe()
277 			return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_pwms[i]),  in pwm_mediatek_probe()
281 	pc->chip.dev = &pdev->dev;  in pwm_mediatek_probe()
282 	pc->chip.ops = &pwm_mediatek_ops;  in pwm_mediatek_probe()
283 	pc->chip.npwm = pc->soc->num_pwms;  in pwm_mediatek_probe()
285 	ret = devm_pwmchip_add(&pdev->dev, &pc->chip);  in pwm_mediatek_probe()
287 		return dev_err_probe(&pdev->dev, ret, "pwmchip_add() failed\n");  in pwm_mediatek_probe()
370 	{ .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
371 	{ .compatible = "mediatek,mt6795-pwm", .data = &mt6795_pwm_data },
372 	{ .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
373 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
374 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
375 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
376 	{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
377 	{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
378 	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
379 	{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
380 	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
387 		.name = "pwm-mediatek",