Lines Matching +full:pps +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/platform_data/i2c-xiic.h>
16 #include <linux/platform_data/i2c-ocores.h>
24 #include <linux/nvmem-consumer.h>
317 struct ptp_ocp_ext_src *pps; member
403 (void *)((uintptr_t)(bp) + (map)->bp_offset); \
419 uintptr_t addr = (uintptr_t)(bp) + (res)->bp_offset; \
442 * 0: PPS (TS5)
459 --
463 * 12: Orolia PPS
518 /* Timestamp for PHC and/or PPS generator */
520 OCP_EXT_RESOURCE(pps),
616 .name = "xiic-i2c",
666 .modalias = "spi-nor",
698 u32 gpio; member
719 /* Timestamp associated with GNSS1 receiver PPS */
765 /* Timestamp associated with Internal PPS of the card */
767 OCP_EXT_RESOURCE(pps),
785 .modalias = "spi-nor",
794 .name = "ocores-i2c",
844 { .name = "PPS", .value = 3 },
916 return bp->sma_op->init(bp); in ptp_ocp_sma_init()
922 return bp->sma_op->get(bp, sma_nr); in ptp_ocp_sma_get()
928 return bp->sma_op->set_inputs(bp, sma_nr, val); in ptp_ocp_sma_set_inputs()
934 return bp->sma_op->set_output(bp, sma_nr, val); in ptp_ocp_sma_set_output()
959 return -EINVAL; in ptp_ocp_select_val_from_name()
972 count--; in ptp_ocp_select_table_show()
987 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_gettime_locked()
990 ctrl = ioread32(&bp->reg->ctrl); in __ptp_ocp_gettime_locked()
996 if (sts && bp->ts_window_adjust) { in __ptp_ocp_gettime_locked()
997 s64 ns = timespec64_to_ns(&sts->post_ts); in __ptp_ocp_gettime_locked()
999 sts->post_ts = ns_to_timespec64(ns - bp->ts_window_adjust); in __ptp_ocp_gettime_locked()
1002 time_ns = ioread32(&bp->reg->time_ns); in __ptp_ocp_gettime_locked()
1003 time_sec = ioread32(&bp->reg->time_sec); in __ptp_ocp_gettime_locked()
1005 ts->tv_sec = time_sec; in __ptp_ocp_gettime_locked()
1006 ts->tv_nsec = time_ns; in __ptp_ocp_gettime_locked()
1008 return ctrl & OCP_CTRL_READ_TIME_DONE ? 0 : -ETIMEDOUT; in __ptp_ocp_gettime_locked()
1019 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_gettimex()
1021 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_gettimex()
1032 time_ns = ts->tv_nsec; in __ptp_ocp_settime_locked()
1033 time_sec = ts->tv_sec; in __ptp_ocp_settime_locked()
1035 select = ioread32(&bp->reg->select); in __ptp_ocp_settime_locked()
1036 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_settime_locked()
1038 iowrite32(time_ns, &bp->reg->adjust_ns); in __ptp_ocp_settime_locked()
1039 iowrite32(time_sec, &bp->reg->adjust_sec); in __ptp_ocp_settime_locked()
1042 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_settime_locked()
1045 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_settime_locked()
1054 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_settime()
1056 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_settime()
1066 select = ioread32(&bp->reg->select); in __ptp_ocp_adjtime_locked()
1067 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_adjtime_locked()
1069 iowrite32(adj_val, &bp->reg->offset_ns); in __ptp_ocp_adjtime_locked()
1070 iowrite32(NSEC_PER_SEC, &bp->reg->offset_window_ns); in __ptp_ocp_adjtime_locked()
1073 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_adjtime_locked()
1076 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_adjtime_locked()
1086 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_adjtime_coarse()
1093 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_adjtime_coarse()
1103 if (delta_ns > NSEC_PER_SEC || -delta_ns > NSEC_PER_SEC) { in ptp_ocp_adjtime()
1109 adj_ns = sign ? -delta_ns : delta_ns; in ptp_ocp_adjtime()
1111 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_adjtime()
1113 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_adjtime()
1124 return -EOPNOTSUPP; in ptp_ocp_null_adjfine()
1136 return -EOPNOTSUPP; in ptp_ocp_null_adjphase()
1148 switch (rq->type) { in ptp_ocp_enable()
1151 switch (rq->extts.index) { in ptp_ocp_enable()
1153 ext = bp->ts0; in ptp_ocp_enable()
1156 ext = bp->ts1; in ptp_ocp_enable()
1159 ext = bp->ts2; in ptp_ocp_enable()
1162 ext = bp->ts3; in ptp_ocp_enable()
1165 ext = bp->ts4; in ptp_ocp_enable()
1168 ext = bp->pps; in ptp_ocp_enable()
1174 ext = bp->pps; in ptp_ocp_enable()
1177 switch (rq->perout.index) { in ptp_ocp_enable()
1179 /* This is a request for 1PPS on an output SMA. in ptp_ocp_enable()
1182 if (on && (rq->perout.period.sec != 1 || in ptp_ocp_enable()
1183 rq->perout.period.nsec != 0)) in ptp_ocp_enable()
1184 return -EINVAL; in ptp_ocp_enable()
1190 req = rq->perout.index - 1; in ptp_ocp_enable()
1191 ext = bp->signal_out[req]; in ptp_ocp_enable()
1192 err = ptp_ocp_signal_from_perout(bp, req, &rq->perout); in ptp_ocp_enable()
1199 return -EOPNOTSUPP; in ptp_ocp_enable()
1202 err = -ENXIO; in ptp_ocp_enable()
1204 err = ext->info->enable(ext, req, on); in ptp_ocp_enable()
1224 /* channel 0 is 1PPS from PHC. in ptp_ocp_verify()
1233 return -EOPNOTSUPP; in ptp_ocp_verify()
1251 .pps = true,
1261 select = ioread32(&bp->reg->select); in __ptp_ocp_clear_drift_locked()
1262 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_clear_drift_locked()
1264 iowrite32(0, &bp->reg->drift_ns); in __ptp_ocp_clear_drift_locked()
1267 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_clear_drift_locked()
1270 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_clear_drift_locked()
1278 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_utc_distribute()
1280 bp->utc_tai_offset = val; in ptp_ocp_utc_distribute()
1282 if (bp->irig_out) in ptp_ocp_utc_distribute()
1283 iowrite32(val, &bp->irig_out->adj_sec); in ptp_ocp_utc_distribute()
1284 if (bp->dcf_out) in ptp_ocp_utc_distribute()
1285 iowrite32(val, &bp->dcf_out->adj_sec); in ptp_ocp_utc_distribute()
1286 if (bp->nmea_out) in ptp_ocp_utc_distribute()
1287 iowrite32(val, &bp->nmea_out->adj_sec); in ptp_ocp_utc_distribute()
1289 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_utc_distribute()
1299 status = ioread32(&bp->pps_to_clk->status); in ptp_ocp_watchdog()
1302 iowrite32(status, &bp->pps_to_clk->status); in ptp_ocp_watchdog()
1303 if (!bp->gnss_lost) { in ptp_ocp_watchdog()
1304 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_watchdog()
1306 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_watchdog()
1307 bp->gnss_lost = ktime_get_real_seconds(); in ptp_ocp_watchdog()
1310 } else if (bp->gnss_lost) { in ptp_ocp_watchdog()
1311 bp->gnss_lost = 0; in ptp_ocp_watchdog()
1317 if (bp->tod) { in ptp_ocp_watchdog()
1318 status = ioread32(&bp->tod->utc_status); in ptp_ocp_watchdog()
1321 utc_offset != bp->utc_tai_offset) in ptp_ocp_watchdog()
1325 mod_timer(&bp->watchdog, jiffies + HZ); in ptp_ocp_watchdog()
1335 ctrl = ioread32(&bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1338 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1342 ctrl = ioread32(&bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1346 delay = end - start; in ptp_ocp_estimate_pci_timing()
1347 bp->ts_window_adjust = (delay >> 5) * 3; in ptp_ocp_estimate_pci_timing()
1358 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_init_clock()
1362 iowrite32(0x2000, &bp->reg->servo_offset_p); in ptp_ocp_init_clock()
1363 iowrite32(0x1000, &bp->reg->servo_offset_i); in ptp_ocp_init_clock()
1364 iowrite32(0, &bp->reg->servo_drift_p); in ptp_ocp_init_clock()
1365 iowrite32(0, &bp->reg->servo_drift_i); in ptp_ocp_init_clock()
1369 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_init_clock()
1371 if ((ioread32(&bp->reg->ctrl) & OCP_CTRL_ENABLE) == 0) { in ptp_ocp_init_clock()
1372 dev_err(&bp->pdev->dev, "clock not enabled\n"); in ptp_ocp_init_clock()
1373 return -ENODEV; in ptp_ocp_init_clock()
1378 sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; in ptp_ocp_init_clock()
1381 ptp_ocp_settime(&bp->ptp_info, &ts); in ptp_ocp_init_clock()
1385 if (bp->pps_to_clk) { in ptp_ocp_init_clock()
1386 timer_setup(&bp->watchdog, ptp_ocp_watchdog, 0); in ptp_ocp_init_clock()
1387 mod_timer(&bp->watchdog, jiffies + HZ); in ptp_ocp_init_clock()
1398 ctrl = ioread32(&bp->tod->ctrl); in ptp_ocp_tod_init()
1401 iowrite32(ctrl, &bp->tod->ctrl); in ptp_ocp_tod_init()
1403 reg = ioread32(&bp->tod->utc_status); in ptp_ocp_tod_init()
1426 idx = ARRAY_SIZE(gnss_name) - 1; in ptp_ocp_tod_gnss_name()
1440 dev = dev->parent; in ptp_ocp_nvmem_match()
1441 if (!i2c_verify_client(dev) || info->tag != dev->platform_data) in ptp_ocp_nvmem_match()
1444 while ((dev = dev->parent)) in ptp_ocp_nvmem_match()
1445 if (dev->driver && !strcmp(dev->driver->name, KBUILD_MODNAME)) in ptp_ocp_nvmem_match()
1446 return info->bp == dev_get_drvdata(dev); in ptp_ocp_nvmem_match()
1474 if (!bp->i2c_ctrl) in ptp_ocp_read_eeprom()
1480 for (map = bp->eeprom_map; map->len; map++) { in ptp_ocp_read_eeprom()
1481 if (map->tag != tag) { in ptp_ocp_read_eeprom()
1482 tag = map->tag; in ptp_ocp_read_eeprom()
1492 ret = nvmem_device_read(nvmem, map->off, map->len, in ptp_ocp_read_eeprom()
1494 if (ret != map->len) in ptp_ocp_read_eeprom()
1498 bp->has_eeprom_data = true; in ptp_ocp_read_eeprom()
1505 dev_err(&bp->pdev->dev, "could not read eeprom: %d\n", ret); in ptp_ocp_read_eeprom()
1515 dev = &bp->spi_flash->dev; in ptp_ocp_find_flash()
1537 hdr = (const struct ptp_ocp_firmware_header *)fw->data; in ptp_ocp_devlink_fw_image()
1538 if (memcmp(hdr->magic, OCP_FIRMWARE_MAGIC_HEADER, 4)) { in ptp_ocp_devlink_fw_image()
1542 return -EINVAL; in ptp_ocp_devlink_fw_image()
1545 if (be16_to_cpu(hdr->pci_vendor_id) != bp->pdev->vendor || in ptp_ocp_devlink_fw_image()
1546 be16_to_cpu(hdr->pci_device_id) != bp->pdev->device) { in ptp_ocp_devlink_fw_image()
1550 return -EINVAL; in ptp_ocp_devlink_fw_image()
1554 length = be32_to_cpu(hdr->image_size); in ptp_ocp_devlink_fw_image()
1555 if (length != (fw->size - offset)) { in ptp_ocp_devlink_fw_image()
1559 return -EINVAL; in ptp_ocp_devlink_fw_image()
1562 crc = crc16(0xffff, &fw->data[offset], length); in ptp_ocp_devlink_fw_image()
1563 if (be16_to_cpu(hdr->crc) != crc) { in ptp_ocp_devlink_fw_image()
1567 return -EINVAL; in ptp_ocp_devlink_fw_image()
1570 *data = &fw->data[offset]; in ptp_ocp_devlink_fw_image()
1593 base = bp->flash_start; in ptp_ocp_devlink_flash()
1614 resid -= len; in ptp_ocp_devlink_flash()
1632 dev_err(&bp->pdev->dev, "Can't find Flash SPI adapter\n"); in ptp_ocp_devlink_flash_update()
1633 return -ENODEV; in ptp_ocp_devlink_flash_update()
1639 err = ptp_ocp_devlink_flash(devlink, dev, params->fw); in ptp_ocp_devlink_flash_update()
1657 fw_image = bp->fw_loader ? "loader" : "fw"; in ptp_ocp_devlink_info_get()
1658 sprintf(buf, "%d.%d", bp->fw_tag, bp->fw_version); in ptp_ocp_devlink_info_get()
1663 if (!bp->has_eeprom_data) { in ptp_ocp_devlink_info_get()
1665 if (!bp->has_eeprom_data) in ptp_ocp_devlink_info_get()
1669 sprintf(buf, "%pM", bp->serial); in ptp_ocp_devlink_info_get()
1676 bp->board_id); in ptp_ocp_devlink_info_get()
1693 return devm_ioremap_resource(&bp->pdev->dev, &res); in __ptp_ocp_get_mem()
1701 start = pci_resource_start(bp->pdev, 0) + r->offset; in ptp_ocp_get_mem()
1702 return __ptp_ocp_get_mem(bp, start, r->size); in ptp_ocp_get_mem()
1723 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_spi()
1729 start = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_register_spi()
1730 ptp_ocp_set_mem_resource(&res[0], start, r->size); in ptp_ocp_register_spi()
1731 ptp_ocp_set_irq_resource(&res[1], pci_irq_vector(pdev, r->irq_vec)); in ptp_ocp_register_spi()
1733 info = r->extra; in ptp_ocp_register_spi()
1735 id += info->pci_offset; in ptp_ocp_register_spi()
1737 p = platform_device_register_resndata(&pdev->dev, info->name, id, in ptp_ocp_register_spi()
1738 res, 2, info->data, in ptp_ocp_register_spi()
1739 info->data_size); in ptp_ocp_register_spi()
1755 info = r->extra; in ptp_ocp_i2c_bus()
1756 start = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_i2c_bus()
1757 ptp_ocp_set_mem_resource(&res[0], start, r->size); in ptp_ocp_i2c_bus()
1758 ptp_ocp_set_irq_resource(&res[1], pci_irq_vector(pdev, r->irq_vec)); in ptp_ocp_i2c_bus()
1760 return platform_device_register_resndata(&pdev->dev, info->name, in ptp_ocp_i2c_bus()
1762 info->data, info->data_size); in ptp_ocp_i2c_bus()
1768 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_i2c()
1775 info = r->extra; in ptp_ocp_register_i2c()
1776 id = pci_dev_id(bp->pdev); in ptp_ocp_register_i2c()
1779 clk = clk_hw_register_fixed_rate(&pdev->dev, buf, NULL, 0, in ptp_ocp_register_i2c()
1780 info->fixed_rate); in ptp_ocp_register_i2c()
1783 bp->i2c_clk = clk; in ptp_ocp_register_i2c()
1785 sprintf(buf, "%s.%d", info->name, id); in ptp_ocp_register_i2c()
1786 devm_clk_hw_register_clkdev(&pdev->dev, clk, NULL, buf); in ptp_ocp_register_i2c()
1787 p = ptp_ocp_i2c_bus(bp->pdev, r, id); in ptp_ocp_register_i2c()
1801 struct signal_reg __iomem *reg = ext->mem; in ptp_ocp_signal_irq()
1802 struct ptp_ocp *bp = ext->bp; in ptp_ocp_signal_irq()
1806 gen = ext->info->index - 1; in ptp_ocp_signal_irq()
1808 enable = ioread32(®->enable); in ptp_ocp_signal_irq()
1809 status = ioread32(®->status); in ptp_ocp_signal_irq()
1813 iowrite32(0, ®->intr_mask); in ptp_ocp_signal_irq()
1814 iowrite32(0, ®->enable); in ptp_ocp_signal_irq()
1815 bp->signal[gen].running = false; in ptp_ocp_signal_irq()
1818 iowrite32(0, ®->intr); /* ack interrupt */ in ptp_ocp_signal_irq()
1831 if (!s->period) in ptp_ocp_signal_set()
1834 if (!s->pulse) in ptp_ocp_signal_set()
1835 s->pulse = ktime_divns(s->period * s->duty, 100); in ptp_ocp_signal_set()
1837 err = ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts); in ptp_ocp_signal_set()
1842 if (!s->start) { in ptp_ocp_signal_set()
1843 /* roundup() does not work on 32-bit systems */ in ptp_ocp_signal_set()
1844 s->start = DIV64_U64_ROUND_UP(start_ns, s->period); in ptp_ocp_signal_set()
1845 s->start *= s->period; in ptp_ocp_signal_set()
1846 s->start = ktime_add(s->start, s->phase); in ptp_ocp_signal_set()
1849 if (s->duty < 1 || s->duty > 99) in ptp_ocp_signal_set()
1850 return -EINVAL; in ptp_ocp_signal_set()
1852 if (s->pulse < 1 || s->pulse > s->period) in ptp_ocp_signal_set()
1853 return -EINVAL; in ptp_ocp_signal_set()
1855 if (s->start < start_ns) in ptp_ocp_signal_set()
1856 return -EINVAL; in ptp_ocp_signal_set()
1858 bp->signal[gen] = *s; in ptp_ocp_signal_set()
1869 s.polarity = bp->signal[gen].polarity; in ptp_ocp_signal_from_perout()
1870 s.period = ktime_set(req->period.sec, req->period.nsec); in ptp_ocp_signal_from_perout()
1874 if (req->flags & PTP_PEROUT_DUTY_CYCLE) { in ptp_ocp_signal_from_perout()
1875 s.pulse = ktime_set(req->on.sec, req->on.nsec); in ptp_ocp_signal_from_perout()
1879 if (req->flags & PTP_PEROUT_PHASE) in ptp_ocp_signal_from_perout()
1880 s.phase = ktime_set(req->phase.sec, req->phase.nsec); in ptp_ocp_signal_from_perout()
1882 s.start = ktime_set(req->start.sec, req->start.nsec); in ptp_ocp_signal_from_perout()
1891 struct signal_reg __iomem *reg = ext->mem; in ptp_ocp_signal_enable()
1892 struct ptp_ocp *bp = ext->bp; in ptp_ocp_signal_enable()
1896 gen = ext->info->index - 1; in ptp_ocp_signal_enable()
1898 iowrite32(0, ®->intr_mask); in ptp_ocp_signal_enable()
1899 iowrite32(0, ®->enable); in ptp_ocp_signal_enable()
1900 bp->signal[gen].running = false; in ptp_ocp_signal_enable()
1904 ts = ktime_to_timespec64(bp->signal[gen].start); in ptp_ocp_signal_enable()
1905 iowrite32(ts.tv_sec, ®->start_sec); in ptp_ocp_signal_enable()
1906 iowrite32(ts.tv_nsec, ®->start_ns); in ptp_ocp_signal_enable()
1908 ts = ktime_to_timespec64(bp->signal[gen].period); in ptp_ocp_signal_enable()
1909 iowrite32(ts.tv_sec, ®->period_sec); in ptp_ocp_signal_enable()
1910 iowrite32(ts.tv_nsec, ®->period_ns); in ptp_ocp_signal_enable()
1912 ts = ktime_to_timespec64(bp->signal[gen].pulse); in ptp_ocp_signal_enable()
1913 iowrite32(ts.tv_sec, ®->pulse_sec); in ptp_ocp_signal_enable()
1914 iowrite32(ts.tv_nsec, ®->pulse_ns); in ptp_ocp_signal_enable()
1916 iowrite32(bp->signal[gen].polarity, ®->polarity); in ptp_ocp_signal_enable()
1917 iowrite32(0, ®->repeat_count); in ptp_ocp_signal_enable()
1919 iowrite32(0, ®->intr); /* clear interrupt state */ in ptp_ocp_signal_enable()
1920 iowrite32(1, ®->intr_mask); /* enable interrupt */ in ptp_ocp_signal_enable()
1921 iowrite32(3, ®->enable); /* valid & enable */ in ptp_ocp_signal_enable()
1923 bp->signal[gen].running = true; in ptp_ocp_signal_enable()
1932 struct ts_reg __iomem *reg = ext->mem; in ptp_ocp_ts_irq()
1936 if (ext == ext->bp->pps) { in ptp_ocp_ts_irq()
1937 if (ext->bp->pps_req_map & OCP_REQ_PPS) { in ptp_ocp_ts_irq()
1939 ptp_clock_event(ext->bp->ptp, &ev); in ptp_ocp_ts_irq()
1942 if ((ext->bp->pps_req_map & ~OCP_REQ_PPS) == 0) in ptp_ocp_ts_irq()
1946 /* XXX should fix API - this converts s/ns -> ts -> s/ns */ in ptp_ocp_ts_irq()
1947 sec = ioread32(®->time_sec); in ptp_ocp_ts_irq()
1948 nsec = ioread32(®->time_ns); in ptp_ocp_ts_irq()
1951 ev.index = ext->info->index; in ptp_ocp_ts_irq()
1954 ptp_clock_event(ext->bp->ptp, &ev); in ptp_ocp_ts_irq()
1957 iowrite32(1, ®->intr); /* write 1 to ack */ in ptp_ocp_ts_irq()
1966 struct ts_reg __iomem *reg = ext->mem; in ptp_ocp_ts_enable()
1967 struct ptp_ocp *bp = ext->bp; in ptp_ocp_ts_enable()
1969 if (ext == bp->pps) { in ptp_ocp_ts_enable()
1970 u32 old_map = bp->pps_req_map; in ptp_ocp_ts_enable()
1973 bp->pps_req_map |= req; in ptp_ocp_ts_enable()
1975 bp->pps_req_map &= ~req; in ptp_ocp_ts_enable()
1978 if ((!!old_map ^ !!bp->pps_req_map) == 0) in ptp_ocp_ts_enable()
1983 iowrite32(1, ®->enable); in ptp_ocp_ts_enable()
1984 iowrite32(1, ®->intr_mask); in ptp_ocp_ts_enable()
1985 iowrite32(1, ®->intr); in ptp_ocp_ts_enable()
1987 iowrite32(0, ®->intr_mask); in ptp_ocp_ts_enable()
1988 iowrite32(0, ®->enable); in ptp_ocp_ts_enable()
1997 ext->info->enable(ext, ~0, false); in ptp_ocp_unregister_ext()
1998 pci_free_irq(ext->bp->pdev, ext->irq_vec, ext); in ptp_ocp_unregister_ext()
2005 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_ext()
2011 return -ENOMEM; in ptp_ocp_register_ext()
2013 ext->mem = ptp_ocp_get_mem(bp, r); in ptp_ocp_register_ext()
2014 if (IS_ERR(ext->mem)) { in ptp_ocp_register_ext()
2015 err = PTR_ERR(ext->mem); in ptp_ocp_register_ext()
2019 ext->bp = bp; in ptp_ocp_register_ext()
2020 ext->info = r->extra; in ptp_ocp_register_ext()
2021 ext->irq_vec = r->irq_vec; in ptp_ocp_register_ext()
2023 err = pci_request_irq(pdev, r->irq_vec, ext->info->irq_fcn, NULL, in ptp_ocp_register_ext()
2024 ext, "ocp%d.%s", bp->id, r->name); in ptp_ocp_register_ext()
2026 dev_err(&pdev->dev, "Could not get irq %d\n", r->irq_vec); in ptp_ocp_register_ext()
2042 struct pci_dev *pdev = bp->pdev; in ptp_ocp_serial_line()
2049 uart.port.dev = &pdev->dev; in ptp_ocp_serial_line()
2052 uart.port.mapbase = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_serial_line()
2053 uart.port.irq = pci_irq_vector(pdev, r->irq_vec); in ptp_ocp_serial_line()
2064 struct ptp_ocp_serial_port *p = (struct ptp_ocp_serial_port *)r->extra; in ptp_ocp_register_serial()
2072 port.baud = p->baud; in ptp_ocp_register_serial()
2096 if (!bp->nmea_out) in ptp_ocp_nmea_out_init()
2099 iowrite32(0, &bp->nmea_out->ctrl); /* disable */ in ptp_ocp_nmea_out_init()
2100 iowrite32(7, &bp->nmea_out->uart_baud); /* 115200 */ in ptp_ocp_nmea_out_init()
2101 iowrite32(1, &bp->nmea_out->ctrl); /* enable */ in ptp_ocp_nmea_out_init()
2109 iowrite32(0, ®->enable); /* disable */ in _ptp_ocp_signal_init()
2111 val = ioread32(®->polarity); in _ptp_ocp_signal_init()
2112 s->polarity = val ? true : false; in _ptp_ocp_signal_init()
2113 s->duty = 50; in _ptp_ocp_signal_init()
2122 if (bp->signal_out[i]) in ptp_ocp_signal_init()
2123 _ptp_ocp_signal_init(&bp->signal[i], in ptp_ocp_signal_init()
2124 bp->signal_out[i]->mem); in ptp_ocp_signal_init()
2130 sysfs_remove_groups(&bp->dev.kobj, bp->attr_group); in ptp_ocp_attr_group_del()
2131 kfree(bp->attr_group); in ptp_ocp_attr_group_del()
2143 if (attr_tbl[i].cap & bp->fw_cap) in ptp_ocp_attr_group_add()
2146 bp->attr_group = kcalloc(count + 1, sizeof(struct attribute_group *), in ptp_ocp_attr_group_add()
2148 if (!bp->attr_group) in ptp_ocp_attr_group_add()
2149 return -ENOMEM; in ptp_ocp_attr_group_add()
2153 if (attr_tbl[i].cap & bp->fw_cap) in ptp_ocp_attr_group_add()
2154 bp->attr_group[count++] = attr_tbl[i].group; in ptp_ocp_attr_group_add()
2156 err = sysfs_create_groups(&bp->dev.kobj, bp->attr_group); in ptp_ocp_attr_group_add()
2158 bp->attr_group[0] = NULL; in ptp_ocp_attr_group_add()
2181 return ptp_ocp_enable_fpga(&bp->irig_out->ctrl, in ptp_ocp_irig_out()
2188 return ptp_ocp_enable_fpga(&bp->irig_in->ctrl, in ptp_ocp_irig_in()
2195 return ptp_ocp_enable_fpga(&bp->dcf_out->ctrl, in ptp_ocp_dcf_out()
2202 return ptp_ocp_enable_fpga(&bp->dcf_in->ctrl, in ptp_ocp_dcf_in()
2223 u32 __iomem *gpio; in ptp_ocp_sma_fb_get() local
2226 if (bp->sma[sma_nr - 1].fixed_fcn) in ptp_ocp_sma_fb_get()
2227 return (sma_nr - 1) & 1; in ptp_ocp_sma_fb_get()
2229 if (bp->sma[sma_nr - 1].mode == SMA_MODE_IN) in ptp_ocp_sma_fb_get()
2230 gpio = sma_nr > 2 ? &bp->sma_map2->gpio1 : &bp->sma_map1->gpio1; in ptp_ocp_sma_fb_get()
2232 gpio = sma_nr > 2 ? &bp->sma_map1->gpio2 : &bp->sma_map2->gpio2; in ptp_ocp_sma_fb_get()
2235 return (ioread32(gpio) >> shift) & 0xffff; in ptp_ocp_sma_fb_get()
2243 u32 __iomem *gpio; in ptp_ocp_sma_fb_set_output() local
2245 gpio = sma_nr > 2 ? &bp->sma_map1->gpio2 : &bp->sma_map2->gpio2; in ptp_ocp_sma_fb_set_output()
2248 mask = 0xffff << (16 - shift); in ptp_ocp_sma_fb_set_output()
2250 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_fb_set_output()
2252 reg = ioread32(gpio); in ptp_ocp_sma_fb_set_output()
2257 iowrite32(reg, gpio); in ptp_ocp_sma_fb_set_output()
2259 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_fb_set_output()
2269 u32 __iomem *gpio; in ptp_ocp_sma_fb_set_inputs() local
2271 gpio = sma_nr > 2 ? &bp->sma_map2->gpio1 : &bp->sma_map1->gpio1; in ptp_ocp_sma_fb_set_inputs()
2274 mask = 0xffff << (16 - shift); in ptp_ocp_sma_fb_set_inputs()
2276 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_fb_set_inputs()
2278 reg = ioread32(gpio); in ptp_ocp_sma_fb_set_inputs()
2283 iowrite32(reg, gpio); in ptp_ocp_sma_fb_set_inputs()
2285 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_fb_set_inputs()
2297 bp->sma[0].mode = SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2298 bp->sma[1].mode = SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2299 bp->sma[2].mode = SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2300 bp->sma[3].mode = SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2302 bp->sma[i].default_fcn = i & 1; in ptp_ocp_sma_fb_init()
2305 if (!bp->sma_map1) { in ptp_ocp_sma_fb_init()
2307 bp->sma[i].fixed_fcn = true; in ptp_ocp_sma_fb_init()
2308 bp->sma[i].fixed_dir = true; in ptp_ocp_sma_fb_init()
2313 /* If SMA2 GPIO output map is all 1, it is not present. in ptp_ocp_sma_fb_init()
2316 reg = ioread32(&bp->sma_map2->gpio2); in ptp_ocp_sma_fb_init()
2319 bp->sma[i].fixed_dir = true; in ptp_ocp_sma_fb_init()
2321 reg = ioread32(&bp->sma_map1->gpio1); in ptp_ocp_sma_fb_init()
2322 bp->sma[0].mode = reg & BIT(15) ? SMA_MODE_IN : SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2323 bp->sma[1].mode = reg & BIT(31) ? SMA_MODE_IN : SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2325 reg = ioread32(&bp->sma_map1->gpio2); in ptp_ocp_sma_fb_init()
2326 bp->sma[2].mode = reg & BIT(15) ? SMA_MODE_OUT : SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2327 bp->sma[3].mode = reg & BIT(31) ? SMA_MODE_OUT : SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2347 return -ENOMEM; in ptp_ocp_fb_set_pins()
2354 bp->ptp_info.n_pins = 4; in ptp_ocp_fb_set_pins()
2355 bp->ptp_info.pin_config = config; in ptp_ocp_fb_set_pins()
2366 version = ioread32(&bp->image->version); in ptp_ocp_fb_set_version()
2371 bp->fw_loader = true; in ptp_ocp_fb_set_version()
2374 bp->fw_tag = version >> 15; in ptp_ocp_fb_set_version()
2375 bp->fw_version = version & 0x7fff; in ptp_ocp_fb_set_version()
2377 if (bp->fw_tag) { in ptp_ocp_fb_set_version()
2389 bp->fw_cap = cap; in ptp_ocp_fb_set_version()
2398 bp->flash_start = 1024 * 4096; in ptp_ocp_fb_board_init()
2399 bp->eeprom_map = fb_eeprom_map; in ptp_ocp_fb_board_init()
2400 bp->fw_version = ioread32(&bp->image->version); in ptp_ocp_fb_board_init()
2401 bp->sma_op = &ocp_fb_sma_op; in ptp_ocp_fb_board_init()
2424 bool allow = !r->irq_vec || r->irq_vec < bp->n_irqs; in ptp_ocp_allow_irq()
2427 dev_err(&bp->pdev->dev, "irq %d out of range, skipping %s\n", in ptp_ocp_allow_irq()
2428 r->irq_vec, r->name); in ptp_ocp_allow_irq()
2439 for (r = table; r->setup; r++) { in ptp_ocp_register_resources()
2442 err = r->setup(bp, r); in ptp_ocp_register_resources()
2444 dev_err(&bp->pdev->dev, in ptp_ocp_register_resources()
2446 r->name, err); in ptp_ocp_register_resources()
2460 bp->sma[0].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2461 bp->sma[1].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2462 bp->sma[2].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2463 bp->sma[3].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2465 bp->sma[0].default_fcn = 0x08; /* IN: 10Mhz */ in ptp_ocp_art_sma_init()
2466 bp->sma[1].default_fcn = 0x01; /* IN: PPS1 */ in ptp_ocp_art_sma_init()
2467 bp->sma[2].default_fcn = 0x10; /* OUT: 10Mhz */ in ptp_ocp_art_sma_init()
2468 bp->sma[3].default_fcn = 0x02; /* OUT: PHC */ in ptp_ocp_art_sma_init()
2471 if (!bp->art_sma) { in ptp_ocp_art_sma_init()
2473 bp->sma[i].fixed_fcn = true; in ptp_ocp_art_sma_init()
2474 bp->sma[i].fixed_dir = true; in ptp_ocp_art_sma_init()
2480 reg = ioread32(&bp->art_sma->map[i].gpio); in ptp_ocp_art_sma_init()
2484 bp->sma[i].fixed_fcn = true; in ptp_ocp_art_sma_init()
2485 bp->sma[i].fixed_dir = true; in ptp_ocp_art_sma_init()
2489 bp->sma[i].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2492 bp->sma[i].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2501 if (bp->sma[sma_nr - 1].fixed_fcn) in ptp_ocp_art_sma_get()
2502 return bp->sma[sma_nr - 1].default_fcn; in ptp_ocp_art_sma_get()
2504 return ioread32(&bp->art_sma->map[sma_nr - 1].gpio) & 0xff; in ptp_ocp_art_sma_get()
2512 u32 __iomem *gpio; in ptp_ocp_art_sma_set() local
2518 return -EINVAL; in ptp_ocp_art_sma_set()
2520 gpio = &bp->art_sma->map[sma_nr - 1].gpio; in ptp_ocp_art_sma_set()
2522 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_art_sma_set()
2523 reg = ioread32(gpio); in ptp_ocp_art_sma_set()
2525 err = -EOPNOTSUPP; in ptp_ocp_art_sma_set()
2528 iowrite32(reg, gpio); in ptp_ocp_art_sma_set()
2530 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_art_sma_set()
2549 bp->flash_start = 0x1000000; in ptp_ocp_art_board_init()
2550 bp->eeprom_map = art_eeprom_map; in ptp_ocp_art_board_init()
2551 bp->fw_cap = OCP_CAP_BASIC; in ptp_ocp_art_board_init()
2552 bp->fw_version = ioread32(&bp->reg->version); in ptp_ocp_art_board_init()
2553 bp->fw_tag = 2; in ptp_ocp_art_board_init()
2554 bp->sma_op = &ocp_art_sma_op; in ptp_ocp_art_board_init()
2557 iowrite32(1, &bp->board_config->mro50_serial_activate); in ptp_ocp_art_board_init()
2603 count--; in ptp_ocp_show_inputs()
2618 return -ENOMEM; in sma_parse_inputs()
2620 ret = -EINVAL; in sma_parse_inputs()
2640 ret = -EINVAL; in sma_parse_inputs()
2651 struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; in ptp_ocp_sma_show()
2655 tbl = bp->sma_op->tbl; in ptp_ocp_sma_show()
2658 if (sma->mode == SMA_MODE_IN) { in ptp_ocp_sma_show()
2659 if (sma->disabled) in ptp_ocp_sma_show()
2680 return ptp_ocp_sma_show(bp, 2, buf, -1, 1); in sma2_show()
2688 return ptp_ocp_sma_show(bp, 3, buf, -1, 0); in sma3_show()
2696 return ptp_ocp_sma_show(bp, 4, buf, -1, 1); in sma4_show()
2702 struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; in ptp_ocp_sma_store()
2706 mode = sma->mode; in ptp_ocp_sma_store()
2707 val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); in ptp_ocp_sma_store()
2711 if (sma->fixed_dir && (mode != sma->mode || val & SMA_DISABLE)) in ptp_ocp_sma_store()
2712 return -EOPNOTSUPP; in ptp_ocp_sma_store()
2714 if (sma->fixed_fcn) { in ptp_ocp_sma_store()
2715 if (val != sma->default_fcn) in ptp_ocp_sma_store()
2716 return -EOPNOTSUPP; in ptp_ocp_sma_store()
2720 sma->disabled = !!(val & SMA_DISABLE); in ptp_ocp_sma_store()
2722 if (mode != sma->mode) { in ptp_ocp_sma_store()
2727 sma->mode = mode; in ptp_ocp_sma_store()
2730 if (!sma->fixed_dir) in ptp_ocp_sma_store()
2733 if (sma->disabled) in ptp_ocp_sma_store()
2798 return ptp_ocp_select_table_show(bp->sma_op->tbl[0], buf); in available_sma_inputs_show()
2808 return ptp_ocp_select_table_show(bp->sma_op->tbl[1], buf); in available_sma_outputs_show()
2828 int gen = (uintptr_t)ea->var; in signal_store()
2834 return -ENOMEM; in signal_store()
2836 err = -EINVAL; in signal_store()
2837 s.duty = bp->signal[gen].duty; in signal_store()
2838 s.phase = bp->signal[gen].phase; in signal_store()
2839 s.period = bp->signal[gen].period; in signal_store()
2840 s.polarity = bp->signal[gen].polarity; in signal_store()
2844 argc--; in signal_store()
2850 argc--; in signal_store()
2856 argc--; in signal_store()
2862 argc--; in signal_store()
2875 err = ptp_ocp_signal_enable(bp->signal_out[gen], gen, s.period != 0); in signal_store()
2892 i = (uintptr_t)ea->var; in signal_show()
2893 signal = &bp->signal[i]; in signal_show()
2895 count = sysfs_emit(buf, "%llu %d %llu %d", signal->period, in signal_show()
2896 signal->duty, signal->phase, signal->polarity); in signal_show()
2898 ts = ktime_to_timespec64(signal->start); in signal_show()
2913 int i = (uintptr_t)ea->var; in duty_show()
2915 return sysfs_emit(buf, "%d\n", bp->signal[i].duty); in duty_show()
2927 int i = (uintptr_t)ea->var; in period_show()
2929 return sysfs_emit(buf, "%llu\n", bp->signal[i].period); in period_show()
2941 int i = (uintptr_t)ea->var; in phase_show()
2943 return sysfs_emit(buf, "%llu\n", bp->signal[i].phase); in phase_show()
2956 int i = (uintptr_t)ea->var; in polarity_show()
2958 return sysfs_emit(buf, "%d\n", bp->signal[i].polarity); in polarity_show()
2970 int i = (uintptr_t)ea->var; in running_show()
2972 return sysfs_emit(buf, "%d\n", bp->signal[i].running); in running_show()
2984 int i = (uintptr_t)ea->var; in start_show()
2987 ts = ktime_to_timespec64(bp->signal[i].start); in start_show()
3001 int idx = (uintptr_t)ea->var; in seconds_store()
3009 return -EINVAL; in seconds_store()
3014 iowrite32(val, &bp->freq_in[idx]->ctrl); in seconds_store()
3024 int idx = (uintptr_t)ea->var; in seconds_show()
3027 val = ioread32(&bp->freq_in[idx]->ctrl); in seconds_show()
3045 int idx = (uintptr_t)ea->var; in frequency_show()
3048 val = ioread32(&bp->freq_in[idx]->status); in frequency_show()
3067 if (!bp->has_eeprom_data) in serialnum_show()
3070 return sysfs_emit(buf, "%pM\n", bp->serial); in serialnum_show()
3080 if (bp->gnss_lost) in gnss_sync_show()
3081 ret = sysfs_emit(buf, "LOST @ %ptT\n", &bp->gnss_lost); in gnss_sync_show()
3095 return sysfs_emit(buf, "%d\n", bp->utc_tai_offset); in utc_tai_offset_show()
3123 return sysfs_emit(buf, "%d\n", bp->ts_window_adjust); in ts_window_adjust_show()
3139 bp->ts_window_adjust = val; in ts_window_adjust_store()
3151 val = ioread32(&bp->irig_out->ctrl); in irig_b_mode_show()
3171 return -EINVAL; in irig_b_mode_store()
3175 spin_lock_irqsave(&bp->lock, flags); in irig_b_mode_store()
3176 iowrite32(0, &bp->irig_out->ctrl); /* disable */ in irig_b_mode_store()
3177 iowrite32(reg, &bp->irig_out->ctrl); /* change mode */ in irig_b_mode_store()
3178 iowrite32(reg | IRIG_M_CTRL_ENABLE, &bp->irig_out->ctrl); in irig_b_mode_store()
3179 spin_unlock_irqrestore(&bp->lock, flags); in irig_b_mode_store()
3192 select = ioread32(&bp->reg->select); in clock_source_show()
3210 spin_lock_irqsave(&bp->lock, flags); in clock_source_store()
3211 iowrite32(val, &bp->reg->select); in clock_source_store()
3212 spin_unlock_irqrestore(&bp->lock, flags); in clock_source_store()
3234 val = ioread32(&bp->reg->status_drift); in clock_status_drift_show()
3235 res = (val & ~INT_MAX) ? -1 : 1; in clock_status_drift_show()
3249 val = ioread32(&bp->reg->status_offset); in clock_status_offset_show()
3250 res = (val & ~INT_MAX) ? -1 : 1; in clock_status_offset_show()
3264 val = ioread32(&bp->tod->adj_sec); in tod_correction_show()
3265 res = (val & ~INT_MAX) ? -1 : 1; in tod_correction_show()
3283 res *= -1; in tod_correction_store()
3288 spin_lock_irqsave(&bp->lock, flags); in tod_correction_store()
3289 iowrite32(val, &bp->tod->adj_sec); in tod_correction_store()
3290 spin_unlock_irqrestore(&bp->lock, flags); in tod_correction_store()
3361 count = size - off; in disciplining_config_read()
3366 err = -EFAULT; in disciplining_config_read()
3387 return -EFAULT; in disciplining_config_write()
3395 err = -EFAULT; in disciplining_config_write()
3423 count = size - off; in temperature_table_read()
3428 err = -EFAULT; in temperature_table_read()
3449 return -EFAULT; in temperature_table_write()
3457 err = -EFAULT; in temperature_table_write()
3540 if (bp->sma[i].mode != SMA_MODE_IN) in gpio_input_map()
3548 def = "----"; in gpio_input_map()
3558 strcpy(ans, "----"); in gpio_output_map()
3560 if (bp->sma[i].mode != SMA_MODE_OUT) in gpio_output_map()
3570 struct signal_reg __iomem *reg = bp->signal_out[nr]->mem; in _signal_summary_show()
3571 struct ptp_ocp_signal *signal = &bp->signal[nr]; in _signal_summary_show()
3579 on = signal->running; in _signal_summary_show()
3583 signal->period, signal->duty, signal->phase, in _signal_summary_show()
3584 signal->polarity); in _signal_summary_show()
3586 val = ioread32(®->enable); in _signal_summary_show()
3588 val = ioread32(®->status); in _signal_summary_show()
3591 seq_printf(s, " start:%llu\n", signal->start); in _signal_summary_show()
3606 val = ioread32(®->ctrl); in _frequency_summary_show()
3614 val = ioread32(®->status); in _frequency_summary_show()
3627 struct device *dev = s->private; in ptp_ocp_summary_show()
3640 return -ENOMEM; in ptp_ocp_summary_show()
3644 seq_printf(s, "%7s: /dev/ptp%d\n", "PTP", ptp_clock_index(bp->ptp)); in ptp_ocp_summary_show()
3645 if (bp->gnss_port.line != -1) in ptp_ocp_summary_show()
3647 bp->gnss_port.line); in ptp_ocp_summary_show()
3648 if (bp->gnss2_port.line != -1) in ptp_ocp_summary_show()
3650 bp->gnss2_port.line); in ptp_ocp_summary_show()
3651 if (bp->mac_port.line != -1) in ptp_ocp_summary_show()
3652 seq_printf(s, "%7s: /dev/ttyS%d\n", "MAC", bp->mac_port.line); in ptp_ocp_summary_show()
3653 if (bp->nmea_port.line != -1) in ptp_ocp_summary_show()
3654 seq_printf(s, "%7s: /dev/ttyS%d\n", "NMEA", bp->nmea_port.line); in ptp_ocp_summary_show()
3657 if (bp->sma_map1) { in ptp_ocp_summary_show()
3660 reg = ioread32(&bp->sma_map1->gpio1); in ptp_ocp_summary_show()
3664 reg = ioread32(&bp->sma_map1->gpio2); in ptp_ocp_summary_show()
3668 reg = ioread32(&bp->sma_map2->gpio1); in ptp_ocp_summary_show()
3672 reg = ioread32(&bp->sma_map2->gpio2); in ptp_ocp_summary_show()
3693 if (bp->ts0) { in ptp_ocp_summary_show()
3694 ts_reg = bp->ts0->mem; in ptp_ocp_summary_show()
3695 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3701 if (bp->ts1) { in ptp_ocp_summary_show()
3702 ts_reg = bp->ts1->mem; in ptp_ocp_summary_show()
3703 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3709 if (bp->ts2) { in ptp_ocp_summary_show()
3710 ts_reg = bp->ts2->mem; in ptp_ocp_summary_show()
3711 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3717 if (bp->ts3) { in ptp_ocp_summary_show()
3718 ts_reg = bp->ts3->mem; in ptp_ocp_summary_show()
3719 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3725 if (bp->ts4) { in ptp_ocp_summary_show()
3726 ts_reg = bp->ts4->mem; in ptp_ocp_summary_show()
3727 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3733 if (bp->pps) { in ptp_ocp_summary_show()
3734 ts_reg = bp->pps->mem; in ptp_ocp_summary_show()
3736 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
3737 map = !!(bp->pps_req_map & OCP_REQ_TIMESTAMP); in ptp_ocp_summary_show()
3741 map = !!(bp->pps_req_map & OCP_REQ_PPS); in ptp_ocp_summary_show()
3742 seq_printf(s, "%7s: %s, src: %s\n", "PPS", in ptp_ocp_summary_show()
3746 if (bp->fw_cap & OCP_CAP_SIGNAL) in ptp_ocp_summary_show()
3750 if (bp->fw_cap & OCP_CAP_FREQ) in ptp_ocp_summary_show()
3752 _frequency_summary_show(s, i, bp->freq_in[i]); in ptp_ocp_summary_show()
3754 if (bp->irig_out) { in ptp_ocp_summary_show()
3755 ctrl = ioread32(&bp->irig_out->ctrl); in ptp_ocp_summary_show()
3757 val = ioread32(&bp->irig_out->status); in ptp_ocp_summary_show()
3763 if (bp->irig_in) { in ptp_ocp_summary_show()
3764 on = ioread32(&bp->irig_in->ctrl) & IRIG_S_CTRL_ENABLE; in ptp_ocp_summary_show()
3765 val = ioread32(&bp->irig_in->status); in ptp_ocp_summary_show()
3771 if (bp->dcf_out) { in ptp_ocp_summary_show()
3772 on = ioread32(&bp->dcf_out->ctrl) & DCF_M_CTRL_ENABLE; in ptp_ocp_summary_show()
3773 val = ioread32(&bp->dcf_out->status); in ptp_ocp_summary_show()
3779 if (bp->dcf_in) { in ptp_ocp_summary_show()
3780 on = ioread32(&bp->dcf_in->ctrl) & DCF_S_CTRL_ENABLE; in ptp_ocp_summary_show()
3781 val = ioread32(&bp->dcf_in->status); in ptp_ocp_summary_show()
3787 if (bp->nmea_out) { in ptp_ocp_summary_show()
3788 on = ioread32(&bp->nmea_out->ctrl) & 1; in ptp_ocp_summary_show()
3789 val = ioread32(&bp->nmea_out->status); in ptp_ocp_summary_show()
3795 if (bp->pps_select) { in ptp_ocp_summary_show()
3796 val = ioread32(&bp->pps_select->gpio1); in ptp_ocp_summary_show()
3807 src = "----"; in ptp_ocp_summary_show()
3820 val = ioread32(&bp->reg->select); in ptp_ocp_summary_show()
3823 sprintf(buf, "----"); in ptp_ocp_summary_show()
3838 val = ioread32(&bp->reg->status); in ptp_ocp_summary_show()
3842 if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts)) { in ptp_ocp_summary_show()
3849 ns += (s64)bp->utc_tai_offset * NSEC_PER_SEC; in ptp_ocp_summary_show()
3856 bp->utc_tai_offset); in ptp_ocp_summary_show()
3858 timespec64_to_ns(&ts) - ns, in ptp_ocp_summary_show()
3859 post_ns - pre_ns); in ptp_ocp_summary_show()
3870 struct device *dev = s->private; in ptp_ocp_tod_status_show()
3877 val = ioread32(&bp->tod->ctrl); in ptp_ocp_tod_status_show()
3891 val = ioread32(&bp->tod->version); in ptp_ocp_tod_status_show()
3895 val = ioread32(&bp->tod->status); in ptp_ocp_tod_status_show()
3898 val = ioread32(&bp->tod->adj_sec); in ptp_ocp_tod_status_show()
3899 idx = (val & ~INT_MAX) ? -1 : 1; in ptp_ocp_tod_status_show()
3903 val = ioread32(&bp->tod->utc_status); in ptp_ocp_tod_status_show()
3911 val = ioread32(&bp->tod->leap); in ptp_ocp_tod_status_show()
3925 d = debugfs_create_dir(dev_name(&bp->dev), ptp_ocp_debugfs_root); in ptp_ocp_debugfs_add_device()
3926 bp->debug_root = d; in ptp_ocp_debugfs_add_device()
3927 debugfs_create_file("summary", 0444, bp->debug_root, in ptp_ocp_debugfs_add_device()
3928 &bp->dev, &ptp_ocp_summary_fops); in ptp_ocp_debugfs_add_device()
3929 if (bp->tod) in ptp_ocp_debugfs_add_device()
3930 debugfs_create_file("tod_status", 0444, bp->debug_root, in ptp_ocp_debugfs_add_device()
3931 &bp->dev, &ptp_ocp_tod_status_fops); in ptp_ocp_debugfs_add_device()
3937 debugfs_remove_recursive(bp->debug_root); in ptp_ocp_debugfs_remove_device()
3958 idr_remove(&ptp_ocp_idr, bp->id); in ptp_ocp_dev_release()
3971 dev_err(&pdev->dev, "idr_alloc failed: %d\n", err); in ptp_ocp_device_init()
3974 bp->id = err; in ptp_ocp_device_init()
3976 bp->ptp_info = ptp_ocp_clock_info; in ptp_ocp_device_init()
3977 spin_lock_init(&bp->lock); in ptp_ocp_device_init()
3978 bp->gnss_port.line = -1; in ptp_ocp_device_init()
3979 bp->gnss2_port.line = -1; in ptp_ocp_device_init()
3980 bp->mac_port.line = -1; in ptp_ocp_device_init()
3981 bp->nmea_port.line = -1; in ptp_ocp_device_init()
3982 bp->pdev = pdev; in ptp_ocp_device_init()
3984 device_initialize(&bp->dev); in ptp_ocp_device_init()
3985 dev_set_name(&bp->dev, "ocp%d", bp->id); in ptp_ocp_device_init()
3986 bp->dev.class = &timecard_class; in ptp_ocp_device_init()
3987 bp->dev.parent = &pdev->dev; in ptp_ocp_device_init()
3988 bp->dev.release = ptp_ocp_dev_release; in ptp_ocp_device_init()
3989 dev_set_drvdata(&bp->dev, bp); in ptp_ocp_device_init()
3991 err = device_add(&bp->dev); in ptp_ocp_device_init()
3993 dev_err(&bp->dev, "device add failed: %d\n", err); in ptp_ocp_device_init()
4002 put_device(&bp->dev); in ptp_ocp_device_init()
4009 struct device *dev = &bp->dev; in ptp_ocp_symlink()
4011 if (sysfs_create_link(&dev->kobj, &child->kobj, link)) in ptp_ocp_symlink()
4020 dev = &bp->pdev->dev; in ptp_ocp_link_child()
4035 struct pps_device *pps; in ptp_ocp_complete() local
4038 if (bp->gnss_port.line != -1) { in ptp_ocp_complete()
4039 sprintf(buf, "ttyS%d", bp->gnss_port.line); in ptp_ocp_complete()
4042 if (bp->gnss2_port.line != -1) { in ptp_ocp_complete()
4043 sprintf(buf, "ttyS%d", bp->gnss2_port.line); in ptp_ocp_complete()
4046 if (bp->mac_port.line != -1) { in ptp_ocp_complete()
4047 sprintf(buf, "ttyS%d", bp->mac_port.line); in ptp_ocp_complete()
4050 if (bp->nmea_port.line != -1) { in ptp_ocp_complete()
4051 sprintf(buf, "ttyS%d", bp->nmea_port.line); in ptp_ocp_complete()
4054 sprintf(buf, "ptp%d", ptp_clock_index(bp->ptp)); in ptp_ocp_complete()
4057 pps = pps_lookup_dev(bp->ptp); in ptp_ocp_complete()
4058 if (pps) in ptp_ocp_complete()
4059 ptp_ocp_symlink(bp, &pps->dev, "pps"); in ptp_ocp_complete()
4073 version = ioread32(&bp->reg->version); in ptp_ocp_phc_info()
4074 select = ioread32(&bp->reg->select); in ptp_ocp_phc_info()
4075 dev_info(&bp->pdev->dev, "Version %d.%d.%d, clock %s, device ptp%d\n", in ptp_ocp_phc_info()
4078 ptp_clock_index(bp->ptp)); in ptp_ocp_phc_info()
4080 sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; in ptp_ocp_phc_info()
4081 if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, NULL)) in ptp_ocp_phc_info()
4082 dev_info(&bp->pdev->dev, "Time: %lld.%ld, %s\n", in ptp_ocp_phc_info()
4084 sync ? "in-sync" : "UNSYNCED"); in ptp_ocp_phc_info()
4090 if (port != -1) in ptp_ocp_serial_info()
4091 dev_info(dev, "%5s: /dev/ttyS%-2d @ %6d\n", name, port, baud); in ptp_ocp_serial_info()
4102 struct device *dev = &bp->pdev->dev; in ptp_ocp_info()
4107 ptp_ocp_serial_info(dev, "GNSS", bp->gnss_port.line, in ptp_ocp_info()
4108 bp->gnss_port.baud); in ptp_ocp_info()
4109 ptp_ocp_serial_info(dev, "GNSS2", bp->gnss2_port.line, in ptp_ocp_info()
4110 bp->gnss2_port.baud); in ptp_ocp_info()
4111 ptp_ocp_serial_info(dev, "MAC", bp->mac_port.line, bp->mac_port.baud); in ptp_ocp_info()
4112 if (bp->nmea_out && bp->nmea_port.line != -1) { in ptp_ocp_info()
4113 bp->nmea_port.baud = -1; in ptp_ocp_info()
4115 reg = ioread32(&bp->nmea_out->uart_baud); in ptp_ocp_info()
4117 bp->nmea_port.baud = nmea_baud[reg]; in ptp_ocp_info()
4119 ptp_ocp_serial_info(dev, "NMEA", bp->nmea_port.line, in ptp_ocp_info()
4120 bp->nmea_port.baud); in ptp_ocp_info()
4127 struct device *dev = &bp->dev; in ptp_ocp_detach_sysfs()
4129 sysfs_remove_link(&dev->kobj, "ttyGNSS"); in ptp_ocp_detach_sysfs()
4130 sysfs_remove_link(&dev->kobj, "ttyGNSS2"); in ptp_ocp_detach_sysfs()
4131 sysfs_remove_link(&dev->kobj, "ttyMAC"); in ptp_ocp_detach_sysfs()
4132 sysfs_remove_link(&dev->kobj, "ptp"); in ptp_ocp_detach_sysfs()
4133 sysfs_remove_link(&dev->kobj, "pps"); in ptp_ocp_detach_sysfs()
4144 if (timer_pending(&bp->watchdog)) in ptp_ocp_detach()
4145 del_timer_sync(&bp->watchdog); in ptp_ocp_detach()
4146 if (bp->ts0) in ptp_ocp_detach()
4147 ptp_ocp_unregister_ext(bp->ts0); in ptp_ocp_detach()
4148 if (bp->ts1) in ptp_ocp_detach()
4149 ptp_ocp_unregister_ext(bp->ts1); in ptp_ocp_detach()
4150 if (bp->ts2) in ptp_ocp_detach()
4151 ptp_ocp_unregister_ext(bp->ts2); in ptp_ocp_detach()
4152 if (bp->ts3) in ptp_ocp_detach()
4153 ptp_ocp_unregister_ext(bp->ts3); in ptp_ocp_detach()
4154 if (bp->ts4) in ptp_ocp_detach()
4155 ptp_ocp_unregister_ext(bp->ts4); in ptp_ocp_detach()
4156 if (bp->pps) in ptp_ocp_detach()
4157 ptp_ocp_unregister_ext(bp->pps); in ptp_ocp_detach()
4159 if (bp->signal_out[i]) in ptp_ocp_detach()
4160 ptp_ocp_unregister_ext(bp->signal_out[i]); in ptp_ocp_detach()
4161 if (bp->gnss_port.line != -1) in ptp_ocp_detach()
4162 serial8250_unregister_port(bp->gnss_port.line); in ptp_ocp_detach()
4163 if (bp->gnss2_port.line != -1) in ptp_ocp_detach()
4164 serial8250_unregister_port(bp->gnss2_port.line); in ptp_ocp_detach()
4165 if (bp->mac_port.line != -1) in ptp_ocp_detach()
4166 serial8250_unregister_port(bp->mac_port.line); in ptp_ocp_detach()
4167 if (bp->nmea_port.line != -1) in ptp_ocp_detach()
4168 serial8250_unregister_port(bp->nmea_port.line); in ptp_ocp_detach()
4169 platform_device_unregister(bp->spi_flash); in ptp_ocp_detach()
4170 platform_device_unregister(bp->i2c_ctrl); in ptp_ocp_detach()
4171 if (bp->i2c_clk) in ptp_ocp_detach()
4172 clk_hw_unregister_fixed_rate(bp->i2c_clk); in ptp_ocp_detach()
4173 if (bp->n_irqs) in ptp_ocp_detach()
4174 pci_free_irq_vectors(bp->pdev); in ptp_ocp_detach()
4175 if (bp->ptp) in ptp_ocp_detach()
4176 ptp_clock_unregister(bp->ptp); in ptp_ocp_detach()
4177 kfree(bp->ptp_info.pin_config); in ptp_ocp_detach()
4178 device_unregister(&bp->dev); in ptp_ocp_detach()
4188 devlink = devlink_alloc(&ptp_ocp_devlink_ops, sizeof(*bp), &pdev->dev); in ptp_ocp_probe()
4190 dev_err(&pdev->dev, "devlink_alloc failed\n"); in ptp_ocp_probe()
4191 return -ENOMEM; in ptp_ocp_probe()
4196 dev_err(&pdev->dev, "pci_enable_device\n"); in ptp_ocp_probe()
4207 * allow this - if not all of the IRQ's are returned, skip the in ptp_ocp_probe()
4212 dev_err(&pdev->dev, "alloc_irq_vectors err: %d\n", err); in ptp_ocp_probe()
4215 bp->n_irqs = err; in ptp_ocp_probe()
4218 err = ptp_ocp_register_resources(bp, id->driver_data); in ptp_ocp_probe()
4222 bp->ptp = ptp_clock_register(&bp->ptp_info, &pdev->dev); in ptp_ocp_probe()
4223 if (IS_ERR(bp->ptp)) { in ptp_ocp_probe()
4224 err = PTR_ERR(bp->ptp); in ptp_ocp_probe()
4225 dev_err(&pdev->dev, "ptp_clock_register: %d\n", err); in ptp_ocp_probe()
4226 bp->ptp = NULL; in ptp_ocp_probe()
4288 while ((dev = dev->parent)) in ptp_ocp_i2c_notifier_call()
4289 if (dev->driver && !strcmp(dev->driver->name, KBUILD_MODNAME)) in ptp_ocp_i2c_notifier_call()
4298 sysfs_remove_link(&bp->dev.kobj, "i2c"); in ptp_ocp_i2c_notifier_call()