Lines Matching +full:can +full:- +full:clock +full:- +full:select

1 # SPDX-License-Identifier: GPL-2.0-only
3 # PTP clock support configuration
6 menu "PTP clock support"
9 tristate "PTP clock support"
12 select PPS
13 select NET_PTP_CLASSIFY
17 standard defines a Precision Time Protocol (PTP), which can
20 time stamping units, it can be possible to achieve
24 devices. If you want to use a PTP clock, then you should
25 also enable at least one clock driver as well.
35 Drivers that can optionally use the PTP_1588_CLOCK framework
43 tristate "Broadcom DTE as PTP clock"
50 (DTE) in the Broadcom SoC's as a PTP clock.
52 The clock can be used in both wired and wireless networks
59 tristate "Freescale QorIQ 1588 timer as PTP clock"
65 timer as a PTP clock. This clock is only useful if your PTP
70 will be called ptp-qoriq.
80 select CRC32
85 clock. This clock is only useful if your PTP programs are
100 core. This clock is only useful if the MII bus of your MAC
104 tristate "Intel PCH EG20T as PTP clock"
111 clock. The hardware supports time stamping of PTP packets
112 when using the end-to-end delay (E2E) mechanism. The peer
115 This clock is only useful if your PTP programs are getting
123 tristate "KVM virtual PTP clock"
129 clock. This clock is only useful if you are using KVM guests.
135 tristate "IDT 82P33xxx PTP clock"
140 clock. This clock is only useful if your time stamping MAC
147 tristate "IDT CLOCKMATRIX as PTP clock"
152 clock. This clock is only useful if your time stamping MAC
159 tristate "Mock-up PTP clock"
162 This driver offers a set of PTP clock manipulation operations over
163 the system monotonic time. It can be used by virtual network device
170 tristate "VMware virtual PTP clock"
175 clock device as a PTP clock. This is only useful in virtual
182 tristate "OpenCompute TimeCard as PTP clock"
189 select NET_DEVLINK
190 select CRC16
194 The OpenCompute time card is an atomic clock along with
195 a GPS receiver that provides a Grandmaster clock source
206 (Time-of-Day) device in FPGA card. The ToD IP within the FPGA
207 is exposed as PTP Hardware Clock (PHC) device to the Linux PTP
208 stack to synchronize the system clock to its ToD information