Lines Matching full:pctl
210 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_request() local
214 range = pinctrl_find_gpio_range_from_pin_nolock(pctl->pctl_dev, pin); in stm32_gpio_request()
216 dev_err(pctl->dev, "pin %d not in range.\n", pin); in stm32_gpio_request()
295 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_init_valid_mask() local
309 dev_dbg(pctl->dev, "No access to gpio %d - %d\n", bank->bank_nr, i); in stm32_gpio_init_valid_mask()
381 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_irq_request_resources() local
390 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in stm32_gpio_irq_request_resources()
441 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_activate() local
444 if (pctl->hwlock) { in stm32_gpio_domain_activate()
445 ret = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_gpio_domain_activate()
448 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_gpio_domain_activate()
453 regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); in stm32_gpio_domain_activate()
455 if (pctl->hwlock) in stm32_gpio_domain_activate()
456 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
468 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_alloc() local
477 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_alloc()
479 if (pctl->irqmux_map & BIT(hwirq)) { in stm32_gpio_domain_alloc()
480 dev_err(pctl->dev, "irq line %ld already requested.\n", hwirq); in stm32_gpio_domain_alloc()
483 pctl->irqmux_map |= BIT(hwirq); in stm32_gpio_domain_alloc()
486 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_alloc()
505 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_free() local
511 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_free()
512 pctl->irqmux_map &= ~BIT(hwirq); in stm32_gpio_domain_free()
513 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_free()
525 stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin) in stm32_pctrl_find_group_by_pin() argument
529 for (i = 0; i < pctl->ngroups; i++) { in stm32_pctrl_find_group_by_pin()
530 struct stm32_pinctrl_group *grp = pctl->groups + i; in stm32_pctrl_find_group_by_pin()
539 static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl, in stm32_pctrl_is_function_valid() argument
544 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_is_function_valid()
545 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_is_function_valid()
560 dev_err(pctl->dev, "invalid function %d on pin %d .\n", fnum, pin_num); in stm32_pctrl_is_function_valid()
565 static int stm32_pctrl_dt_node_to_map_func(struct stm32_pinctrl *pctl, in stm32_pctrl_dt_node_to_map_func() argument
576 if (!stm32_pctrl_is_function_valid(pctl, pin, fnum)) in stm32_pctrl_dt_node_to_map_func()
591 struct stm32_pinctrl *pctl; in stm32_pctrl_dt_subnode_to_map() local
601 pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_dt_subnode_to_map()
605 dev_err(pctl->dev, "missing pins property in node %pOFn .\n", in stm32_pctrl_dt_subnode_to_map()
647 if (!stm32_pctrl_is_function_valid(pctl, pin, func)) { in stm32_pctrl_dt_subnode_to_map()
652 grp = stm32_pctrl_find_group_by_pin(pctl, pin); in stm32_pctrl_dt_subnode_to_map()
654 dev_err(pctl->dev, "unable to match pin %d to group\n", in stm32_pctrl_dt_subnode_to_map()
660 err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map, in stm32_pctrl_dt_subnode_to_map()
707 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_groups_count() local
709 return pctl->ngroups; in stm32_pctrl_get_groups_count()
715 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_name() local
717 return pctl->groups[group].name; in stm32_pctrl_get_group_name()
725 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_pins() local
727 *pins = (unsigned *)&pctl->groups[group].pin; in stm32_pctrl_get_group_pins()
760 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_get_func_groups() local
762 *groups = pctl->grp_names; in stm32_pmx_get_func_groups()
763 *num_groups = pctl->ngroups; in stm32_pmx_get_func_groups()
771 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pmx_set_mode() local
780 if (pctl->hwlock) { in stm32_pmx_set_mode()
781 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pmx_set_mode()
784 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pmx_set_mode()
799 if (pctl->hwlock) in stm32_pmx_set_mode()
800 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pmx_set_mode()
836 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_set_mux() local
837 struct stm32_pinctrl_group *g = pctl->groups + group; in stm32_pmx_set_mux()
843 ret = stm32_pctrl_is_function_valid(pctl, g->pin, function); in stm32_pmx_set_mux()
849 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_set_mux()
874 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_request() local
879 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_request()
884 dev_warn(pctl->dev, "Can't access gpio %d\n", gpio); in stm32_pmx_request()
906 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_driving() local
913 if (pctl->hwlock) { in stm32_pconf_set_driving()
914 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_driving()
917 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_driving()
927 if (pctl->hwlock) in stm32_pconf_set_driving()
928 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_driving()
957 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_speed() local
964 if (pctl->hwlock) { in stm32_pconf_set_speed()
965 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_speed()
968 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_speed()
978 if (pctl->hwlock) in stm32_pconf_set_speed()
979 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_speed()
1008 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_bias() local
1015 if (pctl->hwlock) { in stm32_pconf_set_bias()
1016 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_bias()
1019 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_bias()
1029 if (pctl->hwlock) in stm32_pconf_set_bias()
1030 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_bias()
1080 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_parse_conf() local
1087 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pconf_parse_conf()
1095 dev_warn(pctl->dev, "Can't access gpio %d\n", pin); in stm32_pconf_parse_conf()
1133 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_get() local
1135 *config = pctl->groups[group].config; in stm32_pconf_group_get()
1143 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_set() local
1144 struct stm32_pinctrl_group *g = &pctl->groups[group]; in stm32_pconf_group_set()
1179 stm32_pconf_get_pin_desc_by_pin_number(struct stm32_pinctrl *pctl, in stm32_pconf_get_pin_desc_by_pin_number() argument
1182 struct stm32_desc_pin *pins = pctl->pins; in stm32_pconf_get_pin_desc_by_pin_number()
1185 for (i = 0; i < pctl->npins; i++) { in stm32_pconf_get_pin_desc_by_pin_number()
1197 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_dbg_show() local
1253 pin_desc = stm32_pconf_get_pin_desc_by_pin_number(pctl, pin); in stm32_pconf_dbg_show()
1277 static struct stm32_desc_pin *stm32_pctrl_get_desc_pin_from_gpio(struct stm32_pinctrl *pctl, in stm32_pctrl_get_desc_pin_from_gpio() argument
1286 if (stm32_pin_nb < pctl->npins) { in stm32_pctrl_get_desc_pin_from_gpio()
1287 pin_desc = pctl->pins + stm32_pin_nb; in stm32_pctrl_get_desc_pin_from_gpio()
1293 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_get_desc_pin_from_gpio()
1294 pin_desc = pctl->pins + i; in stm32_pctrl_get_desc_pin_from_gpio()
1301 static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode_handle *fwnode) in stm32_gpiolib_register_bank() argument
1303 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank()
1307 struct device *dev = pctl->dev; in stm32_gpiolib_register_bank()
1343 bank_nr = pctl->nbanks; in stm32_gpiolib_register_bank()
1351 pinctrl_add_gpio_range(pctl->pctl_dev, in stm32_gpiolib_register_bank()
1352 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank()
1365 bank->secure_control = pctl->match_data->secure_control; in stm32_gpiolib_register_bank()
1368 if (pctl->domain) { in stm32_gpiolib_register_bank()
1372 bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE, in stm32_gpiolib_register_bank()
1389 stm32_pin = stm32_pctrl_get_desc_pin_from_gpio(pctl, bank, i); in stm32_gpiolib_register_bank()
1440 struct stm32_pinctrl *pctl) in stm32_pctrl_dt_setup_irq() argument
1448 pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_pctrl_dt_setup_irq()
1449 if (IS_ERR(pctl->regmap)) in stm32_pctrl_dt_setup_irq()
1450 return PTR_ERR(pctl->regmap); in stm32_pctrl_dt_setup_irq()
1452 rm = pctl->regmap; in stm32_pctrl_dt_setup_irq()
1474 pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); in stm32_pctrl_dt_setup_irq()
1475 if (IS_ERR(pctl->irqmux[i])) in stm32_pctrl_dt_setup_irq()
1476 return PTR_ERR(pctl->irqmux[i]); in stm32_pctrl_dt_setup_irq()
1484 struct stm32_pinctrl *pctl = platform_get_drvdata(pdev); in stm32_pctrl_build_state() local
1487 pctl->ngroups = pctl->npins; in stm32_pctrl_build_state()
1490 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1491 sizeof(*pctl->groups), GFP_KERNEL); in stm32_pctrl_build_state()
1492 if (!pctl->groups) in stm32_pctrl_build_state()
1496 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1497 sizeof(*pctl->grp_names), GFP_KERNEL); in stm32_pctrl_build_state()
1498 if (!pctl->grp_names) in stm32_pctrl_build_state()
1501 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_build_state()
1502 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_build_state()
1503 struct stm32_pinctrl_group *group = pctl->groups + i; in stm32_pctrl_build_state()
1507 pctl->grp_names[i] = pin->pin.name; in stm32_pctrl_build_state()
1513 static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl, in stm32_pctrl_create_pins_tab() argument
1519 for (i = 0; i < pctl->match_data->npins; i++) { in stm32_pctrl_create_pins_tab()
1520 p = pctl->match_data->pins + i; in stm32_pctrl_create_pins_tab()
1521 if (pctl->pkg && !(pctl->pkg & p->pkg)) in stm32_pctrl_create_pins_tab()
1530 pctl->npins = nb_pins_available; in stm32_pctrl_create_pins_tab()
1540 struct stm32_pinctrl *pctl; in stm32_pctl_probe() local
1549 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL); in stm32_pctl_probe()
1550 if (!pctl) in stm32_pctl_probe()
1553 platform_set_drvdata(pdev, pctl); in stm32_pctl_probe()
1556 pctl->domain = stm32_pctrl_get_irq_domain(pdev); in stm32_pctl_probe()
1557 if (IS_ERR(pctl->domain)) in stm32_pctl_probe()
1558 return PTR_ERR(pctl->domain); in stm32_pctl_probe()
1559 if (!pctl->domain) in stm32_pctl_probe()
1568 pctl->hwlock = hwspin_lock_request_specific(hwlock_id); in stm32_pctl_probe()
1571 spin_lock_init(&pctl->irqmux_lock); in stm32_pctl_probe()
1573 pctl->dev = dev; in stm32_pctl_probe()
1574 pctl->match_data = match_data; in stm32_pctl_probe()
1577 if (!device_property_read_u32(dev, "st,package", &pctl->pkg)) in stm32_pctl_probe()
1578 dev_dbg(pctl->dev, "package detected: %x\n", pctl->pkg); in stm32_pctl_probe()
1580 pctl->pins = devm_kcalloc(pctl->dev, pctl->match_data->npins, in stm32_pctl_probe()
1581 sizeof(*pctl->pins), GFP_KERNEL); in stm32_pctl_probe()
1582 if (!pctl->pins) in stm32_pctl_probe()
1585 ret = stm32_pctrl_create_pins_tab(pctl, pctl->pins); in stm32_pctl_probe()
1595 if (pctl->domain) { in stm32_pctl_probe()
1596 ret = stm32_pctrl_dt_setup_irq(pdev, pctl); in stm32_pctl_probe()
1601 pins = devm_kcalloc(&pdev->dev, pctl->npins, sizeof(*pins), in stm32_pctl_probe()
1606 for (i = 0; i < pctl->npins; i++) in stm32_pctl_probe()
1607 pins[i] = pctl->pins[i].pin; in stm32_pctl_probe()
1609 pctl->pctl_desc.name = dev_name(&pdev->dev); in stm32_pctl_probe()
1610 pctl->pctl_desc.owner = THIS_MODULE; in stm32_pctl_probe()
1611 pctl->pctl_desc.pins = pins; in stm32_pctl_probe()
1612 pctl->pctl_desc.npins = pctl->npins; in stm32_pctl_probe()
1613 pctl->pctl_desc.link_consumers = true; in stm32_pctl_probe()
1614 pctl->pctl_desc.confops = &stm32_pconf_ops; in stm32_pctl_probe()
1615 pctl->pctl_desc.pctlops = &stm32_pctrl_ops; in stm32_pctl_probe()
1616 pctl->pctl_desc.pmxops = &stm32_pmx_ops; in stm32_pctl_probe()
1617 pctl->dev = &pdev->dev; in stm32_pctl_probe()
1619 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc, in stm32_pctl_probe()
1620 pctl); in stm32_pctl_probe()
1622 if (IS_ERR(pctl->pctl_dev)) { in stm32_pctl_probe()
1624 return PTR_ERR(pctl->pctl_dev); in stm32_pctl_probe()
1632 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe()
1634 if (!pctl->banks) in stm32_pctl_probe()
1639 struct stm32_gpio_bank *bank = &pctl->banks[i]; in stm32_pctl_probe()
1658 ret = stm32_gpiolib_register_bank(pctl, child); in stm32_pctl_probe()
1662 for (i = 0; i < pctl->nbanks; i++) in stm32_pctl_probe()
1663 clk_disable_unprepare(pctl->banks[i].clk); in stm32_pctl_probe()
1668 pctl->nbanks++; in stm32_pctl_probe()
1677 struct stm32_pinctrl *pctl, u32 pin) in stm32_pinctrl_restore_gpio_regs() argument
1679 const struct pin_desc *desc = pin_desc_get(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1686 range = pinctrl_find_gpio_range_from_pin(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1734 regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr); in stm32_pinctrl_restore_gpio_regs()
1741 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_suspend() local
1744 for (i = 0; i < pctl->nbanks; i++) in stm32_pinctrl_suspend()
1745 clk_disable(pctl->banks[i].clk); in stm32_pinctrl_suspend()
1752 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_resume() local
1753 struct stm32_pinctrl_group *g = pctl->groups; in stm32_pinctrl_resume()
1756 for (i = 0; i < pctl->nbanks; i++) in stm32_pinctrl_resume()
1757 clk_enable(pctl->banks[i].clk); in stm32_pinctrl_resume()
1759 for (i = 0; i < pctl->ngroups; i++, g++) in stm32_pinctrl_resume()
1760 stm32_pinctrl_restore_gpio_regs(pctl, g->pin); in stm32_pinctrl_resume()