52  * @io_ctrl: I/O register base for PINCONF support outside the GPIO block
61 	void __iomem *io_ctrl;  member
70 	IO_CTRL  enumerator
97 	if (address == IO_CTRL)  in nsp_set_bit()
98 		base_address = chip->io_ctrl;  in nsp_set_bit()
118 	if (address == IO_CTRL)  in nsp_get_bit()
119 		return !!(readl(chip->io_ctrl + reg) & BIT(gpio));  in nsp_get_bit()
356 		nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, true);  in nsp_gpio_set_slew()
358 		nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, false);  in nsp_gpio_set_slew()
369 	nsp_set_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio, pull_down);  in nsp_gpio_set_pull()
370 	nsp_set_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio, pull_up);  in nsp_gpio_set_pull()
384 	*pull_up = nsp_get_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio);  in nsp_gpio_get_pull()
385 	*pull_down = nsp_get_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio);  in nsp_gpio_get_pull()
407 		val = readl(chip->io_ctrl + offset);  in nsp_gpio_set_strength()
410 		writel(val, chip->io_ctrl + offset);  in nsp_gpio_set_strength()
432 		val = readl(chip->io_ctrl + offset) & BIT(shift);  in nsp_gpio_get_strength()
638 	chip->io_ctrl = devm_platform_ioremap_resource(pdev, 1);  in nsp_gpio_probe()
639 	if (IS_ERR(chip->io_ctrl)) {  in nsp_gpio_probe()
641 		return PTR_ERR(chip->io_ctrl);  in nsp_gpio_probe()