Lines Matching refs:MIPHY_CONF
66 #define MIPHY_CONF 0x0f macro
418 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_pll_calibration()
439 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_sata_config_gen()
466 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_pcie_config_gen()
544 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
547 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
550 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
572 writeb_relaxed(val, base + MIPHY_CONF); in miphy_sata_tune_ssc()
610 writeb_relaxed(val, base + MIPHY_CONF); in miphy_pcie_tune_ssc()
730 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()
767 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()