82 	struct regmap		*iomuxc_gpr;  member
195 	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);  in imx6_pcie_configure_type()
341 		regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
352 			regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
358 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
362 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
367 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
371 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
374 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
377 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
380 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
383 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
386 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
400 	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,  in imx7d_pcie_wait_for_phy_pll_lock()
566 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_enable_ref_clk()
572 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
581 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
603 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
606 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
623 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
625 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
630 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_disable_ref_clk()
714 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_assert_core_reset()
718 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_assert_core_reset()
723 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
728 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
730 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
776 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_deassert_core_reset()
780 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_deassert_core_reset()
832 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_enable()
856 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_disable()
1162 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1165 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1393 	imx6_pcie->iomuxc_gpr =  in imx6_pcie_probe()
1395 	if (IS_ERR(imx6_pcie->iomuxc_gpr)) {  in imx6_pcie_probe()
1397 		return PTR_ERR(imx6_pcie->iomuxc_gpr);  in imx6_pcie_probe()