Lines Matching +full:dev +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
10 #include <linux/blk-mq.h>
11 #include <linux/blk-mq-pci.h>
12 #include <linux/blk-integrity.h>
25 #include <linux/t10-pi.h>
27 #include <linux/io-64-nonatomic-lo-hi.h>
28 #include <linux/io-64-nonatomic-hi-lo.h>
29 #include <linux/sed-opal.h>
30 #include <linux/pci-p2pdma.h>
35 #define SQ_SIZE(q) ((q)->q_depth << (q)->sqes)
36 #define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion))
85 return -EINVAL; in io_queue_count_set()
111 static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);
112 static void nvme_delete_io_queues(struct nvme_dev *dev);
113 static void nvme_update_attrs(struct nvme_dev *dev);
123 struct device *dev; member
141 struct nvme_ctrl ctrl; member
181 static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) in to_nvme_dev() argument
183 return container_of(ctrl, struct nvme_dev, ctrl); in to_nvme_dev()
191 struct nvme_dev *dev; member
244 static inline unsigned int nvme_dbbuf_size(struct nvme_dev *dev) in nvme_dbbuf_size() argument
246 return dev->nr_allocated_queues * 8 * dev->db_stride; in nvme_dbbuf_size()
249 static void nvme_dbbuf_dma_alloc(struct nvme_dev *dev) in nvme_dbbuf_dma_alloc() argument
251 unsigned int mem_size = nvme_dbbuf_size(dev); in nvme_dbbuf_dma_alloc()
253 if (!(dev->ctrl.oacs & NVME_CTRL_OACS_DBBUF_SUPP)) in nvme_dbbuf_dma_alloc()
256 if (dev->dbbuf_dbs) { in nvme_dbbuf_dma_alloc()
261 memset(dev->dbbuf_dbs, 0, mem_size); in nvme_dbbuf_dma_alloc()
262 memset(dev->dbbuf_eis, 0, mem_size); in nvme_dbbuf_dma_alloc()
266 dev->dbbuf_dbs = dma_alloc_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_alloc()
267 &dev->dbbuf_dbs_dma_addr, in nvme_dbbuf_dma_alloc()
269 if (!dev->dbbuf_dbs) in nvme_dbbuf_dma_alloc()
271 dev->dbbuf_eis = dma_alloc_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_alloc()
272 &dev->dbbuf_eis_dma_addr, in nvme_dbbuf_dma_alloc()
274 if (!dev->dbbuf_eis) in nvme_dbbuf_dma_alloc()
279 dma_free_coherent(dev->dev, mem_size, dev->dbbuf_dbs, in nvme_dbbuf_dma_alloc()
280 dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_dma_alloc()
281 dev->dbbuf_dbs = NULL; in nvme_dbbuf_dma_alloc()
283 dev_warn(dev->dev, "unable to allocate dma for dbbuf\n"); in nvme_dbbuf_dma_alloc()
286 static void nvme_dbbuf_dma_free(struct nvme_dev *dev) in nvme_dbbuf_dma_free() argument
288 unsigned int mem_size = nvme_dbbuf_size(dev); in nvme_dbbuf_dma_free()
290 if (dev->dbbuf_dbs) { in nvme_dbbuf_dma_free()
291 dma_free_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_free()
292 dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_dma_free()
293 dev->dbbuf_dbs = NULL; in nvme_dbbuf_dma_free()
295 if (dev->dbbuf_eis) { in nvme_dbbuf_dma_free()
296 dma_free_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_free()
297 dev->dbbuf_eis, dev->dbbuf_eis_dma_addr); in nvme_dbbuf_dma_free()
298 dev->dbbuf_eis = NULL; in nvme_dbbuf_dma_free()
302 static void nvme_dbbuf_init(struct nvme_dev *dev, in nvme_dbbuf_init() argument
305 if (!dev->dbbuf_dbs || !qid) in nvme_dbbuf_init()
308 nvmeq->dbbuf_sq_db = &dev->dbbuf_dbs[sq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
309 nvmeq->dbbuf_cq_db = &dev->dbbuf_dbs[cq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
310 nvmeq->dbbuf_sq_ei = &dev->dbbuf_eis[sq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
311 nvmeq->dbbuf_cq_ei = &dev->dbbuf_eis[cq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
316 if (!nvmeq->qid) in nvme_dbbuf_free()
319 nvmeq->dbbuf_sq_db = NULL; in nvme_dbbuf_free()
320 nvmeq->dbbuf_cq_db = NULL; in nvme_dbbuf_free()
321 nvmeq->dbbuf_sq_ei = NULL; in nvme_dbbuf_free()
322 nvmeq->dbbuf_cq_ei = NULL; in nvme_dbbuf_free()
325 static void nvme_dbbuf_set(struct nvme_dev *dev) in nvme_dbbuf_set() argument
330 if (!dev->dbbuf_dbs) in nvme_dbbuf_set()
334 c.dbbuf.prp1 = cpu_to_le64(dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_set()
335 c.dbbuf.prp2 = cpu_to_le64(dev->dbbuf_eis_dma_addr); in nvme_dbbuf_set()
337 if (nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0)) { in nvme_dbbuf_set()
338 dev_warn(dev->ctrl.device, "unable to set dbbuf\n"); in nvme_dbbuf_set()
340 nvme_dbbuf_dma_free(dev); in nvme_dbbuf_set()
342 for (i = 1; i <= dev->online_queues; i++) in nvme_dbbuf_set()
343 nvme_dbbuf_free(&dev->queues[i]); in nvme_dbbuf_set()
349 return (u16)(new_idx - event_idx - 1) < (u16)(new_idx - old); in nvme_dbbuf_need_event()
393 return DIV_ROUND_UP(8 * nprps, NVME_CTRL_PAGE_SIZE - 8); in nvme_pci_npages_prp()
399 struct nvme_dev *dev = to_nvme_dev(data); in nvme_admin_init_hctx() local
400 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_admin_init_hctx()
403 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); in nvme_admin_init_hctx()
405 hctx->driver_data = nvmeq; in nvme_admin_init_hctx()
412 struct nvme_dev *dev = to_nvme_dev(data); in nvme_init_hctx() local
413 struct nvme_queue *nvmeq = &dev->queues[hctx_idx + 1]; in nvme_init_hctx()
415 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); in nvme_init_hctx()
416 hctx->driver_data = nvmeq; in nvme_init_hctx()
426 nvme_req(req)->ctrl = set->driver_data; in nvme_pci_init_request()
427 nvme_req(req)->cmd = &iod->cmd; in nvme_pci_init_request()
431 static int queue_irq_offset(struct nvme_dev *dev) in queue_irq_offset() argument
434 if (dev->num_vecs > 1) in queue_irq_offset()
442 struct nvme_dev *dev = to_nvme_dev(set->driver_data); in nvme_pci_map_queues() local
445 offset = queue_irq_offset(dev); in nvme_pci_map_queues()
446 for (i = 0, qoff = 0; i < set->nr_maps; i++) { in nvme_pci_map_queues()
447 struct blk_mq_queue_map *map = &set->map[i]; in nvme_pci_map_queues()
449 map->nr_queues = dev->io_queues[i]; in nvme_pci_map_queues()
450 if (!map->nr_queues) { in nvme_pci_map_queues()
457 * affinity), so use the regular blk-mq cpu mapping in nvme_pci_map_queues()
459 map->queue_offset = qoff; in nvme_pci_map_queues()
461 blk_mq_pci_map_queues(map, to_pci_dev(dev->dev), offset); in nvme_pci_map_queues()
464 qoff += map->nr_queues; in nvme_pci_map_queues()
465 offset += map->nr_queues; in nvme_pci_map_queues()
475 u16 next_tail = nvmeq->sq_tail + 1; in nvme_write_sq_db()
477 if (next_tail == nvmeq->q_depth) in nvme_write_sq_db()
479 if (next_tail != nvmeq->last_sq_tail) in nvme_write_sq_db()
483 if (nvme_dbbuf_update_and_check_event(nvmeq->sq_tail, in nvme_write_sq_db()
484 nvmeq->dbbuf_sq_db, nvmeq->dbbuf_sq_ei)) in nvme_write_sq_db()
485 writel(nvmeq->sq_tail, nvmeq->q_db); in nvme_write_sq_db()
486 nvmeq->last_sq_tail = nvmeq->sq_tail; in nvme_write_sq_db()
492 memcpy(nvmeq->sq_cmds + (nvmeq->sq_tail << nvmeq->sqes), in nvme_sq_copy_cmd()
494 if (++nvmeq->sq_tail == nvmeq->q_depth) in nvme_sq_copy_cmd()
495 nvmeq->sq_tail = 0; in nvme_sq_copy_cmd()
500 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_commit_rqs()
502 spin_lock(&nvmeq->sq_lock); in nvme_commit_rqs()
503 if (nvmeq->sq_tail != nvmeq->last_sq_tail) in nvme_commit_rqs()
505 spin_unlock(&nvmeq->sq_lock); in nvme_commit_rqs()
508 static inline bool nvme_pci_use_sgls(struct nvme_dev *dev, struct request *req, in nvme_pci_use_sgls() argument
511 struct nvme_queue *nvmeq = req->mq_hctx->driver_data; in nvme_pci_use_sgls()
516 if (!nvme_ctrl_sgl_supported(&dev->ctrl)) in nvme_pci_use_sgls()
518 if (!nvmeq->qid) in nvme_pci_use_sgls()
525 static void nvme_free_prps(struct nvme_dev *dev, struct request *req) in nvme_free_prps() argument
527 const int last_prp = NVME_CTRL_PAGE_SIZE / sizeof(__le64) - 1; in nvme_free_prps()
529 dma_addr_t dma_addr = iod->first_dma; in nvme_free_prps()
532 for (i = 0; i < iod->nr_allocations; i++) { in nvme_free_prps()
533 __le64 *prp_list = iod->list[i].prp_list; in nvme_free_prps()
536 dma_pool_free(dev->prp_page_pool, prp_list, dma_addr); in nvme_free_prps()
541 static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) in nvme_unmap_data() argument
545 if (iod->dma_len) { in nvme_unmap_data()
546 dma_unmap_page(dev->dev, iod->first_dma, iod->dma_len, in nvme_unmap_data()
551 WARN_ON_ONCE(!iod->sgt.nents); in nvme_unmap_data()
553 dma_unmap_sgtable(dev->dev, &iod->sgt, rq_dma_dir(req), 0); in nvme_unmap_data()
555 if (iod->nr_allocations == 0) in nvme_unmap_data()
556 dma_pool_free(dev->prp_small_pool, iod->list[0].sg_list, in nvme_unmap_data()
557 iod->first_dma); in nvme_unmap_data()
558 else if (iod->nr_allocations == 1) in nvme_unmap_data()
559 dma_pool_free(dev->prp_page_pool, iod->list[0].sg_list, in nvme_unmap_data()
560 iod->first_dma); in nvme_unmap_data()
562 nvme_free_prps(dev, req); in nvme_unmap_data()
563 mempool_free(iod->sgt.sgl, dev->iod_mempool); in nvme_unmap_data()
575 i, &phys, sg->offset, sg->length, &sg_dma_address(sg), in nvme_print_sgl()
580 static blk_status_t nvme_pci_setup_prps(struct nvme_dev *dev, in nvme_pci_setup_prps() argument
586 struct scatterlist *sg = iod->sgt.sgl; in nvme_pci_setup_prps()
589 int offset = dma_addr & (NVME_CTRL_PAGE_SIZE - 1); in nvme_pci_setup_prps()
594 length -= (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
596 iod->first_dma = 0; in nvme_pci_setup_prps()
600 dma_len -= (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
602 dma_addr += (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
610 iod->first_dma = dma_addr; in nvme_pci_setup_prps()
616 pool = dev->prp_small_pool; in nvme_pci_setup_prps()
617 iod->nr_allocations = 0; in nvme_pci_setup_prps()
619 pool = dev->prp_page_pool; in nvme_pci_setup_prps()
620 iod->nr_allocations = 1; in nvme_pci_setup_prps()
625 iod->nr_allocations = -1; in nvme_pci_setup_prps()
628 iod->list[0].prp_list = prp_list; in nvme_pci_setup_prps()
629 iod->first_dma = prp_dma; in nvme_pci_setup_prps()
637 iod->list[iod->nr_allocations++].prp_list = prp_list; in nvme_pci_setup_prps()
638 prp_list[0] = old_prp_list[i - 1]; in nvme_pci_setup_prps()
639 old_prp_list[i - 1] = cpu_to_le64(prp_dma); in nvme_pci_setup_prps()
643 dma_len -= NVME_CTRL_PAGE_SIZE; in nvme_pci_setup_prps()
645 length -= NVME_CTRL_PAGE_SIZE; in nvme_pci_setup_prps()
657 cmnd->dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sgt.sgl)); in nvme_pci_setup_prps()
658 cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma); in nvme_pci_setup_prps()
661 nvme_free_prps(dev, req); in nvme_pci_setup_prps()
664 WARN(DO_ONCE(nvme_print_sgl, iod->sgt.sgl, iod->sgt.nents), in nvme_pci_setup_prps()
666 blk_rq_payload_bytes(req), iod->sgt.nents); in nvme_pci_setup_prps()
673 sge->addr = cpu_to_le64(sg_dma_address(sg)); in nvme_pci_sgl_set_data()
674 sge->length = cpu_to_le32(sg_dma_len(sg)); in nvme_pci_sgl_set_data()
675 sge->type = NVME_SGL_FMT_DATA_DESC << 4; in nvme_pci_sgl_set_data()
681 sge->addr = cpu_to_le64(dma_addr); in nvme_pci_sgl_set_seg()
682 sge->length = cpu_to_le32(entries * sizeof(*sge)); in nvme_pci_sgl_set_seg()
683 sge->type = NVME_SGL_FMT_LAST_SEG_DESC << 4; in nvme_pci_sgl_set_seg()
686 static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, in nvme_pci_setup_sgls() argument
692 struct scatterlist *sg = iod->sgt.sgl; in nvme_pci_setup_sgls()
693 unsigned int entries = iod->sgt.nents; in nvme_pci_setup_sgls()
698 cmd->flags = NVME_CMD_SGL_METABUF; in nvme_pci_setup_sgls()
701 nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg); in nvme_pci_setup_sgls()
706 pool = dev->prp_small_pool; in nvme_pci_setup_sgls()
707 iod->nr_allocations = 0; in nvme_pci_setup_sgls()
709 pool = dev->prp_page_pool; in nvme_pci_setup_sgls()
710 iod->nr_allocations = 1; in nvme_pci_setup_sgls()
715 iod->nr_allocations = -1; in nvme_pci_setup_sgls()
719 iod->list[0].sg_list = sg_list; in nvme_pci_setup_sgls()
720 iod->first_dma = sgl_dma; in nvme_pci_setup_sgls()
722 nvme_pci_sgl_set_seg(&cmd->dptr.sgl, sgl_dma, entries); in nvme_pci_setup_sgls()
726 } while (--entries > 0); in nvme_pci_setup_sgls()
731 static blk_status_t nvme_setup_prp_simple(struct nvme_dev *dev, in nvme_setup_prp_simple() argument
736 unsigned int offset = bv->bv_offset & (NVME_CTRL_PAGE_SIZE - 1); in nvme_setup_prp_simple()
737 unsigned int first_prp_len = NVME_CTRL_PAGE_SIZE - offset; in nvme_setup_prp_simple()
739 iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); in nvme_setup_prp_simple()
740 if (dma_mapping_error(dev->dev, iod->first_dma)) in nvme_setup_prp_simple()
742 iod->dma_len = bv->bv_len; in nvme_setup_prp_simple()
744 cmnd->dptr.prp1 = cpu_to_le64(iod->first_dma); in nvme_setup_prp_simple()
745 if (bv->bv_len > first_prp_len) in nvme_setup_prp_simple()
746 cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma + first_prp_len); in nvme_setup_prp_simple()
748 cmnd->dptr.prp2 = 0; in nvme_setup_prp_simple()
752 static blk_status_t nvme_setup_sgl_simple(struct nvme_dev *dev, in nvme_setup_sgl_simple() argument
758 iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); in nvme_setup_sgl_simple()
759 if (dma_mapping_error(dev->dev, iod->first_dma)) in nvme_setup_sgl_simple()
761 iod->dma_len = bv->bv_len; in nvme_setup_sgl_simple()
763 cmnd->flags = NVME_CMD_SGL_METABUF; in nvme_setup_sgl_simple()
764 cmnd->dptr.sgl.addr = cpu_to_le64(iod->first_dma); in nvme_setup_sgl_simple()
765 cmnd->dptr.sgl.length = cpu_to_le32(iod->dma_len); in nvme_setup_sgl_simple()
766 cmnd->dptr.sgl.type = NVME_SGL_FMT_DATA_DESC << 4; in nvme_setup_sgl_simple()
770 static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req, in nvme_map_data() argument
778 struct nvme_queue *nvmeq = req->mq_hctx->driver_data; in nvme_map_data()
782 if ((bv.bv_offset & (NVME_CTRL_PAGE_SIZE - 1)) + in nvme_map_data()
784 return nvme_setup_prp_simple(dev, req, in nvme_map_data()
785 &cmnd->rw, &bv); in nvme_map_data()
787 if (nvmeq->qid && sgl_threshold && in nvme_map_data()
788 nvme_ctrl_sgl_supported(&dev->ctrl)) in nvme_map_data()
789 return nvme_setup_sgl_simple(dev, req, in nvme_map_data()
790 &cmnd->rw, &bv); in nvme_map_data()
794 iod->dma_len = 0; in nvme_map_data()
795 iod->sgt.sgl = mempool_alloc(dev->iod_mempool, GFP_ATOMIC); in nvme_map_data()
796 if (!iod->sgt.sgl) in nvme_map_data()
798 sg_init_table(iod->sgt.sgl, blk_rq_nr_phys_segments(req)); in nvme_map_data()
799 iod->sgt.orig_nents = blk_rq_map_sg(req->q, req, iod->sgt.sgl); in nvme_map_data()
800 if (!iod->sgt.orig_nents) in nvme_map_data()
803 rc = dma_map_sgtable(dev->dev, &iod->sgt, rq_dma_dir(req), in nvme_map_data()
806 if (rc == -EREMOTEIO) in nvme_map_data()
811 if (nvme_pci_use_sgls(dev, req, iod->sgt.nents)) in nvme_map_data()
812 ret = nvme_pci_setup_sgls(dev, req, &cmnd->rw); in nvme_map_data()
814 ret = nvme_pci_setup_prps(dev, req, &cmnd->rw); in nvme_map_data()
820 dma_unmap_sgtable(dev->dev, &iod->sgt, rq_dma_dir(req), 0); in nvme_map_data()
822 mempool_free(iod->sgt.sgl, dev->iod_mempool); in nvme_map_data()
826 static blk_status_t nvme_map_metadata(struct nvme_dev *dev, struct request *req, in nvme_map_metadata() argument
832 iod->meta_dma = dma_map_bvec(dev->dev, &bv, rq_dma_dir(req), 0); in nvme_map_metadata()
833 if (dma_mapping_error(dev->dev, iod->meta_dma)) in nvme_map_metadata()
835 cmnd->rw.metadata = cpu_to_le64(iod->meta_dma); in nvme_map_metadata()
839 static blk_status_t nvme_prep_rq(struct nvme_dev *dev, struct request *req) in nvme_prep_rq() argument
844 iod->aborted = false; in nvme_prep_rq()
845 iod->nr_allocations = -1; in nvme_prep_rq()
846 iod->sgt.nents = 0; in nvme_prep_rq()
848 ret = nvme_setup_cmd(req->q->queuedata, req); in nvme_prep_rq()
853 ret = nvme_map_data(dev, req, &iod->cmd); in nvme_prep_rq()
859 ret = nvme_map_metadata(dev, req, &iod->cmd); in nvme_prep_rq()
868 nvme_unmap_data(dev, req); in nvme_prep_rq()
880 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_queue_rq()
881 struct nvme_dev *dev = nvmeq->dev; in nvme_queue_rq() local
882 struct request *req = bd->rq; in nvme_queue_rq()
890 if (unlikely(!test_bit(NVMEQ_ENABLED, &nvmeq->flags))) in nvme_queue_rq()
893 if (unlikely(!nvme_check_ready(&dev->ctrl, req, true))) in nvme_queue_rq()
894 return nvme_fail_nonready_command(&dev->ctrl, req); in nvme_queue_rq()
896 ret = nvme_prep_rq(dev, req); in nvme_queue_rq()
899 spin_lock(&nvmeq->sq_lock); in nvme_queue_rq()
900 nvme_sq_copy_cmd(nvmeq, &iod->cmd); in nvme_queue_rq()
901 nvme_write_sq_db(nvmeq, bd->last); in nvme_queue_rq()
902 spin_unlock(&nvmeq->sq_lock); in nvme_queue_rq()
910 spin_lock(&nvmeq->sq_lock); in nvme_submit_cmds()
914 nvme_sq_copy_cmd(nvmeq, &iod->cmd); in nvme_submit_cmds()
917 spin_unlock(&nvmeq->sq_lock); in nvme_submit_cmds()
926 if (unlikely(!test_bit(NVMEQ_ENABLED, &nvmeq->flags))) in nvme_prep_rq_batch()
928 if (unlikely(!nvme_check_ready(&nvmeq->dev->ctrl, req, true))) in nvme_prep_rq_batch()
931 req->mq_hctx->tags->rqs[req->tag] = req; in nvme_prep_rq_batch()
932 return nvme_prep_rq(nvmeq->dev, req) == BLK_STS_OK; in nvme_prep_rq_batch()
944 if (nvmeq && nvmeq != req->mq_hctx->driver_data) in nvme_queue_rqs()
946 nvmeq = req->mq_hctx->driver_data; in nvme_queue_rqs()
961 struct nvme_queue *nvmeq = req->mq_hctx->driver_data; in nvme_pci_unmap_rq()
962 struct nvme_dev *dev = nvmeq->dev; in nvme_pci_unmap_rq() local
967 dma_unmap_page(dev->dev, iod->meta_dma, in nvme_pci_unmap_rq()
972 nvme_unmap_data(dev, req); in nvme_pci_unmap_rq()
989 struct nvme_completion *hcqe = &nvmeq->cqes[nvmeq->cq_head]; in nvme_cqe_pending()
991 return (le16_to_cpu(READ_ONCE(hcqe->status)) & 1) == nvmeq->cq_phase; in nvme_cqe_pending()
996 u16 head = nvmeq->cq_head; in nvme_ring_cq_doorbell()
998 if (nvme_dbbuf_update_and_check_event(head, nvmeq->dbbuf_cq_db, in nvme_ring_cq_doorbell()
999 nvmeq->dbbuf_cq_ei)) in nvme_ring_cq_doorbell()
1000 writel(head, nvmeq->q_db + nvmeq->dev->db_stride); in nvme_ring_cq_doorbell()
1005 if (!nvmeq->qid) in nvme_queue_tagset()
1006 return nvmeq->dev->admin_tagset.tags[0]; in nvme_queue_tagset()
1007 return nvmeq->dev->tagset.tags[nvmeq->qid - 1]; in nvme_queue_tagset()
1013 struct nvme_completion *cqe = &nvmeq->cqes[idx]; in nvme_handle_cqe()
1014 __u16 command_id = READ_ONCE(cqe->command_id); in nvme_handle_cqe()
1023 if (unlikely(nvme_is_aen_req(nvmeq->qid, command_id))) { in nvme_handle_cqe()
1024 nvme_complete_async_event(&nvmeq->dev->ctrl, in nvme_handle_cqe()
1025 cqe->status, &cqe->result); in nvme_handle_cqe()
1031 dev_warn(nvmeq->dev->ctrl.device, in nvme_handle_cqe()
1033 command_id, le16_to_cpu(cqe->sq_id)); in nvme_handle_cqe()
1037 trace_nvme_sq(req, cqe->sq_head, nvmeq->sq_tail); in nvme_handle_cqe()
1038 if (!nvme_try_complete_req(req, cqe->status, cqe->result) && in nvme_handle_cqe()
1039 !blk_mq_add_to_batch(req, iob, nvme_req(req)->status, in nvme_handle_cqe()
1046 u32 tmp = nvmeq->cq_head + 1; in nvme_update_cq_head()
1048 if (tmp == nvmeq->q_depth) { in nvme_update_cq_head()
1049 nvmeq->cq_head = 0; in nvme_update_cq_head()
1050 nvmeq->cq_phase ^= 1; in nvme_update_cq_head()
1052 nvmeq->cq_head = tmp; in nvme_update_cq_head()
1064 * load-load control dependency between phase and the rest of in nvme_poll_cq()
1068 nvme_handle_cqe(nvmeq, iob, nvmeq->cq_head); in nvme_poll_cq()
1105 struct pci_dev *pdev = to_pci_dev(nvmeq->dev->dev); in nvme_poll_irqdisable()
1107 WARN_ON_ONCE(test_bit(NVMEQ_POLLED, &nvmeq->flags)); in nvme_poll_irqdisable()
1109 disable_irq(pci_irq_vector(pdev, nvmeq->cq_vector)); in nvme_poll_irqdisable()
1110 spin_lock(&nvmeq->cq_poll_lock); in nvme_poll_irqdisable()
1112 spin_unlock(&nvmeq->cq_poll_lock); in nvme_poll_irqdisable()
1113 enable_irq(pci_irq_vector(pdev, nvmeq->cq_vector)); in nvme_poll_irqdisable()
1118 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_poll()
1124 spin_lock(&nvmeq->cq_poll_lock); in nvme_poll()
1126 spin_unlock(&nvmeq->cq_poll_lock); in nvme_poll()
1131 static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl) in nvme_pci_submit_async_event() argument
1133 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_submit_async_event() local
1134 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_pci_submit_async_event()
1140 spin_lock(&nvmeq->sq_lock); in nvme_pci_submit_async_event()
1143 spin_unlock(&nvmeq->sq_lock); in nvme_pci_submit_async_event()
1146 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) in adapter_delete_queue() argument
1153 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_delete_queue()
1156 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, in adapter_alloc_cq() argument
1162 if (!test_bit(NVMEQ_POLLED, &nvmeq->flags)) in adapter_alloc_cq()
1170 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); in adapter_alloc_cq()
1172 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); in adapter_alloc_cq()
1176 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_alloc_cq()
1179 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, in adapter_alloc_sq() argument
1182 struct nvme_ctrl *ctrl = &dev->ctrl; in adapter_alloc_sq() local
1187 * Some drives have a bug that auto-enables WRRU if MEDIUM isn't in adapter_alloc_sq()
1191 if (ctrl->quirks & NVME_QUIRK_MEDIUM_PRIO_SQ) in adapter_alloc_sq()
1199 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); in adapter_alloc_sq()
1201 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); in adapter_alloc_sq()
1205 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_alloc_sq()
1208 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) in adapter_delete_cq() argument
1210 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); in adapter_delete_cq()
1213 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) in adapter_delete_sq() argument
1215 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); in adapter_delete_sq()
1220 struct nvme_queue *nvmeq = req->mq_hctx->driver_data; in abort_endio()
1222 dev_warn(nvmeq->dev->ctrl.device, in abort_endio()
1223 "Abort status: 0x%x", nvme_req(req)->status); in abort_endio()
1224 atomic_inc(&nvmeq->dev->ctrl.abort_limit); in abort_endio()
1229 static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) in nvme_should_reset() argument
1234 bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); in nvme_should_reset()
1237 switch (nvme_ctrl_state(&dev->ctrl)) { in nvme_should_reset()
1254 static void nvme_warn_reset(struct nvme_dev *dev, u32 csts) in nvme_warn_reset() argument
1260 result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS, in nvme_warn_reset()
1263 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1267 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1274 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1276 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1283 struct nvme_queue *nvmeq = req->mq_hctx->driver_data; in nvme_timeout()
1284 struct nvme_dev *dev = nvmeq->dev; in nvme_timeout() local
1287 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_timeout()
1288 u32 csts = readl(dev->bar + NVME_REG_CSTS); in nvme_timeout()
1299 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_timeout()
1300 if (nvme_state_terminal(&dev->ctrl)) in nvme_timeout()
1313 if (nvme_should_reset(dev, csts)) { in nvme_timeout()
1314 nvme_warn_reset(dev, csts); in nvme_timeout()
1321 if (test_bit(NVMEQ_POLLED, &nvmeq->flags)) in nvme_timeout()
1322 nvme_poll(req->mq_hctx, NULL); in nvme_timeout()
1327 dev_warn(dev->ctrl.device, in nvme_timeout()
1329 req->tag, nvmeq->qid); in nvme_timeout()
1339 switch (nvme_ctrl_state(&dev->ctrl)) { in nvme_timeout()
1341 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_timeout()
1344 dev_warn_ratelimited(dev->ctrl.device, in nvme_timeout()
1346 req->tag, nvmeq->qid); in nvme_timeout()
1347 nvme_req(req)->flags |= NVME_REQ_CANCELLED; in nvme_timeout()
1348 nvme_dev_disable(dev, true); in nvme_timeout()
1361 if (!nvmeq->qid || iod->aborted) { in nvme_timeout()
1362 dev_warn(dev->ctrl.device, in nvme_timeout()
1364 req->tag, nvmeq->qid); in nvme_timeout()
1365 nvme_req(req)->flags |= NVME_REQ_CANCELLED; in nvme_timeout()
1369 if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { in nvme_timeout()
1370 atomic_inc(&dev->ctrl.abort_limit); in nvme_timeout()
1373 iod->aborted = true; in nvme_timeout()
1377 cmd.abort.sqid = cpu_to_le16(nvmeq->qid); in nvme_timeout()
1379 dev_warn(nvmeq->dev->ctrl.device, in nvme_timeout()
1381 req->tag, in nvme_timeout()
1382 nvme_get_opcode_str(nvme_req(req)->cmd->common.opcode), in nvme_timeout()
1383 nvmeq->qid); in nvme_timeout()
1385 abort_req = blk_mq_alloc_request(dev->ctrl.admin_q, nvme_req_op(&cmd), in nvme_timeout()
1388 atomic_inc(&dev->ctrl.abort_limit); in nvme_timeout()
1393 abort_req->end_io = abort_endio; in nvme_timeout()
1394 abort_req->end_io_data = NULL; in nvme_timeout()
1405 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) { in nvme_timeout()
1406 if (nvme_state_terminal(&dev->ctrl)) in nvme_timeout()
1407 nvme_dev_disable(dev, true); in nvme_timeout()
1411 nvme_dev_disable(dev, false); in nvme_timeout()
1412 if (nvme_try_sched_reset(&dev->ctrl)) in nvme_timeout()
1413 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_timeout()
1419 dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq), in nvme_free_queue()
1420 (void *)nvmeq->cqes, nvmeq->cq_dma_addr); in nvme_free_queue()
1421 if (!nvmeq->sq_cmds) in nvme_free_queue()
1424 if (test_and_clear_bit(NVMEQ_SQ_CMB, &nvmeq->flags)) { in nvme_free_queue()
1425 pci_free_p2pmem(to_pci_dev(nvmeq->dev->dev), in nvme_free_queue()
1426 nvmeq->sq_cmds, SQ_SIZE(nvmeq)); in nvme_free_queue()
1428 dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq), in nvme_free_queue()
1429 nvmeq->sq_cmds, nvmeq->sq_dma_addr); in nvme_free_queue()
1433 static void nvme_free_queues(struct nvme_dev *dev, int lowest) in nvme_free_queues() argument
1437 for (i = dev->ctrl.queue_count - 1; i >= lowest; i--) { in nvme_free_queues()
1438 dev->ctrl.queue_count--; in nvme_free_queues()
1439 nvme_free_queue(&dev->queues[i]); in nvme_free_queues()
1443 static void nvme_suspend_queue(struct nvme_dev *dev, unsigned int qid) in nvme_suspend_queue() argument
1445 struct nvme_queue *nvmeq = &dev->queues[qid]; in nvme_suspend_queue()
1447 if (!test_and_clear_bit(NVMEQ_ENABLED, &nvmeq->flags)) in nvme_suspend_queue()
1453 nvmeq->dev->online_queues--; in nvme_suspend_queue()
1454 if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) in nvme_suspend_queue()
1455 nvme_quiesce_admin_queue(&nvmeq->dev->ctrl); in nvme_suspend_queue()
1456 if (!test_and_clear_bit(NVMEQ_POLLED, &nvmeq->flags)) in nvme_suspend_queue()
1457 pci_free_irq(to_pci_dev(dev->dev), nvmeq->cq_vector, nvmeq); in nvme_suspend_queue()
1460 static void nvme_suspend_io_queues(struct nvme_dev *dev) in nvme_suspend_io_queues() argument
1464 for (i = dev->ctrl.queue_count - 1; i > 0; i--) in nvme_suspend_io_queues()
1465 nvme_suspend_queue(dev, i); in nvme_suspend_io_queues()
1474 static void nvme_reap_pending_cqes(struct nvme_dev *dev) in nvme_reap_pending_cqes() argument
1478 for (i = dev->ctrl.queue_count - 1; i > 0; i--) { in nvme_reap_pending_cqes()
1479 spin_lock(&dev->queues[i].cq_poll_lock); in nvme_reap_pending_cqes()
1480 nvme_poll_cq(&dev->queues[i], NULL); in nvme_reap_pending_cqes()
1481 spin_unlock(&dev->queues[i].cq_poll_lock); in nvme_reap_pending_cqes()
1485 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, in nvme_cmb_qdepth() argument
1488 int q_depth = dev->q_depth; in nvme_cmb_qdepth()
1492 if (q_size_aligned * nr_io_queues > dev->cmb_size) { in nvme_cmb_qdepth()
1493 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); in nvme_cmb_qdepth()
1504 return -ENOMEM; in nvme_cmb_qdepth()
1510 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, in nvme_alloc_sq_cmds() argument
1513 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_alloc_sq_cmds()
1515 if (qid && dev->cmb_use_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) { in nvme_alloc_sq_cmds()
1516 nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(nvmeq)); in nvme_alloc_sq_cmds()
1517 if (nvmeq->sq_cmds) { in nvme_alloc_sq_cmds()
1518 nvmeq->sq_dma_addr = pci_p2pmem_virt_to_bus(pdev, in nvme_alloc_sq_cmds()
1519 nvmeq->sq_cmds); in nvme_alloc_sq_cmds()
1520 if (nvmeq->sq_dma_addr) { in nvme_alloc_sq_cmds()
1521 set_bit(NVMEQ_SQ_CMB, &nvmeq->flags); in nvme_alloc_sq_cmds()
1525 pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(nvmeq)); in nvme_alloc_sq_cmds()
1529 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(nvmeq), in nvme_alloc_sq_cmds()
1530 &nvmeq->sq_dma_addr, GFP_KERNEL); in nvme_alloc_sq_cmds()
1531 if (!nvmeq->sq_cmds) in nvme_alloc_sq_cmds()
1532 return -ENOMEM; in nvme_alloc_sq_cmds()
1536 static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth) in nvme_alloc_queue() argument
1538 struct nvme_queue *nvmeq = &dev->queues[qid]; in nvme_alloc_queue()
1540 if (dev->ctrl.queue_count > qid) in nvme_alloc_queue()
1543 nvmeq->sqes = qid ? dev->io_sqes : NVME_ADM_SQES; in nvme_alloc_queue()
1544 nvmeq->q_depth = depth; in nvme_alloc_queue()
1545 nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(nvmeq), in nvme_alloc_queue()
1546 &nvmeq->cq_dma_addr, GFP_KERNEL); in nvme_alloc_queue()
1547 if (!nvmeq->cqes) in nvme_alloc_queue()
1550 if (nvme_alloc_sq_cmds(dev, nvmeq, qid)) in nvme_alloc_queue()
1553 nvmeq->dev = dev; in nvme_alloc_queue()
1554 spin_lock_init(&nvmeq->sq_lock); in nvme_alloc_queue()
1555 spin_lock_init(&nvmeq->cq_poll_lock); in nvme_alloc_queue()
1556 nvmeq->cq_head = 0; in nvme_alloc_queue()
1557 nvmeq->cq_phase = 1; in nvme_alloc_queue()
1558 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; in nvme_alloc_queue()
1559 nvmeq->qid = qid; in nvme_alloc_queue()
1560 dev->ctrl.queue_count++; in nvme_alloc_queue()
1565 dma_free_coherent(dev->dev, CQ_SIZE(nvmeq), (void *)nvmeq->cqes, in nvme_alloc_queue()
1566 nvmeq->cq_dma_addr); in nvme_alloc_queue()
1568 return -ENOMEM; in nvme_alloc_queue()
1573 struct pci_dev *pdev = to_pci_dev(nvmeq->dev->dev); in queue_request_irq()
1574 int nr = nvmeq->dev->ctrl.instance; in queue_request_irq()
1577 return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq_check, in queue_request_irq()
1578 nvme_irq, nvmeq, "nvme%dq%d", nr, nvmeq->qid); in queue_request_irq()
1580 return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq, in queue_request_irq()
1581 NULL, nvmeq, "nvme%dq%d", nr, nvmeq->qid); in queue_request_irq()
1587 struct nvme_dev *dev = nvmeq->dev; in nvme_init_queue() local
1589 nvmeq->sq_tail = 0; in nvme_init_queue()
1590 nvmeq->last_sq_tail = 0; in nvme_init_queue()
1591 nvmeq->cq_head = 0; in nvme_init_queue()
1592 nvmeq->cq_phase = 1; in nvme_init_queue()
1593 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; in nvme_init_queue()
1594 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq)); in nvme_init_queue()
1595 nvme_dbbuf_init(dev, nvmeq, qid); in nvme_init_queue()
1596 dev->online_queues++; in nvme_init_queue()
1603 static int nvme_setup_io_queues_trylock(struct nvme_dev *dev) in nvme_setup_io_queues_trylock() argument
1608 if (!mutex_trylock(&dev->shutdown_lock)) in nvme_setup_io_queues_trylock()
1609 return -ENODEV; in nvme_setup_io_queues_trylock()
1614 if (nvme_ctrl_state(&dev->ctrl) != NVME_CTRL_CONNECTING) { in nvme_setup_io_queues_trylock()
1615 mutex_unlock(&dev->shutdown_lock); in nvme_setup_io_queues_trylock()
1616 return -ENODEV; in nvme_setup_io_queues_trylock()
1624 struct nvme_dev *dev = nvmeq->dev; in nvme_create_queue() local
1628 clear_bit(NVMEQ_DELETE_ERROR, &nvmeq->flags); in nvme_create_queue()
1635 vector = dev->num_vecs == 1 ? 0 : qid; in nvme_create_queue()
1637 set_bit(NVMEQ_POLLED, &nvmeq->flags); in nvme_create_queue()
1639 result = adapter_alloc_cq(dev, qid, nvmeq, vector); in nvme_create_queue()
1643 result = adapter_alloc_sq(dev, qid, nvmeq); in nvme_create_queue()
1649 nvmeq->cq_vector = vector; in nvme_create_queue()
1651 result = nvme_setup_io_queues_trylock(dev); in nvme_create_queue()
1661 set_bit(NVMEQ_ENABLED, &nvmeq->flags); in nvme_create_queue()
1662 mutex_unlock(&dev->shutdown_lock); in nvme_create_queue()
1666 dev->online_queues--; in nvme_create_queue()
1667 mutex_unlock(&dev->shutdown_lock); in nvme_create_queue()
1668 adapter_delete_sq(dev, qid); in nvme_create_queue()
1670 adapter_delete_cq(dev, qid); in nvme_create_queue()
1694 static void nvme_dev_remove_admin(struct nvme_dev *dev) in nvme_dev_remove_admin() argument
1696 if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { in nvme_dev_remove_admin()
1702 nvme_unquiesce_admin_queue(&dev->ctrl); in nvme_dev_remove_admin()
1703 nvme_remove_admin_tag_set(&dev->ctrl); in nvme_dev_remove_admin()
1707 static unsigned long db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) in db_bar_size() argument
1709 return NVME_REG_DBS + ((nr_io_queues + 1) * 8 * dev->db_stride); in db_bar_size()
1712 static int nvme_remap_bar(struct nvme_dev *dev, unsigned long size) in nvme_remap_bar() argument
1714 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_remap_bar()
1716 if (size <= dev->bar_mapped_size) in nvme_remap_bar()
1719 return -ENOMEM; in nvme_remap_bar()
1720 if (dev->bar) in nvme_remap_bar()
1721 iounmap(dev->bar); in nvme_remap_bar()
1722 dev->bar = ioremap(pci_resource_start(pdev, 0), size); in nvme_remap_bar()
1723 if (!dev->bar) { in nvme_remap_bar()
1724 dev->bar_mapped_size = 0; in nvme_remap_bar()
1725 return -ENOMEM; in nvme_remap_bar()
1727 dev->bar_mapped_size = size; in nvme_remap_bar()
1728 dev->dbs = dev->bar + NVME_REG_DBS; in nvme_remap_bar()
1733 static int nvme_pci_configure_admin_queue(struct nvme_dev *dev) in nvme_pci_configure_admin_queue() argument
1739 result = nvme_remap_bar(dev, db_bar_size(dev, 0)); in nvme_pci_configure_admin_queue()
1743 dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? in nvme_pci_configure_admin_queue()
1744 NVME_CAP_NSSRC(dev->ctrl.cap) : 0; in nvme_pci_configure_admin_queue()
1746 if (dev->subsystem && in nvme_pci_configure_admin_queue()
1747 (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) in nvme_pci_configure_admin_queue()
1748 writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); in nvme_pci_configure_admin_queue()
1757 result = nvme_disable_ctrl(&dev->ctrl, false); in nvme_pci_configure_admin_queue()
1761 result = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); in nvme_pci_configure_admin_queue()
1765 dev->ctrl.numa_node = dev_to_node(dev->dev); in nvme_pci_configure_admin_queue()
1767 nvmeq = &dev->queues[0]; in nvme_pci_configure_admin_queue()
1768 aqa = nvmeq->q_depth - 1; in nvme_pci_configure_admin_queue()
1771 writel(aqa, dev->bar + NVME_REG_AQA); in nvme_pci_configure_admin_queue()
1772 lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); in nvme_pci_configure_admin_queue()
1773 lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); in nvme_pci_configure_admin_queue()
1775 result = nvme_enable_ctrl(&dev->ctrl); in nvme_pci_configure_admin_queue()
1779 nvmeq->cq_vector = 0; in nvme_pci_configure_admin_queue()
1783 dev->online_queues--; in nvme_pci_configure_admin_queue()
1787 set_bit(NVMEQ_ENABLED, &nvmeq->flags); in nvme_pci_configure_admin_queue()
1791 static int nvme_create_io_queues(struct nvme_dev *dev) in nvme_create_io_queues() argument
1796 for (i = dev->ctrl.queue_count; i <= dev->max_qid; i++) { in nvme_create_io_queues()
1797 if (nvme_alloc_queue(dev, i, dev->q_depth)) { in nvme_create_io_queues()
1798 ret = -ENOMEM; in nvme_create_io_queues()
1803 max = min(dev->max_qid, dev->ctrl.queue_count - 1); in nvme_create_io_queues()
1804 if (max != 1 && dev->io_queues[HCTX_TYPE_POLL]) { in nvme_create_io_queues()
1805 rw_queues = dev->io_queues[HCTX_TYPE_DEFAULT] + in nvme_create_io_queues()
1806 dev->io_queues[HCTX_TYPE_READ]; in nvme_create_io_queues()
1811 for (i = dev->online_queues; i <= max; i++) { in nvme_create_io_queues()
1814 ret = nvme_create_queue(&dev->queues[i], i, polled); in nvme_create_io_queues()
1828 static u64 nvme_cmb_size_unit(struct nvme_dev *dev) in nvme_cmb_size_unit() argument
1830 u8 szu = (dev->cmbsz >> NVME_CMBSZ_SZU_SHIFT) & NVME_CMBSZ_SZU_MASK; in nvme_cmb_size_unit()
1835 static u32 nvme_cmb_size(struct nvme_dev *dev) in nvme_cmb_size() argument
1837 return (dev->cmbsz >> NVME_CMBSZ_SZ_SHIFT) & NVME_CMBSZ_SZ_MASK; in nvme_cmb_size()
1840 static void nvme_map_cmb(struct nvme_dev *dev) in nvme_map_cmb() argument
1844 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_map_cmb()
1847 if (dev->cmb_size) in nvme_map_cmb()
1850 if (NVME_CAP_CMBS(dev->ctrl.cap)) in nvme_map_cmb()
1851 writel(NVME_CMBMSC_CRE, dev->bar + NVME_REG_CMBMSC); in nvme_map_cmb()
1853 dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); in nvme_map_cmb()
1854 if (!dev->cmbsz) in nvme_map_cmb()
1856 dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); in nvme_map_cmb()
1858 size = nvme_cmb_size_unit(dev) * nvme_cmb_size(dev); in nvme_map_cmb()
1859 offset = nvme_cmb_size_unit(dev) * NVME_CMB_OFST(dev->cmbloc); in nvme_map_cmb()
1860 bar = NVME_CMB_BIR(dev->cmbloc); in nvme_map_cmb()
1871 size = min(size, bar_size - offset); in nvme_map_cmb()
1882 if (NVME_CAP_CMBS(dev->ctrl.cap)) { in nvme_map_cmb()
1885 dev->bar + NVME_REG_CMBMSC); in nvme_map_cmb()
1889 dev_warn(dev->ctrl.device, in nvme_map_cmb()
1891 hi_lo_writeq(0, dev->bar + NVME_REG_CMBMSC); in nvme_map_cmb()
1895 dev->cmb_size = size; in nvme_map_cmb()
1896 dev->cmb_use_sqes = use_cmb_sqes && (dev->cmbsz & NVME_CMBSZ_SQS); in nvme_map_cmb()
1898 if ((dev->cmbsz & (NVME_CMBSZ_WDS | NVME_CMBSZ_RDS)) == in nvme_map_cmb()
1902 nvme_update_attrs(dev); in nvme_map_cmb()
1905 static int nvme_set_host_mem(struct nvme_dev *dev, u32 bits) in nvme_set_host_mem() argument
1907 u32 host_mem_size = dev->host_mem_size >> NVME_CTRL_PAGE_SHIFT; in nvme_set_host_mem()
1908 u64 dma_addr = dev->host_mem_descs_dma; in nvme_set_host_mem()
1918 c.features.dword15 = cpu_to_le32(dev->nr_host_mem_descs); in nvme_set_host_mem()
1920 ret = nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in nvme_set_host_mem()
1922 dev_warn(dev->ctrl.device, in nvme_set_host_mem()
1926 dev->hmb = bits & NVME_HOST_MEM_ENABLE; in nvme_set_host_mem()
1931 static void nvme_free_host_mem(struct nvme_dev *dev) in nvme_free_host_mem() argument
1935 for (i = 0; i < dev->nr_host_mem_descs; i++) { in nvme_free_host_mem()
1936 struct nvme_host_mem_buf_desc *desc = &dev->host_mem_descs[i]; in nvme_free_host_mem()
1937 size_t size = le32_to_cpu(desc->size) * NVME_CTRL_PAGE_SIZE; in nvme_free_host_mem()
1939 dma_free_attrs(dev->dev, size, dev->host_mem_desc_bufs[i], in nvme_free_host_mem()
1940 le64_to_cpu(desc->addr), in nvme_free_host_mem()
1944 kfree(dev->host_mem_desc_bufs); in nvme_free_host_mem()
1945 dev->host_mem_desc_bufs = NULL; in nvme_free_host_mem()
1946 dma_free_coherent(dev->dev, dev->host_mem_descs_size, in nvme_free_host_mem()
1947 dev->host_mem_descs, dev->host_mem_descs_dma); in nvme_free_host_mem()
1948 dev->host_mem_descs = NULL; in nvme_free_host_mem()
1949 dev->host_mem_descs_size = 0; in nvme_free_host_mem()
1950 dev->nr_host_mem_descs = 0; in nvme_free_host_mem()
1953 static int __nvme_alloc_host_mem(struct nvme_dev *dev, u64 preferred, in __nvme_alloc_host_mem() argument
1963 tmp = (preferred + chunk_size - 1); in __nvme_alloc_host_mem()
1967 if (dev->ctrl.hmmaxd && dev->ctrl.hmmaxd < max_entries) in __nvme_alloc_host_mem()
1968 max_entries = dev->ctrl.hmmaxd; in __nvme_alloc_host_mem()
1971 descs = dma_alloc_coherent(dev->dev, descs_size, &descs_dma, in __nvme_alloc_host_mem()
1983 len = min_t(u64, chunk_size, preferred - size); in __nvme_alloc_host_mem()
1984 bufs[i] = dma_alloc_attrs(dev->dev, len, &dma_addr, GFP_KERNEL, in __nvme_alloc_host_mem()
1997 dev->nr_host_mem_descs = i; in __nvme_alloc_host_mem()
1998 dev->host_mem_size = size; in __nvme_alloc_host_mem()
1999 dev->host_mem_descs = descs; in __nvme_alloc_host_mem()
2000 dev->host_mem_descs_dma = descs_dma; in __nvme_alloc_host_mem()
2001 dev->host_mem_descs_size = descs_size; in __nvme_alloc_host_mem()
2002 dev->host_mem_desc_bufs = bufs; in __nvme_alloc_host_mem()
2006 while (--i >= 0) { in __nvme_alloc_host_mem()
2009 dma_free_attrs(dev->dev, size, bufs[i], in __nvme_alloc_host_mem()
2016 dma_free_coherent(dev->dev, descs_size, descs, descs_dma); in __nvme_alloc_host_mem()
2018 dev->host_mem_descs = NULL; in __nvme_alloc_host_mem()
2019 return -ENOMEM; in __nvme_alloc_host_mem()
2022 static int nvme_alloc_host_mem(struct nvme_dev *dev, u64 min, u64 preferred) in nvme_alloc_host_mem() argument
2025 u64 hmminds = max_t(u32, dev->ctrl.hmminds * 4096, PAGE_SIZE * 2); in nvme_alloc_host_mem()
2030 if (!__nvme_alloc_host_mem(dev, preferred, chunk_size)) { in nvme_alloc_host_mem()
2031 if (!min || dev->host_mem_size >= min) in nvme_alloc_host_mem()
2033 nvme_free_host_mem(dev); in nvme_alloc_host_mem()
2037 return -ENOMEM; in nvme_alloc_host_mem()
2040 static int nvme_setup_host_mem(struct nvme_dev *dev) in nvme_setup_host_mem() argument
2043 u64 preferred = (u64)dev->ctrl.hmpre * 4096; in nvme_setup_host_mem()
2044 u64 min = (u64)dev->ctrl.hmmin * 4096; in nvme_setup_host_mem()
2048 if (!dev->ctrl.hmpre) in nvme_setup_host_mem()
2053 dev_warn(dev->ctrl.device, in nvme_setup_host_mem()
2056 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2063 if (dev->host_mem_descs) { in nvme_setup_host_mem()
2064 if (dev->host_mem_size >= min) in nvme_setup_host_mem()
2067 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2070 if (!dev->host_mem_descs) { in nvme_setup_host_mem()
2071 if (nvme_alloc_host_mem(dev, min, preferred)) { in nvme_setup_host_mem()
2072 dev_warn(dev->ctrl.device, in nvme_setup_host_mem()
2077 dev_info(dev->ctrl.device, in nvme_setup_host_mem()
2079 dev->host_mem_size >> ilog2(SZ_1M)); in nvme_setup_host_mem()
2082 ret = nvme_set_host_mem(dev, enable_bits); in nvme_setup_host_mem()
2084 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2088 static ssize_t cmb_show(struct device *dev, struct device_attribute *attr, in cmb_show() argument
2091 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in cmb_show()
2094 ndev->cmbloc, ndev->cmbsz); in cmb_show()
2098 static ssize_t cmbloc_show(struct device *dev, struct device_attribute *attr, in cmbloc_show() argument
2101 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in cmbloc_show()
2103 return sysfs_emit(buf, "%u\n", ndev->cmbloc); in cmbloc_show()
2107 static ssize_t cmbsz_show(struct device *dev, struct device_attribute *attr, in cmbsz_show() argument
2110 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in cmbsz_show()
2112 return sysfs_emit(buf, "%u\n", ndev->cmbsz); in cmbsz_show()
2116 static ssize_t hmb_show(struct device *dev, struct device_attribute *attr, in hmb_show() argument
2119 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in hmb_show()
2121 return sysfs_emit(buf, "%d\n", ndev->hmb); in hmb_show()
2124 static ssize_t hmb_store(struct device *dev, struct device_attribute *attr, in hmb_store() argument
2127 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in hmb_store()
2132 return -EINVAL; in hmb_store()
2134 if (new == ndev->hmb) in hmb_store()
2155 struct nvme_ctrl *ctrl = in nvme_pci_attrs_are_visible() local
2157 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_attrs_are_visible() local
2162 if (!dev->cmbsz) in nvme_pci_attrs_are_visible()
2165 if (a == &dev_attr_hmb.attr && !ctrl->hmpre) in nvme_pci_attrs_are_visible()
2168 return a->mode; in nvme_pci_attrs_are_visible()
2190 static void nvme_update_attrs(struct nvme_dev *dev) in nvme_update_attrs() argument
2192 sysfs_update_group(&dev->ctrl.device->kobj, &nvme_pci_dev_attrs_group); in nvme_update_attrs()
2201 struct nvme_dev *dev = affd->priv; in nvme_calc_irq_sets() local
2202 unsigned int nr_read_queues, nr_write_queues = dev->nr_write_queues; in nvme_calc_irq_sets()
2223 nr_read_queues = nrirqs - nr_write_queues; in nvme_calc_irq_sets()
2226 dev->io_queues[HCTX_TYPE_DEFAULT] = nrirqs - nr_read_queues; in nvme_calc_irq_sets()
2227 affd->set_size[HCTX_TYPE_DEFAULT] = nrirqs - nr_read_queues; in nvme_calc_irq_sets()
2228 dev->io_queues[HCTX_TYPE_READ] = nr_read_queues; in nvme_calc_irq_sets()
2229 affd->set_size[HCTX_TYPE_READ] = nr_read_queues; in nvme_calc_irq_sets()
2230 affd->nr_sets = nr_read_queues ? 2 : 1; in nvme_calc_irq_sets()
2233 static int nvme_setup_irqs(struct nvme_dev *dev, unsigned int nr_io_queues) in nvme_setup_irqs() argument
2235 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_setup_irqs()
2239 .priv = dev, in nvme_setup_irqs()
2246 * left over for non-polled I/O. in nvme_setup_irqs()
2248 poll_queues = min(dev->nr_poll_queues, nr_io_queues - 1); in nvme_setup_irqs()
2249 dev->io_queues[HCTX_TYPE_POLL] = poll_queues; in nvme_setup_irqs()
2255 dev->io_queues[HCTX_TYPE_DEFAULT] = 1; in nvme_setup_irqs()
2256 dev->io_queues[HCTX_TYPE_READ] = 0; in nvme_setup_irqs()
2259 * We need interrupts for the admin queue and each non-polled I/O queue, in nvme_setup_irqs()
2264 if (!(dev->ctrl.quirks & NVME_QUIRK_SINGLE_VECTOR)) in nvme_setup_irqs()
2265 irq_queues += (nr_io_queues - poll_queues); in nvme_setup_irqs()
2266 if (dev->ctrl.quirks & NVME_QUIRK_BROKEN_MSI) in nvme_setup_irqs()
2272 static unsigned int nvme_max_io_queues(struct nvme_dev *dev) in nvme_max_io_queues() argument
2278 if (dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) in nvme_max_io_queues()
2280 return num_possible_cpus() + dev->nr_write_queues + dev->nr_poll_queues; in nvme_max_io_queues()
2283 static int nvme_setup_io_queues(struct nvme_dev *dev) in nvme_setup_io_queues() argument
2285 struct nvme_queue *adminq = &dev->queues[0]; in nvme_setup_io_queues()
2286 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_setup_io_queues()
2295 dev->nr_write_queues = write_queues; in nvme_setup_io_queues()
2296 dev->nr_poll_queues = poll_queues; in nvme_setup_io_queues()
2298 nr_io_queues = dev->nr_allocated_queues - 1; in nvme_setup_io_queues()
2299 result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); in nvme_setup_io_queues()
2313 result = nvme_setup_io_queues_trylock(dev); in nvme_setup_io_queues()
2316 if (test_and_clear_bit(NVMEQ_ENABLED, &adminq->flags)) in nvme_setup_io_queues()
2319 if (dev->cmb_use_sqes) { in nvme_setup_io_queues()
2320 result = nvme_cmb_qdepth(dev, nr_io_queues, in nvme_setup_io_queues()
2323 dev->q_depth = result; in nvme_setup_io_queues()
2324 dev->ctrl.sqsize = result - 1; in nvme_setup_io_queues()
2326 dev->cmb_use_sqes = false; in nvme_setup_io_queues()
2331 size = db_bar_size(dev, nr_io_queues); in nvme_setup_io_queues()
2332 result = nvme_remap_bar(dev, size); in nvme_setup_io_queues()
2335 if (!--nr_io_queues) { in nvme_setup_io_queues()
2336 result = -ENOMEM; in nvme_setup_io_queues()
2340 adminq->q_db = dev->dbs; in nvme_setup_io_queues()
2344 if (test_and_clear_bit(NVMEQ_ENABLED, &adminq->flags)) in nvme_setup_io_queues()
2353 result = nvme_setup_irqs(dev, nr_io_queues); in nvme_setup_io_queues()
2355 result = -EIO; in nvme_setup_io_queues()
2359 dev->num_vecs = result; in nvme_setup_io_queues()
2360 result = max(result - 1, 1); in nvme_setup_io_queues()
2361 dev->max_qid = result + dev->io_queues[HCTX_TYPE_POLL]; in nvme_setup_io_queues()
2372 set_bit(NVMEQ_ENABLED, &adminq->flags); in nvme_setup_io_queues()
2373 mutex_unlock(&dev->shutdown_lock); in nvme_setup_io_queues()
2375 result = nvme_create_io_queues(dev); in nvme_setup_io_queues()
2376 if (result || dev->online_queues < 2) in nvme_setup_io_queues()
2379 if (dev->online_queues - 1 < dev->max_qid) { in nvme_setup_io_queues()
2380 nr_io_queues = dev->online_queues - 1; in nvme_setup_io_queues()
2381 nvme_delete_io_queues(dev); in nvme_setup_io_queues()
2382 result = nvme_setup_io_queues_trylock(dev); in nvme_setup_io_queues()
2385 nvme_suspend_io_queues(dev); in nvme_setup_io_queues()
2388 dev_info(dev->ctrl.device, "%d/%d/%d default/read/poll queues\n", in nvme_setup_io_queues()
2389 dev->io_queues[HCTX_TYPE_DEFAULT], in nvme_setup_io_queues()
2390 dev->io_queues[HCTX_TYPE_READ], in nvme_setup_io_queues()
2391 dev->io_queues[HCTX_TYPE_POLL]); in nvme_setup_io_queues()
2394 mutex_unlock(&dev->shutdown_lock); in nvme_setup_io_queues()
2401 struct nvme_queue *nvmeq = req->end_io_data; in nvme_del_queue_end()
2404 complete(&nvmeq->delete_done); in nvme_del_queue_end()
2411 struct nvme_queue *nvmeq = req->end_io_data; in nvme_del_cq_end()
2414 set_bit(NVMEQ_DELETE_ERROR, &nvmeq->flags); in nvme_del_cq_end()
2421 struct request_queue *q = nvmeq->dev->ctrl.admin_q; in nvme_delete_queue()
2426 cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); in nvme_delete_queue()
2434 req->end_io = nvme_del_cq_end; in nvme_delete_queue()
2436 req->end_io = nvme_del_queue_end; in nvme_delete_queue()
2437 req->end_io_data = nvmeq; in nvme_delete_queue()
2439 init_completion(&nvmeq->delete_done); in nvme_delete_queue()
2444 static bool __nvme_delete_io_queues(struct nvme_dev *dev, u8 opcode) in __nvme_delete_io_queues() argument
2446 int nr_queues = dev->online_queues - 1, sent = 0; in __nvme_delete_io_queues()
2452 if (nvme_delete_queue(&dev->queues[nr_queues], opcode)) in __nvme_delete_io_queues()
2454 nr_queues--; in __nvme_delete_io_queues()
2458 struct nvme_queue *nvmeq = &dev->queues[nr_queues + sent]; in __nvme_delete_io_queues()
2460 timeout = wait_for_completion_io_timeout(&nvmeq->delete_done, in __nvme_delete_io_queues()
2465 sent--; in __nvme_delete_io_queues()
2472 static void nvme_delete_io_queues(struct nvme_dev *dev) in nvme_delete_io_queues() argument
2474 if (__nvme_delete_io_queues(dev, nvme_admin_delete_sq)) in nvme_delete_io_queues()
2475 __nvme_delete_io_queues(dev, nvme_admin_delete_cq); in nvme_delete_io_queues()
2478 static unsigned int nvme_pci_nr_maps(struct nvme_dev *dev) in nvme_pci_nr_maps() argument
2480 if (dev->io_queues[HCTX_TYPE_POLL]) in nvme_pci_nr_maps()
2482 if (dev->io_queues[HCTX_TYPE_READ]) in nvme_pci_nr_maps()
2487 static bool nvme_pci_update_nr_queues(struct nvme_dev *dev) in nvme_pci_update_nr_queues() argument
2489 if (!dev->ctrl.tagset) { in nvme_pci_update_nr_queues()
2490 nvme_alloc_io_tag_set(&dev->ctrl, &dev->tagset, &nvme_mq_ops, in nvme_pci_update_nr_queues()
2491 nvme_pci_nr_maps(dev), sizeof(struct nvme_iod)); in nvme_pci_update_nr_queues()
2496 if (!mutex_trylock(&dev->shutdown_lock)) in nvme_pci_update_nr_queues()
2500 if (!dev->online_queues) { in nvme_pci_update_nr_queues()
2501 mutex_unlock(&dev->shutdown_lock); in nvme_pci_update_nr_queues()
2505 blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); in nvme_pci_update_nr_queues()
2507 nvme_free_queues(dev, dev->online_queues); in nvme_pci_update_nr_queues()
2508 mutex_unlock(&dev->shutdown_lock); in nvme_pci_update_nr_queues()
2512 static int nvme_pci_enable(struct nvme_dev *dev) in nvme_pci_enable() argument
2514 int result = -ENOMEM; in nvme_pci_enable()
2515 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_pci_enable()
2523 if (readl(dev->bar + NVME_REG_CSTS) == -1) { in nvme_pci_enable()
2524 result = -ENODEV; in nvme_pci_enable()
2530 * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll in nvme_pci_enable()
2533 if (dev->ctrl.quirks & NVME_QUIRK_BROKEN_MSI) in nvme_pci_enable()
2539 dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP); in nvme_pci_enable()
2541 dev->q_depth = min_t(u32, NVME_CAP_MQES(dev->ctrl.cap) + 1, in nvme_pci_enable()
2543 dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap); in nvme_pci_enable()
2544 dev->dbs = dev->bar + 4096; in nvme_pci_enable()
2547 * Some Apple controllers require a non-standard SQE size. in nvme_pci_enable()
2551 if (dev->ctrl.quirks & NVME_QUIRK_128_BYTES_SQES) in nvme_pci_enable()
2552 dev->io_sqes = 7; in nvme_pci_enable()
2554 dev->io_sqes = NVME_NVM_IOSQES; in nvme_pci_enable()
2556 if (dev->ctrl.quirks & NVME_QUIRK_QDEPTH_ONE) { in nvme_pci_enable()
2557 dev->q_depth = 2; in nvme_pci_enable()
2558 } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG && in nvme_pci_enable()
2559 (pdev->device == 0xa821 || pdev->device == 0xa822) && in nvme_pci_enable()
2560 NVME_CAP_MQES(dev->ctrl.cap) == 0) { in nvme_pci_enable()
2561 dev->q_depth = 64; in nvme_pci_enable()
2562 dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, " in nvme_pci_enable()
2563 "set queue depth=%u\n", dev->q_depth); in nvme_pci_enable()
2570 if ((dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) && in nvme_pci_enable()
2571 (dev->q_depth < (NVME_AQ_DEPTH + 2))) { in nvme_pci_enable()
2572 dev->q_depth = NVME_AQ_DEPTH + 2; in nvme_pci_enable()
2573 dev_warn(dev->ctrl.device, "IO queue depth clamped to %d\n", in nvme_pci_enable()
2574 dev->q_depth); in nvme_pci_enable()
2576 dev->ctrl.sqsize = dev->q_depth - 1; /* 0's based queue depth */ in nvme_pci_enable()
2578 nvme_map_cmb(dev); in nvme_pci_enable()
2582 result = nvme_pci_configure_admin_queue(dev); in nvme_pci_enable()
2594 static void nvme_dev_unmap(struct nvme_dev *dev) in nvme_dev_unmap() argument
2596 if (dev->bar) in nvme_dev_unmap()
2597 iounmap(dev->bar); in nvme_dev_unmap()
2598 pci_release_mem_regions(to_pci_dev(dev->dev)); in nvme_dev_unmap()
2601 static bool nvme_pci_ctrl_is_dead(struct nvme_dev *dev) in nvme_pci_ctrl_is_dead() argument
2603 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_pci_ctrl_is_dead()
2608 if (pdev->error_state != pci_channel_io_normal) in nvme_pci_ctrl_is_dead()
2611 csts = readl(dev->bar + NVME_REG_CSTS); in nvme_pci_ctrl_is_dead()
2615 static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) in nvme_dev_disable() argument
2617 enum nvme_ctrl_state state = nvme_ctrl_state(&dev->ctrl); in nvme_dev_disable()
2618 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_dev_disable()
2621 mutex_lock(&dev->shutdown_lock); in nvme_dev_disable()
2622 dead = nvme_pci_ctrl_is_dead(dev); in nvme_dev_disable()
2625 nvme_start_freeze(&dev->ctrl); in nvme_dev_disable()
2631 nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT); in nvme_dev_disable()
2634 nvme_quiesce_io_queues(&dev->ctrl); in nvme_dev_disable()
2636 if (!dead && dev->ctrl.queue_count > 0) { in nvme_dev_disable()
2637 nvme_delete_io_queues(dev); in nvme_dev_disable()
2638 nvme_disable_ctrl(&dev->ctrl, shutdown); in nvme_dev_disable()
2639 nvme_poll_irqdisable(&dev->queues[0]); in nvme_dev_disable()
2641 nvme_suspend_io_queues(dev); in nvme_dev_disable()
2642 nvme_suspend_queue(dev, 0); in nvme_dev_disable()
2646 nvme_reap_pending_cqes(dev); in nvme_dev_disable()
2648 nvme_cancel_tagset(&dev->ctrl); in nvme_dev_disable()
2649 nvme_cancel_admin_tagset(&dev->ctrl); in nvme_dev_disable()
2654 * deadlocking blk-mq hot-cpu notifier. in nvme_dev_disable()
2657 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_dev_disable()
2658 if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) in nvme_dev_disable()
2659 nvme_unquiesce_admin_queue(&dev->ctrl); in nvme_dev_disable()
2661 mutex_unlock(&dev->shutdown_lock); in nvme_dev_disable()
2664 static int nvme_disable_prepare_reset(struct nvme_dev *dev, bool shutdown) in nvme_disable_prepare_reset() argument
2666 if (!nvme_wait_reset(&dev->ctrl)) in nvme_disable_prepare_reset()
2667 return -EBUSY; in nvme_disable_prepare_reset()
2668 nvme_dev_disable(dev, shutdown); in nvme_disable_prepare_reset()
2672 static int nvme_setup_prp_pools(struct nvme_dev *dev) in nvme_setup_prp_pools() argument
2676 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, in nvme_setup_prp_pools()
2679 if (!dev->prp_page_pool) in nvme_setup_prp_pools()
2680 return -ENOMEM; in nvme_setup_prp_pools()
2682 if (dev->ctrl.quirks & NVME_QUIRK_DMAPOOL_ALIGN_512) in nvme_setup_prp_pools()
2686 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, in nvme_setup_prp_pools()
2688 if (!dev->prp_small_pool) { in nvme_setup_prp_pools()
2689 dma_pool_destroy(dev->prp_page_pool); in nvme_setup_prp_pools()
2690 return -ENOMEM; in nvme_setup_prp_pools()
2695 static void nvme_release_prp_pools(struct nvme_dev *dev) in nvme_release_prp_pools() argument
2697 dma_pool_destroy(dev->prp_page_pool); in nvme_release_prp_pools()
2698 dma_pool_destroy(dev->prp_small_pool); in nvme_release_prp_pools()
2701 static int nvme_pci_alloc_iod_mempool(struct nvme_dev *dev) in nvme_pci_alloc_iod_mempool() argument
2705 dev->iod_mempool = mempool_create_node(1, in nvme_pci_alloc_iod_mempool()
2708 dev_to_node(dev->dev)); in nvme_pci_alloc_iod_mempool()
2709 if (!dev->iod_mempool) in nvme_pci_alloc_iod_mempool()
2710 return -ENOMEM; in nvme_pci_alloc_iod_mempool()
2714 static void nvme_free_tagset(struct nvme_dev *dev) in nvme_free_tagset() argument
2716 if (dev->tagset.tags) in nvme_free_tagset()
2717 nvme_remove_io_tag_set(&dev->ctrl); in nvme_free_tagset()
2718 dev->ctrl.tagset = NULL; in nvme_free_tagset()
2722 static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) in nvme_pci_free_ctrl() argument
2724 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_free_ctrl() local
2726 nvme_free_tagset(dev); in nvme_pci_free_ctrl()
2727 put_device(dev->dev); in nvme_pci_free_ctrl()
2728 kfree(dev->queues); in nvme_pci_free_ctrl()
2729 kfree(dev); in nvme_pci_free_ctrl()
2734 struct nvme_dev *dev = in nvme_reset_work() local
2735 container_of(work, struct nvme_dev, ctrl.reset_work); in nvme_reset_work()
2736 bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); in nvme_reset_work()
2739 if (nvme_ctrl_state(&dev->ctrl) != NVME_CTRL_RESETTING) { in nvme_reset_work()
2740 dev_warn(dev->ctrl.device, "ctrl state %d is not RESETTING\n", in nvme_reset_work()
2741 dev->ctrl.state); in nvme_reset_work()
2742 result = -ENODEV; in nvme_reset_work()
2750 if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) in nvme_reset_work()
2751 nvme_dev_disable(dev, false); in nvme_reset_work()
2752 nvme_sync_queues(&dev->ctrl); in nvme_reset_work()
2754 mutex_lock(&dev->shutdown_lock); in nvme_reset_work()
2755 result = nvme_pci_enable(dev); in nvme_reset_work()
2758 nvme_unquiesce_admin_queue(&dev->ctrl); in nvme_reset_work()
2759 mutex_unlock(&dev->shutdown_lock); in nvme_reset_work()
2762 * Introduce CONNECTING state from nvme-fc/rdma transports to mark the in nvme_reset_work()
2765 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_CONNECTING)) { in nvme_reset_work()
2766 dev_warn(dev->ctrl.device, in nvme_reset_work()
2768 result = -EBUSY; in nvme_reset_work()
2772 result = nvme_init_ctrl_finish(&dev->ctrl, was_suspend); in nvme_reset_work()
2776 nvme_dbbuf_dma_alloc(dev); in nvme_reset_work()
2778 result = nvme_setup_host_mem(dev); in nvme_reset_work()
2782 result = nvme_setup_io_queues(dev); in nvme_reset_work()
2791 if (dev->online_queues > 1) { in nvme_reset_work()
2792 nvme_dbbuf_set(dev); in nvme_reset_work()
2793 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_reset_work()
2794 nvme_wait_freeze(&dev->ctrl); in nvme_reset_work()
2795 if (!nvme_pci_update_nr_queues(dev)) in nvme_reset_work()
2797 nvme_unfreeze(&dev->ctrl); in nvme_reset_work()
2799 dev_warn(dev->ctrl.device, "IO queues lost\n"); in nvme_reset_work()
2800 nvme_mark_namespaces_dead(&dev->ctrl); in nvme_reset_work()
2801 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_reset_work()
2802 nvme_remove_namespaces(&dev->ctrl); in nvme_reset_work()
2803 nvme_free_tagset(dev); in nvme_reset_work()
2810 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { in nvme_reset_work()
2811 dev_warn(dev->ctrl.device, in nvme_reset_work()
2813 result = -ENODEV; in nvme_reset_work()
2817 nvme_start_ctrl(&dev->ctrl); in nvme_reset_work()
2821 mutex_unlock(&dev->shutdown_lock); in nvme_reset_work()
2827 dev_warn(dev->ctrl.device, "Disabling device after reset failure: %d\n", in nvme_reset_work()
2829 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_reset_work()
2830 nvme_dev_disable(dev, true); in nvme_reset_work()
2831 nvme_sync_queues(&dev->ctrl); in nvme_reset_work()
2832 nvme_mark_namespaces_dead(&dev->ctrl); in nvme_reset_work()
2833 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_reset_work()
2834 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); in nvme_reset_work()
2837 static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) in nvme_pci_reg_read32() argument
2839 *val = readl(to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_read32()
2843 static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) in nvme_pci_reg_write32() argument
2845 writel(val, to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_write32()
2849 static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) in nvme_pci_reg_read64() argument
2851 *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_read64()
2855 static int nvme_pci_get_address(struct nvme_ctrl *ctrl, char *buf, int size) in nvme_pci_get_address() argument
2857 struct pci_dev *pdev = to_pci_dev(to_nvme_dev(ctrl)->dev); in nvme_pci_get_address()
2859 return snprintf(buf, size, "%s\n", dev_name(&pdev->dev)); in nvme_pci_get_address()
2862 static void nvme_pci_print_device_info(struct nvme_ctrl *ctrl) in nvme_pci_print_device_info() argument
2864 struct pci_dev *pdev = to_pci_dev(to_nvme_dev(ctrl)->dev); in nvme_pci_print_device_info()
2865 struct nvme_subsystem *subsys = ctrl->subsys; in nvme_pci_print_device_info()
2867 dev_err(ctrl->device, in nvme_pci_print_device_info()
2869 pdev->vendor, pdev->device, in nvme_pci_print_device_info()
2870 nvme_strlen(subsys->model, sizeof(subsys->model)), in nvme_pci_print_device_info()
2871 subsys->model, nvme_strlen(subsys->firmware_rev, in nvme_pci_print_device_info()
2872 sizeof(subsys->firmware_rev)), in nvme_pci_print_device_info()
2873 subsys->firmware_rev); in nvme_pci_print_device_info()
2876 static bool nvme_pci_supports_pci_p2pdma(struct nvme_ctrl *ctrl) in nvme_pci_supports_pci_p2pdma() argument
2878 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_supports_pci_p2pdma() local
2880 return dma_pci_p2pdma_supported(dev->dev); in nvme_pci_supports_pci_p2pdma()
2898 static int nvme_dev_map(struct nvme_dev *dev) in nvme_dev_map() argument
2900 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_dev_map()
2903 return -ENODEV; in nvme_dev_map()
2905 if (nvme_remap_bar(dev, NVME_REG_DBS + 4096)) in nvme_dev_map()
2911 return -ENODEV; in nvme_dev_map()
2916 if (pdev->vendor == 0x144d && pdev->device == 0xa802) { in check_vendor_combination_bug()
2929 } else if (pdev->vendor == 0x144d && pdev->device == 0xa804) { in check_vendor_combination_bug()
2932 * suspend on a Ryzen board, ASUS PRIME B350M-A, as well as in check_vendor_combination_bug()
2933 * within few minutes after bootup on a Coffee Lake board - in check_vendor_combination_bug()
2934 * ASUS PRIME Z370-A in check_vendor_combination_bug()
2937 (dmi_match(DMI_BOARD_NAME, "PRIME B350M-A") || in check_vendor_combination_bug()
2938 dmi_match(DMI_BOARD_NAME, "PRIME Z370-A"))) in check_vendor_combination_bug()
2940 } else if ((pdev->vendor == 0x144d && (pdev->device == 0xa801 || in check_vendor_combination_bug()
2941 pdev->device == 0xa808 || pdev->device == 0xa809)) || in check_vendor_combination_bug()
2942 (pdev->vendor == 0x1e0f && pdev->device == 0x0001)) { in check_vendor_combination_bug()
2952 } else if (pdev->vendor == 0x2646 && (pdev->device == 0x2263 || in check_vendor_combination_bug()
2953 pdev->device == 0x500f)) { in check_vendor_combination_bug()
2964 } else if (pdev->vendor == 0x144d && pdev->device == 0xa80d) { in check_vendor_combination_bug()
2970 if (dmi_match(DMI_BOARD_NAME, "DN50Z-140HC-YD") || in check_vendor_combination_bug()
2983 if (dmi_match(DMI_BOARD_NAME, "LXKT-ZXEG-N6")) in check_vendor_combination_bug()
2992 unsigned long quirks = id->driver_data; in nvme_pci_alloc_dev()
2993 int node = dev_to_node(&pdev->dev); in nvme_pci_alloc_dev()
2994 struct nvme_dev *dev; in nvme_pci_alloc_dev() local
2995 int ret = -ENOMEM; in nvme_pci_alloc_dev()
2997 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); in nvme_pci_alloc_dev()
2998 if (!dev) in nvme_pci_alloc_dev()
2999 return ERR_PTR(-ENOMEM); in nvme_pci_alloc_dev()
3000 INIT_WORK(&dev->ctrl.reset_work, nvme_reset_work); in nvme_pci_alloc_dev()
3001 mutex_init(&dev->shutdown_lock); in nvme_pci_alloc_dev()
3003 dev->nr_write_queues = write_queues; in nvme_pci_alloc_dev()
3004 dev->nr_poll_queues = poll_queues; in nvme_pci_alloc_dev()
3005 dev->nr_allocated_queues = nvme_max_io_queues(dev) + 1; in nvme_pci_alloc_dev()
3006 dev->queues = kcalloc_node(dev->nr_allocated_queues, in nvme_pci_alloc_dev()
3008 if (!dev->queues) in nvme_pci_alloc_dev()
3011 dev->dev = get_device(&pdev->dev); in nvme_pci_alloc_dev()
3016 acpi_storage_d3(&pdev->dev)) { in nvme_pci_alloc_dev()
3021 dev_info(&pdev->dev, in nvme_pci_alloc_dev()
3025 ret = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, in nvme_pci_alloc_dev()
3030 if (dev->ctrl.quirks & NVME_QUIRK_DMA_ADDRESS_BITS_48) in nvme_pci_alloc_dev()
3031 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); in nvme_pci_alloc_dev()
3033 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in nvme_pci_alloc_dev()
3034 dma_set_min_align_mask(&pdev->dev, NVME_CTRL_PAGE_SIZE - 1); in nvme_pci_alloc_dev()
3035 dma_set_max_seg_size(&pdev->dev, 0xffffffff); in nvme_pci_alloc_dev()
3038 * Limit the max command size to prevent iod->sg allocations going in nvme_pci_alloc_dev()
3041 dev->ctrl.max_hw_sectors = min_t(u32, in nvme_pci_alloc_dev()
3042 NVME_MAX_KB_SZ << 1, dma_opt_mapping_size(&pdev->dev) >> 9); in nvme_pci_alloc_dev()
3043 dev->ctrl.max_segments = NVME_MAX_SEGS; in nvme_pci_alloc_dev()
3049 dev->ctrl.max_integrity_segments = 1; in nvme_pci_alloc_dev()
3050 return dev; in nvme_pci_alloc_dev()
3053 put_device(dev->dev); in nvme_pci_alloc_dev()
3054 kfree(dev->queues); in nvme_pci_alloc_dev()
3056 kfree(dev); in nvme_pci_alloc_dev()
3062 struct nvme_dev *dev; in nvme_probe() local
3063 int result = -ENOMEM; in nvme_probe()
3065 dev = nvme_pci_alloc_dev(pdev, id); in nvme_probe()
3066 if (IS_ERR(dev)) in nvme_probe()
3067 return PTR_ERR(dev); in nvme_probe()
3069 result = nvme_dev_map(dev); in nvme_probe()
3073 result = nvme_setup_prp_pools(dev); in nvme_probe()
3077 result = nvme_pci_alloc_iod_mempool(dev); in nvme_probe()
3081 dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); in nvme_probe()
3083 result = nvme_pci_enable(dev); in nvme_probe()
3087 result = nvme_alloc_admin_tag_set(&dev->ctrl, &dev->admin_tagset, in nvme_probe()
3096 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_CONNECTING)) { in nvme_probe()
3097 dev_warn(dev->ctrl.device, in nvme_probe()
3099 result = -EBUSY; in nvme_probe()
3103 result = nvme_init_ctrl_finish(&dev->ctrl, false); in nvme_probe()
3107 nvme_dbbuf_dma_alloc(dev); in nvme_probe()
3109 result = nvme_setup_host_mem(dev); in nvme_probe()
3113 result = nvme_setup_io_queues(dev); in nvme_probe()
3117 if (dev->online_queues > 1) { in nvme_probe()
3118 nvme_alloc_io_tag_set(&dev->ctrl, &dev->tagset, &nvme_mq_ops, in nvme_probe()
3119 nvme_pci_nr_maps(dev), sizeof(struct nvme_iod)); in nvme_probe()
3120 nvme_dbbuf_set(dev); in nvme_probe()
3123 if (!dev->ctrl.tagset) in nvme_probe()
3124 dev_warn(dev->ctrl.device, "IO queues not created\n"); in nvme_probe()
3126 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { in nvme_probe()
3127 dev_warn(dev->ctrl.device, in nvme_probe()
3129 result = -ENODEV; in nvme_probe()
3133 pci_set_drvdata(pdev, dev); in nvme_probe()
3135 nvme_start_ctrl(&dev->ctrl); in nvme_probe()
3136 nvme_put_ctrl(&dev->ctrl); in nvme_probe()
3137 flush_work(&dev->ctrl.scan_work); in nvme_probe()
3141 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_probe()
3142 nvme_dev_disable(dev, true); in nvme_probe()
3143 nvme_free_host_mem(dev); in nvme_probe()
3144 nvme_dev_remove_admin(dev); in nvme_probe()
3145 nvme_dbbuf_dma_free(dev); in nvme_probe()
3146 nvme_free_queues(dev, 0); in nvme_probe()
3148 mempool_destroy(dev->iod_mempool); in nvme_probe()
3150 nvme_release_prp_pools(dev); in nvme_probe()
3152 nvme_dev_unmap(dev); in nvme_probe()
3154 nvme_uninit_ctrl(&dev->ctrl); in nvme_probe()
3155 nvme_put_ctrl(&dev->ctrl); in nvme_probe()
3161 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_reset_prepare() local
3166 * with ->remove(). in nvme_reset_prepare()
3168 nvme_disable_prepare_reset(dev, false); in nvme_reset_prepare()
3169 nvme_sync_queues(&dev->ctrl); in nvme_reset_prepare()
3174 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_reset_done() local
3176 if (!nvme_try_sched_reset(&dev->ctrl)) in nvme_reset_done()
3177 flush_work(&dev->ctrl.reset_work); in nvme_reset_done()
3182 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_shutdown() local
3184 nvme_disable_prepare_reset(dev, true); in nvme_shutdown()
3194 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_remove() local
3196 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_remove()
3200 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); in nvme_remove()
3201 nvme_dev_disable(dev, true); in nvme_remove()
3204 flush_work(&dev->ctrl.reset_work); in nvme_remove()
3205 nvme_stop_ctrl(&dev->ctrl); in nvme_remove()
3206 nvme_remove_namespaces(&dev->ctrl); in nvme_remove()
3207 nvme_dev_disable(dev, true); in nvme_remove()
3208 nvme_free_host_mem(dev); in nvme_remove()
3209 nvme_dev_remove_admin(dev); in nvme_remove()
3210 nvme_dbbuf_dma_free(dev); in nvme_remove()
3211 nvme_free_queues(dev, 0); in nvme_remove()
3212 mempool_destroy(dev->iod_mempool); in nvme_remove()
3213 nvme_release_prp_pools(dev); in nvme_remove()
3214 nvme_dev_unmap(dev); in nvme_remove()
3215 nvme_uninit_ctrl(&dev->ctrl); in nvme_remove()
3219 static int nvme_get_power_state(struct nvme_ctrl *ctrl, u32 *ps) in nvme_get_power_state() argument
3221 return nvme_get_features(ctrl, NVME_FEAT_POWER_MGMT, 0, NULL, 0, ps); in nvme_get_power_state()
3224 static int nvme_set_power_state(struct nvme_ctrl *ctrl, u32 ps) in nvme_set_power_state() argument
3226 return nvme_set_features(ctrl, NVME_FEAT_POWER_MGMT, ps, NULL, 0, NULL); in nvme_set_power_state()
3229 static int nvme_resume(struct device *dev) in nvme_resume() argument
3231 struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); in nvme_resume()
3232 struct nvme_ctrl *ctrl = &ndev->ctrl; in nvme_resume() local
3234 if (ndev->last_ps == U32_MAX || in nvme_resume()
3235 nvme_set_power_state(ctrl, ndev->last_ps) != 0) in nvme_resume()
3237 if (ctrl->hmpre && nvme_setup_host_mem(ndev)) in nvme_resume()
3242 return nvme_try_sched_reset(ctrl); in nvme_resume()
3245 static int nvme_suspend(struct device *dev) in nvme_suspend() argument
3247 struct pci_dev *pdev = to_pci_dev(dev); in nvme_suspend()
3249 struct nvme_ctrl *ctrl = &ndev->ctrl; in nvme_suspend() local
3250 int ret = -EBUSY; in nvme_suspend()
3252 ndev->last_ps = U32_MAX; in nvme_suspend()
3259 * device does not support any non-default power states, shut down the in nvme_suspend()
3264 * down, so as to allow the platform to achieve its minimum low-power in nvme_suspend()
3267 if (pm_suspend_via_firmware() || !ctrl->npss || in nvme_suspend()
3269 (ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)) in nvme_suspend()
3272 nvme_start_freeze(ctrl); in nvme_suspend()
3273 nvme_wait_freeze(ctrl); in nvme_suspend()
3274 nvme_sync_queues(ctrl); in nvme_suspend()
3276 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) in nvme_suspend()
3282 * non-operational power state. in nvme_suspend()
3284 if (ndev->hmb) { in nvme_suspend()
3290 ret = nvme_get_power_state(ctrl, &ndev->last_ps); in nvme_suspend()
3301 ret = nvme_set_power_state(ctrl, ctrl->npss); in nvme_suspend()
3314 ctrl->npss = 0; in nvme_suspend()
3317 nvme_unfreeze(ctrl); in nvme_suspend()
3321 static int nvme_simple_suspend(struct device *dev) in nvme_simple_suspend() argument
3323 struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); in nvme_simple_suspend()
3328 static int nvme_simple_resume(struct device *dev) in nvme_simple_resume() argument
3330 struct pci_dev *pdev = to_pci_dev(dev); in nvme_simple_resume()
3333 return nvme_try_sched_reset(&ndev->ctrl); in nvme_simple_resume()
3349 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_error_detected() local
3360 dev_warn(dev->ctrl.device, in nvme_error_detected()
3362 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) { in nvme_error_detected()
3363 nvme_dev_disable(dev, true); in nvme_error_detected()
3366 nvme_dev_disable(dev, false); in nvme_error_detected()
3369 dev_warn(dev->ctrl.device, in nvme_error_detected()
3378 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_slot_reset() local
3380 dev_info(dev->ctrl.device, "restart after slot reset\n"); in nvme_slot_reset()
3382 if (nvme_try_sched_reset(&dev->ctrl)) in nvme_slot_reset()
3383 nvme_unquiesce_io_queues(&dev->ctrl); in nvme_slot_reset()
3389 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_error_resume() local
3391 flush_work(&dev->ctrl.reset_work); in nvme_error_resume()
3555 { PCI_DEVICE(0x10ec, 0x5763), /* TEAMGROUP T-FORCE CARDEA ZERO Z330 SSD */
3557 { PCI_DEVICE(0x1e4b, 0x1602), /* HS-SSD-FUTURE 2048G */