94 	mt7601u_wr(dev, MT_USB_DMA_CFG, 0);  in mt7601u_reset_csr_bbp()
96 	mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0);  in mt7601u_reset_csr_bbp()
142 	for (i = 0; i < 16; i++) {  in mt76_init_beacon_offsets()
148 	for (i = 0; i < 4; i++)  in mt76_init_beacon_offsets()
167 	mt7601u_wr(dev, MT_AUX_CLK_CFG, 0);  in mt7601u_write_mac_initvals()
169 	return 0;  in mt7601u_write_mac_initvals()
181 	for (i = 0; i < N_WCIDS; i++)  {  in mt7601u_init_wcid_mem()
182 		vals[i * 2] = 0xffffffff;  in mt7601u_init_wcid_mem()
183 		vals[i * 2 + 1] = 0x00ffffff;  in mt7601u_init_wcid_mem()
210 	for (i = 0; i < N_WCIDS * 2; i++)  in mt7601u_init_wcid_attr_mem()
235 		       MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 0, 200000))  in mt7601u_mac_start()
251 		       MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 0, 50))  in mt7601u_mac_start()
254 	return 0;  in mt7601u_mac_start()
268 	if (!mt76_poll(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_TX_BUSY, 0, 1000))  in mt7601u_mac_stop_hw()
273 	while (i-- && ((mt76_rr(dev, 0x0438) & 0xffffffff) ||  in mt7601u_mac_stop_hw()
274 		       (mt76_rr(dev, 0x0a30) & 0x000000ff) ||  in mt7601u_mac_stop_hw()
275 		       (mt76_rr(dev, 0x0a34) & 0x00ff00ff)))  in mt7601u_mac_stop_hw()
278 	if (!mt76_poll(dev, MT_MAC_STATUS, MT_MAC_STATUS_TX, 0, 1000))  in mt7601u_mac_stop_hw()
285 	ok = 0;  in mt7601u_mac_stop_hw()
288 		if (!(mt76_rr(dev, MT_RXQ_STA) & 0x00ff0000) &&  in mt7601u_mac_stop_hw()
289 		    !mt76_rr(dev, 0x0a30) &&  in mt7601u_mac_stop_hw()
290 		    !mt76_rr(dev, 0x0a34)) {  in mt7601u_mac_stop_hw()
298 	if (!mt76_poll(dev, MT_MAC_STATUS, MT_MAC_STATUS_RX, 0, 1000))  in mt7601u_mac_stop_hw()
301 	if (!mt76_poll(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_RX_BUSY, 0, 1000))  in mt7601u_mac_stop_hw()
321 		0xc000,	0xc200,	0xc400,	0xc600,  in mt7601u_init_hardware()
322 		0xc800,	0xca00,	0xcc00,	0xce00,  in mt7601u_init_hardware()
323 		0xd000,	0xd200,	0xd400,	0xd600,  in mt7601u_init_hardware()
324 		0xd800,	0xda00,	0xdc00,	0xde00  in mt7601u_init_hardware()
341 			    MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 0, 100)) {  in mt7601u_init_hardware()
365 			    MT_MAC_STATUS_TX | MT_MAC_STATUS_RX, 0, 100)) {  in mt7601u_init_hardware()
390 	mt7601u_rmw(dev, MT_US_CYC_CFG, MT_US_CYC_CNT, 0x1e);  in mt7601u_init_hardware()
393 		   FIELD_PREP(MT_TXOP_TRUN_EN, 0x3f) |  in mt7601u_init_hardware()
394 		   FIELD_PREP(MT_TXOP_EXT_CCA_DLY, 0x58));  in mt7601u_init_hardware()
404 	mt7601u_set_rx_path(dev, 0);  in mt7601u_init_hardware()
405 	mt7601u_set_tx_dac(dev, 0);  in mt7601u_init_hardware()
411 	return 0;  in mt7601u_init_hardware()
456 	dev->stat_wq = alloc_workqueue("mt7601u", WQ_UNBOUND, 0);  in mt7601u_alloc_device()
503 	CCK_RATE(0, 10),
507 	OFDM_RATE(0, 60),
544 	ht_cap->mcs.rx_mask[0] = 0xff;  in mt76_init_sband()
545 	ht_cap->mcs.rx_mask[4] = 0x1;  in mt76_init_sband()
550 	dev->chandef.chan = &sband->channels[0];  in mt76_init_sband()
552 	return 0;  in mt76_init_sband()
580 	/* Reserve WCID 0 for mcast - thanks to this APs WCID will go to  in mt7601u_register_device()
583 	dev->wcid_mask[0] |= 1;  in mt7601u_register_device()
590 	dev->mon_wcid->idx = 0xff;  in mt7601u_register_device()
630 	return 0;  in mt7601u_register_device()