187 	Q_WRITE(dev, q, ring_size, q->ndesc);  in mt76_dma_sync_idx()
197 	if (!q || !q->ndesc)  in mt76_dma_queue_reset()
201 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_queue_reset()
248 	q->head = (q->head + 1) % q->ndesc;  in mt76_dma_add_rx_buf()
273 		next = (q->head + 1) % q->ndesc;  in mt76_dma_add_buf()
350 	if (!q || !q->ndesc)  in mt76_dma_tx_cleanup()
453 	q->tail = (q->tail + 1) % q->ndesc;  in mt76_dma_dequeue()
469 	if (q->queued + 1 >= q->ndesc - 1)  in mt76_dma_tx_queue_skb_raw()
547 	if (q->queued + (tx_info.nbuf + 1) / 2 >= q->ndesc - 1) {  in mt76_dma_tx_queue_skb()
598 	if (!q->ndesc)  in mt76_dma_rx_fill()
603 	while (q->queued < q->ndesc - 1) {  in mt76_dma_rx_fill()
643 	if (!q || !q->ndesc)  in mt76_dma_wed_setup()
700 	q->ndesc = n_desc;  in mt76_dma_alloc_queue()
704 	size = q->ndesc * sizeof(struct mt76_desc);  in mt76_dma_alloc_queue()
709 	size = q->ndesc * sizeof(*q->entry);  in mt76_dma_alloc_queue()
734 	if (!q->ndesc)  in mt76_dma_rx_cleanup()
761 	if (!q->ndesc)  in mt76_dma_rx_reset()
764 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_rx_reset()