241 static void brcmf_chip_sb_corerev(struct brcmf_chip_priv *ci,  in brcmf_chip_sb_corerev()  argument
246 	regdata = ci->ops->read32(ci->ctx, CORE_SB(core->base, sbidhigh));  in brcmf_chip_sb_corerev()
252 	struct brcmf_chip_priv *ci;  in brcmf_chip_sb_iscoreup()  local
256 	ci = core->chip;  in brcmf_chip_sb_iscoreup()
258 	regdata = ci->ops->read32(ci->ctx, address);  in brcmf_chip_sb_iscoreup()
266 	struct brcmf_chip_priv *ci;  in brcmf_chip_ai_iscoreup()  local
270 	ci = core->chip;  in brcmf_chip_ai_iscoreup()
271 	regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL);  in brcmf_chip_ai_iscoreup()
274 	regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL);  in brcmf_chip_ai_iscoreup()
283 	struct brcmf_chip_priv *ci;  in brcmf_chip_sb_coredisable()  local
286 	ci = core->chip;  in brcmf_chip_sb_coredisable()
288 	val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_coredisable()
292 	val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_coredisable()
298 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_coredisable()
299 		ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow),  in brcmf_chip_sb_coredisable()
302 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_coredisable()
304 		SPINWAIT((ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh))  in brcmf_chip_sb_coredisable()
307 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh));  in brcmf_chip_sb_coredisable()
311 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow));  in brcmf_chip_sb_coredisable()
313 			val = ci->ops->read32(ci->ctx,  in brcmf_chip_sb_coredisable()
316 			ci->ops->write32(ci->ctx,  in brcmf_chip_sb_coredisable()
318 			val = ci->ops->read32(ci->ctx,  in brcmf_chip_sb_coredisable()
321 			SPINWAIT((ci->ops->read32(ci->ctx,  in brcmf_chip_sb_coredisable()
329 		ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), val);  in brcmf_chip_sb_coredisable()
330 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_coredisable()
334 		val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow));  in brcmf_chip_sb_coredisable()
336 			val = ci->ops->read32(ci->ctx,  in brcmf_chip_sb_coredisable()
339 			ci->ops->write32(ci->ctx,  in brcmf_chip_sb_coredisable()
345 	ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow),  in brcmf_chip_sb_coredisable()
353 	struct brcmf_chip_priv *ci;  in brcmf_chip_ai_coredisable()  local
356 	ci = core->chip;  in brcmf_chip_ai_coredisable()
359 	regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL);  in brcmf_chip_ai_coredisable()
364 	ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL,  in brcmf_chip_ai_coredisable()
366 	ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL);  in brcmf_chip_ai_coredisable()
369 	ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL,  in brcmf_chip_ai_coredisable()
374 	SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) !=  in brcmf_chip_ai_coredisable()
379 	ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL,  in brcmf_chip_ai_coredisable()
381 	ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL);  in brcmf_chip_ai_coredisable()
387 	struct brcmf_chip_priv *ci;  in brcmf_chip_sb_resetcore()  local
391 	ci = core->chip;  in brcmf_chip_sb_resetcore()
404 	ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow),  in brcmf_chip_sb_resetcore()
407 	regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_resetcore()
411 	regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh));  in brcmf_chip_sb_resetcore()
413 		ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatehigh), 0);  in brcmf_chip_sb_resetcore()
415 	regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbimstate));  in brcmf_chip_sb_resetcore()
418 		ci->ops->write32(ci->ctx, CORE_SB(base, sbimstate), regdata);  in brcmf_chip_sb_resetcore()
422 	ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow),  in brcmf_chip_sb_resetcore()
424 	regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_resetcore()
428 	ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow),  in brcmf_chip_sb_resetcore()
430 	regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow));  in brcmf_chip_sb_resetcore()
437 	struct brcmf_chip_priv *ci;  in brcmf_chip_ai_resetcore()  local
442 	ci = core->chip;  in brcmf_chip_ai_resetcore()
446 		d11core2 = brcmf_chip_get_d11core(&ci->pub, 1);  in brcmf_chip_ai_resetcore()
460 	while (ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) &  in brcmf_chip_ai_resetcore()
462 		ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, 0);  in brcmf_chip_ai_resetcore()
471 		while (ci->ops->read32(ci->ctx,  in brcmf_chip_ai_resetcore()
474 			ci->ops->write32(ci->ctx,  in brcmf_chip_ai_resetcore()
484 	ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL,  in brcmf_chip_ai_resetcore()
486 	ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL);  in brcmf_chip_ai_resetcore()
489 		ci->ops->write32(ci->ctx, d11priv2->wrapbase + BCMA_IOCTL,  in brcmf_chip_ai_resetcore()
491 		ci->ops->read32(ci->ctx, d11priv2->wrapbase + BCMA_IOCTL);  in brcmf_chip_ai_resetcore()
504 static struct brcmf_core *brcmf_chip_add_core(struct brcmf_chip_priv *ci,  in brcmf_chip_add_core()  argument
516 	core->chip = ci;  in brcmf_chip_add_core()
519 	list_add_tail(&core->list, &ci->cores);  in brcmf_chip_add_core()
524 static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci)  in brcmf_chip_cores_check()  argument
532 	list_for_each_entry(core, &ci->cores, list) {  in brcmf_chip_cores_check()
710 static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci)  in brcmf_chip_tcm_rambase()  argument
712 	switch (ci->pub.chip) {  in brcmf_chip_tcm_rambase()
737 		return (ci->pub.chiprev < 9) ? 0x180000 : 0x160000;  in brcmf_chip_tcm_rambase()
749 		brcmf_err("unknown chip: %s\n", ci->pub.name);  in brcmf_chip_tcm_rambase()
757 	struct brcmf_chip_priv *ci = container_of(pub, struct brcmf_chip_priv,  in brcmf_chip_get_raminfo()  local
762 	mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_ARM_CR4);  in brcmf_chip_get_raminfo()
765 		ci->pub.ramsize = brcmf_chip_tcm_ramsize(mem_core);  in brcmf_chip_get_raminfo()
766 		ci->pub.rambase = brcmf_chip_tcm_rambase(ci);  in brcmf_chip_get_raminfo()
767 		if (ci->pub.rambase == INVALID_RAMBASE) {  in brcmf_chip_get_raminfo()
772 		mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_SYS_MEM);  in brcmf_chip_get_raminfo()
776 			ci->pub.ramsize = brcmf_chip_sysmem_ramsize(mem_core);  in brcmf_chip_get_raminfo()
777 			ci->pub.rambase = brcmf_chip_tcm_rambase(ci);  in brcmf_chip_get_raminfo()
778 			if (ci->pub.rambase == INVALID_RAMBASE) {  in brcmf_chip_get_raminfo()
783 			mem = brcmf_chip_get_core(&ci->pub,  in brcmf_chip_get_raminfo()
791 			brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize,  in brcmf_chip_get_raminfo()
792 						  &ci->pub.srsize);  in brcmf_chip_get_raminfo()
796 		  ci->pub.rambase, ci->pub.ramsize, ci->pub.ramsize,  in brcmf_chip_get_raminfo()
797 		  ci->pub.srsize, ci->pub.srsize);  in brcmf_chip_get_raminfo()
799 	if (!ci->pub.ramsize) {  in brcmf_chip_get_raminfo()
804 	if (ci->pub.ramsize > BRCMF_CHIP_MAX_MEMSIZE) {  in brcmf_chip_get_raminfo()
812 static u32 brcmf_chip_dmp_get_desc(struct brcmf_chip_priv *ci, u32 *eromaddr,  in brcmf_chip_dmp_get_desc()  argument
818 	val = ci->ops->read32(ci->ctx, *eromaddr);  in brcmf_chip_dmp_get_desc()
832 static int brcmf_chip_dmp_get_regaddr(struct brcmf_chip_priv *ci, u32 *eromaddr,  in brcmf_chip_dmp_get_regaddr()  argument
842 	val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc);  in brcmf_chip_dmp_get_regaddr()
857 			val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc);  in brcmf_chip_dmp_get_regaddr()
874 			brcmf_chip_dmp_get_desc(ci, eromaddr, NULL);  in brcmf_chip_dmp_get_regaddr()
880 			szdesc = brcmf_chip_dmp_get_desc(ci, eromaddr, NULL);  in brcmf_chip_dmp_get_regaddr()
883 				brcmf_chip_dmp_get_desc(ci, eromaddr, NULL);  in brcmf_chip_dmp_get_regaddr()
904 int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci)  in brcmf_chip_dmp_erom_scan()  argument
915 	eromaddr = ci->ops->read32(ci->ctx,  in brcmf_chip_dmp_erom_scan()
916 				   CORE_CC_REG(ci->pub.enum_base, eromptr));  in brcmf_chip_dmp_erom_scan()
919 		val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type);  in brcmf_chip_dmp_erom_scan()
933 		val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type);  in brcmf_chip_dmp_erom_scan()
949 		err = brcmf_chip_dmp_get_regaddr(ci, &eromaddr, &base, &wrap);  in brcmf_chip_dmp_erom_scan()
954 		core = brcmf_chip_add_core(ci, id, base, wrap);  in brcmf_chip_dmp_erom_scan()
969 static int brcmf_chip_recognition(struct brcmf_chip_priv *ci)  in brcmf_chip_recognition()  argument
982 	regdata = ci->ops->read32(ci->ctx,  in brcmf_chip_recognition()
983 				  CORE_CC_REG(ci->pub.enum_base, chipid));  in brcmf_chip_recognition()
989 	ci->pub.chip = regdata & CID_ID_MASK;  in brcmf_chip_recognition()
990 	ci->pub.chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;  in brcmf_chip_recognition()
993 	brcmf_chip_name(ci->pub.chip, ci->pub.chiprev,  in brcmf_chip_recognition()
994 			ci->pub.name, sizeof(ci->pub.name));  in brcmf_chip_recognition()
996 		  socitype == SOCI_SB ? "SB" : "AXI", ci->pub.name);  in brcmf_chip_recognition()
999 		if (ci->pub.chip != BRCM_CC_4329_CHIP_ID) {  in brcmf_chip_recognition()
1003 		ci->iscoreup = brcmf_chip_sb_iscoreup;  in brcmf_chip_recognition()
1004 		ci->coredisable = brcmf_chip_sb_coredisable;  in brcmf_chip_recognition()
1005 		ci->resetcore = brcmf_chip_sb_resetcore;  in brcmf_chip_recognition()
1007 		core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON,  in brcmf_chip_recognition()
1009 		brcmf_chip_sb_corerev(ci, core);  in brcmf_chip_recognition()
1010 		core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV,  in brcmf_chip_recognition()
1012 		brcmf_chip_sb_corerev(ci, core);  in brcmf_chip_recognition()
1013 		core = brcmf_chip_add_core(ci, BCMA_CORE_INTERNAL_MEM,  in brcmf_chip_recognition()
1015 		brcmf_chip_sb_corerev(ci, core);  in brcmf_chip_recognition()
1016 		core = brcmf_chip_add_core(ci, BCMA_CORE_ARM_CM3,  in brcmf_chip_recognition()
1018 		brcmf_chip_sb_corerev(ci, core);  in brcmf_chip_recognition()
1020 		core = brcmf_chip_add_core(ci, BCMA_CORE_80211, 0x18001000, 0);  in brcmf_chip_recognition()
1021 		brcmf_chip_sb_corerev(ci, core);  in brcmf_chip_recognition()
1023 		ci->iscoreup = brcmf_chip_ai_iscoreup;  in brcmf_chip_recognition()
1024 		ci->coredisable = brcmf_chip_ai_coredisable;  in brcmf_chip_recognition()
1025 		ci->resetcore = brcmf_chip_ai_resetcore;  in brcmf_chip_recognition()
1027 		brcmf_chip_dmp_erom_scan(ci);  in brcmf_chip_recognition()
1034 	ret = brcmf_chip_cores_check(ci);  in brcmf_chip_recognition()
1039 	brcmf_chip_set_passive(&ci->pub);  in brcmf_chip_recognition()
1044 	if (ci->ops->reset) {  in brcmf_chip_recognition()
1045 		ci->ops->reset(ci->ctx, &ci->pub);  in brcmf_chip_recognition()
1046 		brcmf_chip_set_passive(&ci->pub);  in brcmf_chip_recognition()
1049 	return brcmf_chip_get_raminfo(&ci->pub);  in brcmf_chip_recognition()