Lines Matching refs:ee

682 	struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;  in ath5k_hw_gainf_calibrate()  local
707 ee->ee_cck_ofdm_gain_delta; in ath5k_hw_gainf_calibrate()
819 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_rfregs_init() local
937 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
940 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
958 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
961 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
999 ath5k_hw_rfb_op(ah, rf_regs, !ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1002 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1005 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1008 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1063 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1069 ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1073 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_hw_rfregs_init()
1074 if (ee->ee_pd_gains[ee_mode] > 1) { in ath5k_hw_rfregs_init()
1125 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1593 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_update_noise_floor() local
1612 threshold = ee->ee_noise_floor_thr[ee_mode]; in ath5k_hw_update_noise_floor()
1903 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_set_spur_mitigation_filter() local
1932 spur_chan_fbin = ee->ee_spur_chans[i][freq_band]; in ath5k_hw_set_spur_mitigation_filter()
2582 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_chan_pcal_surrounding_piers() local
2593 pcinfo = ee->ee_pwr_cal_a; in ath5k_get_chan_pcal_surrounding_piers()
2597 pcinfo = ee->ee_pwr_cal_b; in ath5k_get_chan_pcal_surrounding_piers()
2602 pcinfo = ee->ee_pwr_cal_g; in ath5k_get_chan_pcal_surrounding_piers()
2606 max = ee->ee_n_piers[mode] - 1; in ath5k_get_chan_pcal_surrounding_piers()
2670 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_rate_pcal_data() local
2681 rpinfo = ee->ee_rate_tpwr_a; in ath5k_get_rate_pcal_data()
2685 rpinfo = ee->ee_rate_tpwr_b; in ath5k_get_rate_pcal_data()
2690 rpinfo = ee->ee_rate_tpwr_g; in ath5k_get_rate_pcal_data()
2694 max = ee->ee_rate_target_pwr_num[mode] - 1; in ath5k_get_rate_pcal_data()
2765 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_max_ctl_power() local
2766 struct ath5k_edge_power *rep = ee->ee_ctl_pwr; in ath5k_get_max_ctl_power()
2767 u8 *ctl_val = ee->ee_ctl; in ath5k_get_max_ctl_power()
2797 for (i = 0; i < ee->ee_ctls; i++) { in ath5k_get_max_ctl_power()
3200 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_write_pwr_to_pdadc_table() local
3202 u8 *pdg_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3203 u8 pdcurves = ee->ee_pd_gains[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3274 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_setup_channel_powertable() local
3275 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_setup_channel_powertable()
3290 for (pdg = 0; pdg < ee->ee_pd_gains[ee_mode]; pdg++) { in ath5k_setup_channel_powertable()
3337 if (!(ee->ee_pd_gains[ee_mode] > 1 && pdg == 0)) { in ath5k_setup_channel_powertable()
3422 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()
3442 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()