38 #define PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG(ab) \  argument
39 	((ab)->hw_params->regs->pcie_qserdes_sysclk_en_sel)
42 #define PCIE_PCS_OSC_DTCT_CONFIG1_REG(ab) \  argument
43 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base)
45 #define PCIE_PCS_OSC_DTCT_CONFIG2_REG(ab) \  argument
46 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base + 0x4)
48 #define PCIE_PCS_OSC_DTCT_CONFIG4_REG(ab) \  argument
49 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base + 0xc)
90 	int (*wakeup)(struct ath12k_base *ab);
91 	void (*release)(struct ath12k_base *ab);
96 	struct ath12k_base *ab;  member
114 static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab)  in ath12k_pci_priv()  argument
116 	return (struct ath12k_pci *)ab->drv_priv;  in ath12k_pci_priv()
119 int ath12k_pci_get_user_msi_assignment(struct ath12k_base *ab, char *user_name,
123 void ath12k_pci_write32(struct ath12k_base *ab, u32 offset, u32 value);
124 u32 ath12k_pci_read32(struct ath12k_base *ab, u32 offset);
125 int ath12k_pci_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,
127 void ath12k_pci_get_msi_address(struct ath12k_base *ab, u32 *msi_addr_lo,
129 void ath12k_pci_get_ce_msi_idx(struct ath12k_base *ab, u32 ce_id,
131 void ath12k_pci_hif_ce_irq_enable(struct ath12k_base *ab);
132 void ath12k_pci_hif_ce_irq_disable(struct ath12k_base *ab);
133 void ath12k_pci_ext_irq_enable(struct ath12k_base *ab);
134 void ath12k_pci_ext_irq_disable(struct ath12k_base *ab);
135 int ath12k_pci_hif_suspend(struct ath12k_base *ab);
136 int ath12k_pci_hif_resume(struct ath12k_base *ab);
137 void ath12k_pci_stop(struct ath12k_base *ab);
138 int ath12k_pci_start(struct ath12k_base *ab);
139 int ath12k_pci_power_up(struct ath12k_base *ab);
140 void ath12k_pci_power_down(struct ath12k_base *ab);