Lines Matching +full:short +full:- +full:descriptor
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * hd64572.h Description of the Hitachi HD64572 (SCA-II), valid for
8 * Copyright: (c) 2000-2001 Cyclades Corp.
15 * PC300 initial CVS version (3.4.0-pre1)
98 #define TFN 0x143 /* Inter-transmit-frame Time Fill Ctl Reg */
125 #define BOLR 0x0c /* Back-off Length Reg */
143 #define DARL 0x80 /* Dest Addr Register L (single-block, RX only) */
144 #define DARH 0x81 /* Dest Addr Register H (single-block, RX only) */
145 #define DARB 0x82 /* Dest Addr Register B (single-block, RX only) */
146 #define DARBH 0x83 /* Dest Addr Register BH (single-block, RX only) */
147 #define SARL 0x80 /* Source Addr Register L (single-block, TX only) */
148 #define SARH 0x81 /* Source Addr Register H (single-block, TX only) */
149 #define SARB 0x82 /* Source Addr Register B (single-block, TX only) */
150 #define DARBH 0x83 /* Source Addr Register BH (single-block, TX only) */
151 #define BARL 0x80 /* Buffer Addr Register L (chained-block) */
152 #define BARH 0x81 /* Buffer Addr Register H (chained-block) */
153 #define BARB 0x82 /* Buffer Addr Register B (chained-block) */
154 #define BARBH 0x83 /* Buffer Addr Register BH (chained-block) */
155 #define CDAL 0x84 /* Current Descriptor Addr Register L */
156 #define CDAH 0x85 /* Current Descriptor Addr Register H */
157 #define CDAB 0x86 /* Current Descriptor Addr Register B */
158 #define CDABH 0x87 /* Current Descriptor Addr Register BH */
159 #define EDAL 0x88 /* Error Descriptor Addr Register L */
160 #define EDAH 0x89 /* Error Descriptor Addr Register H */
161 #define EDAB 0x8a /* Error Descriptor Addr Register B */
162 #define EDABH 0x8b /* Error Descriptor Addr Register BH */
168 /* Block Descriptor Structure */
170 unsigned long next; /* pointer to next block descriptor */
172 unsigned short len; /* data length */
177 /* Block Descriptor Structure */
179 u32 cp; /* pointer to next block descriptor */
183 u8 unused; /* pads to 4-byte boundary */
188 Descriptor Status definitions:
193 6 - Short Frame
194 5 - Abort
195 4 - Residual bit
197 2 - CRC
199 0 EOT -
208 #define DST_SHRT 0x40 /* Short Frame */
211 /* Packet Descriptor Status bits */
219 #define ST_RX_SHORT 0x40 /* Short frame */
250 #define SHCNTL 0x178 /* Short frame Counter L */
251 #define SHCNTH 0x179 /* Short frame Counter H */
252 #define SHCCR 0x17b /* Short frame Counter Ctl Reg */
284 #define MD0_HDLC 0x80 /* Bit-sync HDLC mode */