Lines Matching refs:phy_write_mmd
784 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_config_init()
972 return phy_write_mmd(phydev, 2, reg, newval); in ksz9031_of_load_skew_values()
980 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, in ksz9031_center_flp_timing()
985 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, in ksz9031_center_flp_timing()
1001 return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD, in ksz9031_enable_edpd()
1039 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_CONTROL_PAD_SKEW, in ksz9031_config_rgmii_delay()
1045 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_RX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1053 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_TX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1061 return phy_write_mmd(phydev, 2, MII_KSZ9031RN_CLK_PAD_SKEW, in ksz9031_config_rgmii_delay()
1214 return phy_write_mmd(phydev, 2, reg, newval); in ksz9131_of_load_skew_values()
1862 err = phy_write_mmd(phydev, errata->dev_addr, errata->reg_addr, errata->val); in ksz9477_phy_errata()
2050 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_resume()
3472 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3474 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3476 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3478 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3480 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3482 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3486 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3488 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
3492 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
3495 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
3505 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
3508 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
3519 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
3524 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, in lan8841_config_init()
3526 phy_write_mmd(phydev, LAN8841_MMD_TIMER_REG, in lan8841_config_init()
3656 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, in lan8841_gpio_process_cap()
3680 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, 0); in lan8841_gpio_process_cap()
3870 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_PARSE_CONFIG, rxcfg); in lan8841_hwtstamp()
3871 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_PARSE_CONFIG, txcfg); in lan8841_hwtstamp()
3875 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
3876 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
3953 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_HI(event), in lan8841_ptp_set_target()
3958 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_LO(event), in lan8841_ptp_set_target()
3963 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_HI(event) & 0x3fff, in lan8841_ptp_set_target()
3968 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_LO(event), in lan8841_ptp_set_target()
3992 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_HI(event), in lan8841_ptp_set_reload()
3997 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_LO(event), in lan8841_ptp_set_reload()
4002 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_HI(event) & 0x3fff, in lan8841_ptp_set_reload()
4007 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_LO(event), in lan8841_ptp_set_reload()
4029 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_LO, lower_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4030 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_MID, upper_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4031 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_HI, upper_32_bits(ts->tv_sec) & 0xffff); in lan8841_ptp_settime64()
4032 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_LO, lower_16_bits(ts->tv_nsec)); in lan8841_ptp_settime64()
4033 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_HI, upper_16_bits(ts->tv_nsec) & 0x3fff); in lan8841_ptp_settime64()
4036 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_settime64()
4066 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_gettime64()
4095 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_getseconds()
4171 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, sec); in lan8841_ptp_adjtime()
4172 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
4174 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
4179 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, in lan8841_ptp_adjtime()
4181 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
4183 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
4221 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_HI, in lan8841_ptp_adjfine()
4224 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_LO, lower_16_bits(rate)); in lan8841_ptp_adjfine()
4530 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_EN, tmp); in lan8841_ptp_extts_on()