126 	void __iomem *base_addr;  member
155 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_enable_interrupts()
157 			 drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_enable_interrupts()
160 	xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_enable_interrupts()
163 	xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);  in xemaclite_enable_interrupts()
178 	xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);  in xemaclite_disable_interrupts()
181 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_disable_interrupts()
183 			 drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_disable_interrupts()
186 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_disable_interrupts()
188 			 drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_disable_interrupts()
314 	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;  in xemaclite_send_data()
379 	addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);  in xemaclite_recv_data()
472 	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;  in xemaclite_update_address()
642 	void __iomem *base_addr = lp->base_addr;  in xemaclite_interrupt()  local
646 	if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) &  in xemaclite_interrupt()
648 	    (xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)  in xemaclite_interrupt()
654 	tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET);  in xemaclite_interrupt()
658 		xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET);  in xemaclite_interrupt()
664 	tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);  in xemaclite_interrupt()
668 		xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +  in xemaclite_interrupt()
703 				  lp->base_addr + XEL_MDIOCTRL_OFFSET,  in xemaclite_mdio_wait()
733 	ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_read()
736 			 lp->base_addr + XEL_MDIOADDR_OFFSET);  in xemaclite_mdio_read()
738 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_read()
743 	rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET);  in xemaclite_mdio_read()
782 	ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_write()
785 			 lp->base_addr + XEL_MDIOADDR_OFFSET);  in xemaclite_mdio_write()
786 	xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);  in xemaclite_mdio_write()
788 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_write()
844 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_setup()
1118 	lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);  in xemaclite_of_probe()
1119 	if (IS_ERR(lp->base_addr)) {  in xemaclite_of_probe()
1120 		rc = PTR_ERR(lp->base_addr);  in xemaclite_of_probe()
1140 	xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET);  in xemaclite_of_probe()
1141 	xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);  in xemaclite_of_probe()
1166 		 (unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq);  in xemaclite_of_probe()