Lines Matching refs:RCV_INT
69 #define RCV_INT BIT(10) macro
74 #define DEF_INT_MASK (RCV_INT | DEF_INT_ERR)
381 val = RCV_INT; in hip04_mac_enable()
560 priv->reg_inten &= ~(RCV_INT); in hip04_mac_start_xmit()
561 writel_relaxed(DEF_INT_MASK & ~RCV_INT, in hip04_mac_start_xmit()
647 if (!(priv->reg_inten & RCV_INT)) { in hip04_rx_poll()
649 priv->reg_inten |= RCV_INT; in hip04_rx_poll()
685 if (ists & RCV_INT && napi_schedule_prep(&priv->napi)) { in hip04_mac_interrupt()
687 priv->reg_inten &= ~(RCV_INT); in hip04_mac_interrupt()
688 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in hip04_mac_interrupt()
704 priv->reg_inten &= ~(RCV_INT); in tx_done()
705 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in tx_done()