Lines Matching +full:enet +full:- +full:avb
1 // SPDX-License-Identifier: GPL-2.0+
17 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
20 * Copyright (c) 2004-2006 Macq Electronique SA.
22 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
190 .name = "imx25-fec",
193 .name = "imx27-fec",
196 .name = "imx28-fec",
199 .name = "imx6q-fec",
202 .name = "mvf600-fec",
205 .name = "imx6sx-fec",
208 .name = "imx6ul-fec",
211 .name = "imx8mq-fec",
214 .name = "imx8qm-fec",
217 .name = "s32v234-fec",
239 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
240 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
241 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
242 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
243 { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
244 { .compatible = "fsl,imx6sx-fec", .data = &fec_devtype[IMX6SX_FEC], },
245 { .compatible = "fsl,imx6ul-fec", .data = &fec_devtype[IMX6UL_FEC], },
246 { .compatible = "fsl,imx8mq-fec", .data = &fec_devtype[IMX8MQ_FEC], },
247 { .compatible = "fsl,imx8qm-fec", .data = &fec_devtype[IMX8QM_FEC], },
248 { .compatible = "fsl,s32v234-fec", .data = &fec_devtype[S32V234_FEC], },
260 * if this is non-zero then assume it is the address to get MAC from.
282 #define PKT_MAXBUF_SIZE (round_down(2048 - 64, 64))
353 ((addr >= txq->tso_hdrs_dma) && \
354 (addr < txq->tso_hdrs_dma + txq->bd.ring_size * TSO_HEADER_SIZE))
361 return (bdp >= bd->last) ? bd->base in fec_enet_get_nextdesc()
362 : (struct bufdesc *)(((void *)bdp) + bd->dsize); in fec_enet_get_nextdesc()
368 return (bdp <= bd->base) ? bd->last in fec_enet_get_prevdesc()
369 : (struct bufdesc *)(((void *)bdp) - bd->dsize); in fec_enet_get_prevdesc()
375 return ((const char *)bdp - (const char *)bd->base) >> bd->dsize_log2; in fec_enet_get_bd_index()
382 entries = (((const char *)txq->dirty_tx - in fec_enet_get_free_txdesc_num()
383 (const char *)txq->bd.cur) >> txq->bd.dsize_log2) - 1; in fec_enet_get_free_txdesc_num()
385 return entries >= 0 ? entries : entries + txq->bd.ring_size; in fec_enet_get_free_txdesc_num()
407 txq = fep->tx_queue[0]; in fec_dump()
408 bdp = txq->bd.base; in fec_dump()
413 bdp == txq->bd.cur ? 'S' : ' ', in fec_dump()
414 bdp == txq->dirty_tx ? 'H' : ' ', in fec_dump()
415 fec16_to_cpu(bdp->cbd_sc), in fec_dump()
416 fec32_to_cpu(bdp->cbd_bufaddr), in fec_dump()
417 fec16_to_cpu(bdp->cbd_datlen), in fec_dump()
418 txq->tx_buf[index].buf_p); in fec_dump()
419 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_dump()
421 } while (bdp != txq->bd.base); in fec_dump()
426 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; in is_ipv4_pkt()
433 if (skb->ip_summed != CHECKSUM_PARTIAL) in fec_enet_clear_csum()
437 return -1; in fec_enet_clear_csum()
440 ip_hdr(skb)->check = 0; in fec_enet_clear_csum()
441 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0; in fec_enet_clear_csum()
450 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_create_page_pool()
455 .nid = dev_to_node(&fep->pdev->dev), in fec_enet_create_page_pool()
456 .dev = &fep->pdev->dev, in fec_enet_create_page_pool()
463 rxq->page_pool = page_pool_create(&pp_params); in fec_enet_create_page_pool()
464 if (IS_ERR(rxq->page_pool)) { in fec_enet_create_page_pool()
465 err = PTR_ERR(rxq->page_pool); in fec_enet_create_page_pool()
466 rxq->page_pool = NULL; in fec_enet_create_page_pool()
470 err = xdp_rxq_info_reg(&rxq->xdp_rxq, fep->netdev, rxq->id, 0); in fec_enet_create_page_pool()
474 err = xdp_rxq_info_reg_mem_model(&rxq->xdp_rxq, MEM_TYPE_PAGE_POOL, in fec_enet_create_page_pool()
475 rxq->page_pool); in fec_enet_create_page_pool()
482 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_create_page_pool()
484 page_pool_destroy(rxq->page_pool); in fec_enet_create_page_pool()
485 rxq->page_pool = NULL; in fec_enet_create_page_pool()
495 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
497 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_frag_skb()
508 this_frag = &skb_shinfo(skb)->frags[frag]; in fec_enet_txq_submit_frag_skb()
509 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
512 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_frag_skb()
515 frag_len = skb_frag_size(&skb_shinfo(skb)->frags[frag]); in fec_enet_txq_submit_frag_skb()
518 if (frag == nr_frags - 1) { in fec_enet_txq_submit_frag_skb()
520 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
522 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_frag_skb()
523 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_frag_skb()
528 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
529 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_frag_skb()
530 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_frag_skb()
531 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_frag_skb()
534 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_frag_skb()
535 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_frag_skb()
540 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
541 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_frag_skb()
542 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_frag_skb()
543 memcpy(txq->tx_bounce[index], bufaddr, frag_len); in fec_enet_txq_submit_frag_skb()
544 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_frag_skb()
546 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_frag_skb()
550 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len, in fec_enet_txq_submit_frag_skb()
552 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_frag_skb()
558 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_frag_skb()
559 bdp->cbd_datlen = cpu_to_fec16(frag_len); in fec_enet_txq_submit_frag_skb()
564 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_frag_skb()
569 bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
571 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
572 dma_unmap_single(&fep->pdev->dev, fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_txq_submit_frag_skb()
573 fec16_to_cpu(bdp->cbd_datlen), DMA_TO_DEVICE); in fec_enet_txq_submit_frag_skb()
575 return ERR_PTR(-ENOMEM); in fec_enet_txq_submit_frag_skb()
582 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_skb()
600 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_skb()
607 bdp = txq->bd.cur; in fec_enet_txq_submit_skb()
609 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_skb()
613 bufaddr = skb->data; in fec_enet_txq_submit_skb()
616 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_skb()
617 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_skb()
618 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_skb()
619 memcpy(txq->tx_bounce[index], skb->data, buflen); in fec_enet_txq_submit_skb()
620 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_skb()
622 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_skb()
627 addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE); in fec_enet_txq_submit_skb()
628 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_skb()
638 dma_unmap_single(&fep->pdev->dev, addr, in fec_enet_txq_submit_skb()
645 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
647 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_skb()
648 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
652 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_skb()
653 bdp->cbd_datlen = cpu_to_fec16(buflen); in fec_enet_txq_submit_skb()
655 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
659 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && in fec_enet_txq_submit_skb()
660 fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
661 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in fec_enet_txq_submit_skb()
663 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_skb()
664 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_skb()
666 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_skb()
669 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_skb()
670 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_skb()
673 index = fec_enet_get_bd_index(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
675 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_skb()
686 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_skb()
689 bdp = fec_enet_get_nextdesc(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
693 /* Make sure the update to bdp is performed before txq->bd.cur. */ in fec_enet_txq_submit_skb()
695 txq->bd.cur = bdp; in fec_enet_txq_submit_skb()
698 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_skb()
699 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
700 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
701 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
702 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_skb()
703 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_skb()
720 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_data_tso()
725 if (((unsigned long) data) & fep->tx_align || in fec_enet_txq_put_data_tso()
726 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_data_tso()
727 memcpy(txq->tx_bounce[index], data, size); in fec_enet_txq_put_data_tso()
728 data = txq->tx_bounce[index]; in fec_enet_txq_put_data_tso()
730 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_data_tso()
734 addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE); in fec_enet_txq_put_data_tso()
735 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_put_data_tso()
742 bdp->cbd_datlen = cpu_to_fec16(size); in fec_enet_txq_put_data_tso()
743 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_put_data_tso()
745 if (fep->bufdesc_ex) { in fec_enet_txq_put_data_tso()
746 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_data_tso()
747 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_data_tso()
748 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_data_tso()
750 ebdp->cbd_bdu = 0; in fec_enet_txq_put_data_tso()
751 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_data_tso()
759 if (fep->bufdesc_ex) in fec_enet_txq_put_data_tso()
760 ebdp->cbd_esc |= cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_txq_put_data_tso()
763 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_data_tso()
781 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_hdr_tso()
785 bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
786 dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
787 if (((unsigned long)bufaddr) & fep->tx_align || in fec_enet_txq_put_hdr_tso()
788 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_hdr_tso()
789 memcpy(txq->tx_bounce[index], skb->data, hdr_len); in fec_enet_txq_put_hdr_tso()
790 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_put_hdr_tso()
792 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_hdr_tso()
795 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr, in fec_enet_txq_put_hdr_tso()
797 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) { in fec_enet_txq_put_hdr_tso()
805 bdp->cbd_bufaddr = cpu_to_fec32(dmabuf); in fec_enet_txq_put_hdr_tso()
806 bdp->cbd_datlen = cpu_to_fec16(hdr_len); in fec_enet_txq_put_hdr_tso()
808 if (fep->bufdesc_ex) { in fec_enet_txq_put_hdr_tso()
809 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_hdr_tso()
810 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_hdr_tso()
811 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_hdr_tso()
813 ebdp->cbd_bdu = 0; in fec_enet_txq_put_hdr_tso()
814 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_hdr_tso()
817 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_hdr_tso()
828 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
842 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_tso()
851 total_len = skb->len - hdr_len; in fec_enet_txq_submit_tso()
855 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
856 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in fec_enet_txq_submit_tso()
857 total_len -= data_left; in fec_enet_txq_submit_tso()
860 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_submit_tso()
870 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
871 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
880 data_left -= size; in fec_enet_txq_submit_tso()
884 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
888 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_tso()
891 txq->bd.cur = bdp; in fec_enet_txq_submit_tso()
894 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_tso()
895 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
896 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
897 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
898 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_tso()
899 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_tso()
905 tmp_bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
909 if (tmp_bdp->cbd_bufaddr && in fec_enet_txq_submit_tso()
910 !IS_TSO_HEADER(txq, fec32_to_cpu(tmp_bdp->cbd_bufaddr))) in fec_enet_txq_submit_tso()
911 dma_unmap_single(&fep->pdev->dev, in fec_enet_txq_submit_tso()
912 fec32_to_cpu(tmp_bdp->cbd_bufaddr), in fec_enet_txq_submit_tso()
913 fec16_to_cpu(tmp_bdp->cbd_datlen), in fec_enet_txq_submit_tso()
917 tmp_bdp->cbd_sc = 0; in fec_enet_txq_submit_tso()
918 tmp_bdp->cbd_datlen = 0; in fec_enet_txq_submit_tso()
919 tmp_bdp->cbd_bufaddr = 0; in fec_enet_txq_submit_tso()
922 if (fep->bufdesc_ex) { in fec_enet_txq_submit_tso()
924 ebdp->cbd_esc = 0; in fec_enet_txq_submit_tso()
927 tmp_bdp = fec_enet_get_nextdesc(tmp_bdp, &txq->bd); in fec_enet_txq_submit_tso()
946 txq = fep->tx_queue[queue]; in fec_enet_start_xmit()
957 if (entries_free <= txq->tx_stop_threshold) in fec_enet_start_xmit()
974 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_bd_init()
976 rxq = fep->rx_queue[q]; in fec_enet_bd_init()
977 bdp = rxq->bd.base; in fec_enet_bd_init()
979 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_bd_init()
982 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
983 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_bd_init()
985 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
986 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_bd_init()
990 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_bd_init()
991 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
993 rxq->bd.cur = rxq->bd.base; in fec_enet_bd_init()
996 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_bd_init()
998 txq = fep->tx_queue[q]; in fec_enet_bd_init()
999 bdp = txq->bd.base; in fec_enet_bd_init()
1000 txq->bd.cur = bdp; in fec_enet_bd_init()
1002 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_bd_init()
1004 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
1005 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_bd_init()
1006 if (bdp->cbd_bufaddr && in fec_enet_bd_init()
1007 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_bd_init()
1008 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
1009 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
1010 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
1012 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
1013 dev_kfree_skb_any(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
1014 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_bd_init()
1015 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
1016 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
1017 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
1018 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
1021 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
1022 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
1024 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_bd_init()
1027 page_pool_put_page(page->pp, page, 0, false); in fec_enet_bd_init()
1030 txq->tx_buf[i].buf_p = NULL; in fec_enet_bd_init()
1032 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_bd_init()
1033 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_bd_init()
1034 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_bd_init()
1038 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_bd_init()
1039 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
1040 txq->dirty_tx = bdp; in fec_enet_bd_init()
1049 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_active_rxring()
1050 writel(0, fep->rx_queue[i]->bd.reg_desc_active); in fec_enet_active_rxring()
1060 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_enable_ring()
1061 rxq = fep->rx_queue[i]; in fec_enet_enable_ring()
1062 writel(rxq->bd.dma, fep->hwp + FEC_R_DES_START(i)); in fec_enet_enable_ring()
1063 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i)); in fec_enet_enable_ring()
1068 fep->hwp + FEC_RCMR(i)); in fec_enet_enable_ring()
1071 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_enable_ring()
1072 txq = fep->tx_queue[i]; in fec_enet_enable_ring()
1073 writel(txq->bd.dma, fep->hwp + FEC_X_DES_START(i)); in fec_enet_enable_ring()
1078 fep->hwp + FEC_DMA_CFG(i)); in fec_enet_enable_ring()
1083 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
1090 if (!allow_wol || !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_ctrl_reset()
1091 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES || in fec_ctrl_reset()
1092 ((fep->quirks & FEC_QUIRK_NO_HARD_RESET) && fep->link)) { in fec_ctrl_reset()
1093 writel(0, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1095 writel(FEC_ECR_RESET, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1099 val = readl(fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1101 writel(val, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1118 if (fep->bufdesc_ex) in fec_restart()
1124 * enet-mac reset will reset mac address registers too, in fec_restart()
1127 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN); in fec_restart()
1129 fep->hwp + FEC_ADDR_LOW); in fec_restart()
1131 fep->hwp + FEC_ADDR_HIGH); in fec_restart()
1134 writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT); in fec_restart()
1141 if (fep->full_duplex == DUPLEX_FULL) { in fec_restart()
1143 writel(0x04, fep->hwp + FEC_X_CNTRL); in fec_restart()
1147 writel(0x0, fep->hwp + FEC_X_CNTRL); in fec_restart()
1151 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_restart()
1154 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_restart()
1155 u32 val = readl(fep->hwp + FEC_RACC); in fec_restart()
1159 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) in fec_restart()
1164 writel(val, fep->hwp + FEC_RACC); in fec_restart()
1165 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL); in fec_restart()
1171 * differently on enet-mac. in fec_restart()
1173 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1178 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII || in fec_restart()
1179 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in fec_restart()
1180 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID || in fec_restart()
1181 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) in fec_restart()
1183 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1189 if (ndev->phydev) { in fec_restart()
1190 if (ndev->phydev->speed == SPEED_1000) in fec_restart()
1192 else if (ndev->phydev->speed == SPEED_100) in fec_restart()
1199 if (fep->quirks & FEC_QUIRK_USE_GASKET) { in fec_restart()
1202 writel(0, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1203 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4) in fec_restart()
1211 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1213 if (ndev->phydev && ndev->phydev->speed == SPEED_10) in fec_restart()
1215 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
1217 /* re-enable the gasket */ in fec_restart()
1218 writel(2, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1225 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || in fec_restart()
1226 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && in fec_restart()
1227 ndev->phydev && ndev->phydev->pause)) { in fec_restart()
1231 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM); in fec_restart()
1232 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); in fec_restart()
1233 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM); in fec_restart()
1234 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL); in fec_restart()
1237 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD); in fec_restart()
1243 writel(rcntl, fep->hwp + FEC_R_CNTRL); in fec_restart()
1248 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); in fec_restart()
1249 writel(0, fep->hwp + FEC_HASH_TABLE_LOW); in fec_restart()
1252 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1253 /* enable ENET endian swap */ in fec_restart()
1255 /* enable ENET store and forward mode */ in fec_restart()
1256 writel(FEC_TXWMRK_STRFWD, fep->hwp + FEC_X_WMRK); in fec_restart()
1259 if (fep->bufdesc_ex) in fec_restart()
1262 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1263 fep->rgmii_txc_dly) in fec_restart()
1265 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1266 fep->rgmii_rxc_dly) in fec_restart()
1271 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
1275 writel(ecntl, fep->hwp + FEC_ECNTRL); in fec_restart()
1278 if (fep->bufdesc_ex) { in fec_restart()
1284 if (fep->link) in fec_restart()
1285 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_restart()
1287 writel(0, fep->hwp + FEC_IMASK); in fec_restart()
1290 if (fep->quirks & FEC_QUIRK_HAS_COALESCE) in fec_restart()
1301 return imx_scu_get_handle(&fep->ipc_handle); in fec_enet_ipc_handle_init()
1306 struct device_node *np = fep->pdev->dev.of_node; in fec_enet_ipg_stop_set()
1310 if (!np || !fep->ipc_handle) in fec_enet_ipg_stop_set()
1319 imx_sc_misc_set_control(fep->ipc_handle, rsrc_id, IMX_SC_C_IPG_STOP, val); in fec_enet_ipg_stop_set()
1324 struct fec_platform_data *pdata = fep->pdev->dev.platform_data; in fec_enet_stop_mode()
1325 struct fec_stop_mode_gpr *stop_gpr = &fep->stop_gpr; in fec_enet_stop_mode()
1327 if (stop_gpr->gpr) { in fec_enet_stop_mode()
1329 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1330 BIT(stop_gpr->bit), in fec_enet_stop_mode()
1331 BIT(stop_gpr->bit)); in fec_enet_stop_mode()
1333 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1334 BIT(stop_gpr->bit), 0); in fec_enet_stop_mode()
1335 } else if (pdata && pdata->sleep_mode_enable) { in fec_enet_stop_mode()
1336 pdata->sleep_mode_enable(enabled); in fec_enet_stop_mode()
1346 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable()
1353 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1354 writel(FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1361 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII; in fec_stop()
1365 if (fep->link) { in fec_stop()
1366 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */ in fec_stop()
1368 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA)) in fec_stop()
1372 if (fep->bufdesc_ex) in fec_stop()
1376 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_stop()
1377 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_stop()
1379 /* We have to keep ENET enabled to have MII interrupt stay working */ in fec_stop()
1380 if (fep->quirks & FEC_QUIRK_ENET_MAC && in fec_stop()
1381 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1382 writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL); in fec_stop()
1383 writel(rmii_mode, fep->hwp + FEC_R_CNTRL); in fec_stop()
1386 if (fep->bufdesc_ex) { in fec_stop()
1387 val = readl(fep->hwp + FEC_ECNTRL); in fec_stop()
1389 writel(val, fep->hwp + FEC_ECNTRL); in fec_stop()
1403 ndev->stats.tx_errors++; in fec_timeout()
1405 schedule_work(&fep->tx_timeout_work); in fec_timeout()
1412 struct net_device *ndev = fep->netdev; in fec_enet_timeout_work()
1416 napi_disable(&fep->napi); in fec_enet_timeout_work()
1421 napi_enable(&fep->napi); in fec_enet_timeout_work()
1433 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1434 ns = timecounter_cyc2time(&fep->tc, ts); in fec_enet_hwtstamp()
1435 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1438 hwtstamps->hwtstamp = ns_to_ktime(ns); in fec_enet_hwtstamp()
1458 txq = fep->tx_queue[queue_id]; in fec_enet_tx_queue()
1461 bdp = txq->dirty_tx; in fec_enet_tx_queue()
1464 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1466 while (bdp != READ_ONCE(txq->bd.cur)) { in fec_enet_tx_queue()
1469 status = fec16_to_cpu(READ_ONCE(bdp->cbd_sc)); in fec_enet_tx_queue()
1473 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_tx_queue()
1475 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1476 skb = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1477 if (bdp->cbd_bufaddr && in fec_enet_tx_queue()
1478 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_tx_queue()
1479 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1480 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1481 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1483 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1495 if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1496 xdpf = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1497 if (bdp->cbd_bufaddr) in fec_enet_tx_queue()
1498 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1499 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1500 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1503 page = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1506 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1507 if (unlikely(!txq->tx_buf[index].buf_p)) { in fec_enet_tx_queue()
1508 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1512 frame_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_tx_queue()
1519 ndev->stats.tx_errors++; in fec_enet_tx_queue()
1521 ndev->stats.tx_heartbeat_errors++; in fec_enet_tx_queue()
1523 ndev->stats.tx_window_errors++; in fec_enet_tx_queue()
1525 ndev->stats.tx_aborted_errors++; in fec_enet_tx_queue()
1527 ndev->stats.tx_fifo_errors++; in fec_enet_tx_queue()
1529 ndev->stats.tx_carrier_errors++; in fec_enet_tx_queue()
1531 ndev->stats.tx_packets++; in fec_enet_tx_queue()
1533 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) in fec_enet_tx_queue()
1534 ndev->stats.tx_bytes += skb->len; in fec_enet_tx_queue()
1536 ndev->stats.tx_bytes += frame_len; in fec_enet_tx_queue()
1543 ndev->stats.collisions++; in fec_enet_tx_queue()
1545 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1550 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS && in fec_enet_tx_queue()
1551 fep->hwts_tx_en) && fep->bufdesc_ex) { in fec_enet_tx_queue()
1555 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), &shhwtstamps); in fec_enet_tx_queue()
1561 } else if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1565 page_pool_put_page(page->pp, page, 0, true); in fec_enet_tx_queue()
1568 txq->tx_buf[index].buf_p = NULL; in fec_enet_tx_queue()
1570 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1577 txq->dirty_tx = bdp; in fec_enet_tx_queue()
1580 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1586 if (entries_free >= txq->tx_wake_threshold) in fec_enet_tx_queue()
1592 if (bdp != txq->bd.cur && in fec_enet_tx_queue()
1593 readl(txq->bd.reg_desc_active) == 0) in fec_enet_tx_queue()
1594 writel(0, txq->bd.reg_desc_active); in fec_enet_tx_queue()
1602 /* Make sure that AVB queues are processed first. */ in fec_enet_tx()
1603 for (i = fep->num_tx_queues - 1; i >= 0; i--) in fec_enet_tx()
1613 new_page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_update_cbd()
1615 return -ENOMEM; in fec_enet_update_cbd()
1617 rxq->rx_skb_info[index].page = new_page; in fec_enet_update_cbd()
1618 rxq->rx_skb_info[index].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_update_cbd()
1620 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_update_cbd()
1629 unsigned int sync, len = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1640 sync = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1645 rxq->stats[RX_XDP_PASS]++; in fec_enet_run_xdp()
1650 rxq->stats[RX_XDP_REDIRECT]++; in fec_enet_run_xdp()
1651 err = xdp_do_redirect(fep->netdev, xdp, prog); in fec_enet_run_xdp()
1659 rxq->stats[RX_XDP_TX]++; in fec_enet_run_xdp()
1662 rxq->stats[RX_XDP_TX_ERRORS]++; in fec_enet_run_xdp()
1670 bpf_warn_invalid_xdp_action(fep->netdev, prog, act); in fec_enet_run_xdp()
1677 rxq->stats[RX_XDP_DROP]++; in fec_enet_run_xdp()
1680 page = virt_to_head_page(xdp->data); in fec_enet_run_xdp()
1681 page_pool_put_page(rxq->page_pool, page, sync, true); in fec_enet_run_xdp()
1683 trace_xdp_exception(fep->netdev, prog, act); in fec_enet_run_xdp()
1710 bool need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME; in fec_enet_rx_queue()
1711 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_rx_queue()
1724 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_enet_rx_queue()
1733 rxq = fep->rx_queue[queue_id]; in fec_enet_rx_queue()
1738 bdp = rxq->bd.cur; in fec_enet_rx_queue()
1739 xdp_init_buff(&xdp, PAGE_SIZE, &rxq->xdp_rxq); in fec_enet_rx_queue()
1741 while (!((status = fec16_to_cpu(bdp->cbd_sc)) & BD_ENET_RX_EMPTY)) { in fec_enet_rx_queue()
1747 writel(FEC_ENET_RXF_GET(queue_id), fep->hwp + FEC_IEVENT); in fec_enet_rx_queue()
1754 ndev->stats.rx_errors++; in fec_enet_rx_queue()
1757 ndev->stats.rx_fifo_errors++; in fec_enet_rx_queue()
1763 ndev->stats.rx_length_errors++; in fec_enet_rx_queue()
1768 ndev->stats.rx_crc_errors++; in fec_enet_rx_queue()
1771 ndev->stats.rx_frame_errors++; in fec_enet_rx_queue()
1776 ndev->stats.rx_packets++; in fec_enet_rx_queue()
1777 pkt_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_rx_queue()
1778 ndev->stats.rx_bytes += pkt_len; in fec_enet_rx_queue()
1780 index = fec_enet_get_bd_index(bdp, &rxq->bd); in fec_enet_rx_queue()
1781 page = rxq->rx_skb_info[index].page; in fec_enet_rx_queue()
1782 cbd_bufaddr = bdp->cbd_bufaddr; in fec_enet_rx_queue()
1784 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1788 dma_sync_single_for_cpu(&fep->pdev->dev, in fec_enet_rx_queue()
1798 data_start, pkt_len - sub_len, false); in fec_enet_rx_queue()
1811 page_pool_recycle_direct(rxq->page_pool, page); in fec_enet_rx_queue()
1812 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1819 skb_put(skb, pkt_len - sub_len); in fec_enet_rx_queue()
1826 data = skb->data; in fec_enet_rx_queue()
1830 if (fep->bufdesc_ex) in fec_enet_rx_queue()
1835 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) && in fec_enet_rx_queue()
1836 fep->bufdesc_ex && in fec_enet_rx_queue()
1837 (ebdp->cbd_esc & cpu_to_fec32(BD_ENET_RX_VLAN))) { in fec_enet_rx_queue()
1841 vlan_tag = ntohs(vlan_header->h_vlan_TCI); in fec_enet_rx_queue()
1845 memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2); in fec_enet_rx_queue()
1849 skb->protocol = eth_type_trans(skb, ndev); in fec_enet_rx_queue()
1852 if (fep->hwts_rx_en && fep->bufdesc_ex) in fec_enet_rx_queue()
1853 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), in fec_enet_rx_queue()
1856 if (fep->bufdesc_ex && in fec_enet_rx_queue()
1857 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { in fec_enet_rx_queue()
1858 if (!(ebdp->cbd_esc & cpu_to_fec32(FLAG_RX_CSUM_ERROR))) { in fec_enet_rx_queue()
1860 skb->ip_summed = CHECKSUM_UNNECESSARY; in fec_enet_rx_queue()
1873 napi_gro_receive(&fep->napi, skb); in fec_enet_rx_queue()
1882 if (fep->bufdesc_ex) { in fec_enet_rx_queue()
1885 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_rx_queue()
1886 ebdp->cbd_prot = 0; in fec_enet_rx_queue()
1887 ebdp->cbd_bdu = 0; in fec_enet_rx_queue()
1893 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_rx_queue()
1896 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_rx_queue()
1902 writel(0, rxq->bd.reg_desc_active); in fec_enet_rx_queue()
1904 rxq->bd.cur = bdp; in fec_enet_rx_queue()
1917 /* Make sure that AVB queues are processed first. */ in fec_enet_rx()
1918 for (i = fep->num_rx_queues - 1; i >= 0; i--) in fec_enet_rx()
1919 done += fec_enet_rx_queue(ndev, budget - done, i); in fec_enet_rx()
1928 int_events = readl(fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1933 writel(int_events, fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1945 if (fec_enet_collect_events(fep) && fep->link) { in fec_enet_interrupt()
1948 if (napi_schedule_prep(&fep->napi)) { in fec_enet_interrupt()
1950 writel(0, fep->hwp + FEC_IMASK); in fec_enet_interrupt()
1951 __napi_schedule(&fep->napi); in fec_enet_interrupt()
1960 struct net_device *ndev = napi->dev; in fec_enet_rx_napi()
1965 done += fec_enet_rx(ndev, budget - done); in fec_enet_rx_napi()
1971 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_enet_rx_napi()
1977 /* ------------------------------------------------------------------------- */
1996 struct device_node *np = fep->pdev->dev.of_node; in fec_get_mac()
2001 else if (ret == -EPROBE_DEFER) in fec_get_mac()
2014 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev); in fec_get_mac()
2017 iap = (unsigned char *)&pdata->mac; in fec_get_mac()
2026 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW)); in fec_get_mac()
2028 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16); in fec_get_mac()
2037 dev_err(&fep->pdev->dev, "Invalid MAC address: %pM\n", iap); in fec_get_mac()
2039 dev_info(&fep->pdev->dev, "Using random MAC address: %pM\n", in fec_get_mac()
2040 ndev->dev_addr); in fec_get_mac()
2045 eth_hw_addr_gen(ndev, iap, iap == macaddr ? fep->dev_id : 0); in fec_get_mac()
2050 /* ------------------------------------------------------------------------- */
2058 struct phy_device *phy_dev = ndev->phydev; in fec_enet_adjust_link()
2067 fep->link = 0; in fec_enet_adjust_link()
2068 } else if (phy_dev->link) { in fec_enet_adjust_link()
2069 if (!fep->link) { in fec_enet_adjust_link()
2070 fep->link = phy_dev->link; in fec_enet_adjust_link()
2074 if (fep->full_duplex != phy_dev->duplex) { in fec_enet_adjust_link()
2075 fep->full_duplex = phy_dev->duplex; in fec_enet_adjust_link()
2079 if (phy_dev->speed != fep->speed) { in fec_enet_adjust_link()
2080 fep->speed = phy_dev->speed; in fec_enet_adjust_link()
2087 napi_disable(&fep->napi); in fec_enet_adjust_link()
2092 napi_enable(&fep->napi); in fec_enet_adjust_link()
2095 if (fep->link) { in fec_enet_adjust_link()
2097 napi_disable(&fep->napi); in fec_enet_adjust_link()
2101 napi_enable(&fep->napi); in fec_enet_adjust_link()
2102 fep->link = phy_dev->link; in fec_enet_adjust_link()
2116 ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent, in fec_enet_mdio_wait()
2120 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mdio_wait()
2127 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c22()
2128 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c22()
2143 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c22()
2148 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c22()
2152 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c22()
2164 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c45()
2165 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c45()
2178 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2183 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_read_c45()
2192 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2197 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c45()
2201 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c45()
2213 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c22()
2214 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c22()
2229 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c22()
2234 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c22()
2245 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c45()
2246 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c45()
2259 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2264 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_write_c45()
2272 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2277 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c45()
2289 struct phy_device *phy_dev = ndev->phydev; in fec_enet_phy_reset_after_clk_enable()
2293 } else if (fep->phy_node) { in fec_enet_phy_reset_after_clk_enable()
2301 phy_dev = of_phy_find_device(fep->phy_node); in fec_enet_phy_reset_after_clk_enable()
2303 put_device(&phy_dev->mdio.dev); in fec_enet_phy_reset_after_clk_enable()
2313 ret = clk_prepare_enable(fep->clk_enet_out); in fec_enet_clk_enable()
2317 if (fep->clk_ptp) { in fec_enet_clk_enable()
2318 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2319 ret = clk_prepare_enable(fep->clk_ptp); in fec_enet_clk_enable()
2321 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2324 fep->ptp_clk_on = true; in fec_enet_clk_enable()
2326 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2329 ret = clk_prepare_enable(fep->clk_ref); in fec_enet_clk_enable()
2333 ret = clk_prepare_enable(fep->clk_2x_txclk); in fec_enet_clk_enable()
2339 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2340 if (fep->clk_ptp) { in fec_enet_clk_enable()
2341 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2342 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2343 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2344 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2346 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2347 clk_disable_unprepare(fep->clk_2x_txclk); in fec_enet_clk_enable()
2353 if (fep->clk_ref) in fec_enet_clk_enable()
2354 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2356 if (fep->clk_ptp) { in fec_enet_clk_enable()
2357 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2358 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2359 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2360 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2363 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2374 if (!of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) { in fec_enet_parse_rgmii_delay()
2376 dev_err(&fep->pdev->dev, "The only allowed RGMII TX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2377 return -EINVAL; in fec_enet_parse_rgmii_delay()
2379 fep->rgmii_txc_dly = true; in fec_enet_parse_rgmii_delay()
2384 if (!of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) { in fec_enet_parse_rgmii_delay()
2386 dev_err(&fep->pdev->dev, "The only allowed RGMII RX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2387 return -EINVAL; in fec_enet_parse_rgmii_delay()
2389 fep->rgmii_rxc_dly = true; in fec_enet_parse_rgmii_delay()
2403 int dev_id = fep->dev_id; in fec_enet_mii_probe()
2405 if (fep->phy_node) { in fec_enet_mii_probe()
2406 phy_dev = of_phy_connect(ndev, fep->phy_node, in fec_enet_mii_probe()
2408 fep->phy_interface); in fec_enet_mii_probe()
2411 return -ENODEV; in fec_enet_mii_probe()
2416 if (!mdiobus_is_registered_device(fep->mii_bus, phy_id)) in fec_enet_mii_probe()
2418 if (dev_id--) in fec_enet_mii_probe()
2420 strscpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2426 strscpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2433 fep->phy_interface); in fec_enet_mii_probe()
2442 if (fep->quirks & FEC_QUIRK_HAS_GBIT) { in fec_enet_mii_probe()
2453 fep->link = 0; in fec_enet_mii_probe()
2454 fep->full_duplex = 0; in fec_enet_mii_probe()
2469 int err = -ENXIO; in fec_enet_mii_init()
2478 * - fec0 supports MII & RMII modes while fec1 only supports RMII in fec_enet_mii_init()
2479 * - fec0 acts as the 1588 time master while fec1 is slave in fec_enet_mii_init()
2480 * - external phys can only be configured by fec0 in fec_enet_mii_init()
2490 if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) { in fec_enet_mii_init()
2493 fep->mii_bus = fec0_mii_bus; in fec_enet_mii_init()
2497 return -ENOENT; in fec_enet_mii_init()
2501 node = of_get_child_by_name(pdev->dev.of_node, "mdio"); in fec_enet_mii_init()
2503 of_property_read_u32(node, "clock-frequency", &bus_freq); in fec_enet_mii_init()
2505 "suppress-preamble"); in fec_enet_mii_init()
2512 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28 in fec_enet_mii_init()
2516 mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2); in fec_enet_mii_init()
2517 if (fep->quirks & FEC_QUIRK_ENET_MAC) in fec_enet_mii_init()
2518 mii_speed--; in fec_enet_mii_init()
2520 dev_err(&pdev->dev, in fec_enet_mii_init()
2522 clk_get_rate(fep->clk_ipg)); in fec_enet_mii_init()
2523 err = -EINVAL; in fec_enet_mii_init()
2539 holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1; in fec_enet_mii_init()
2541 fep->phy_speed = mii_speed << 1 | holdtime << 8; in fec_enet_mii_init()
2544 fep->phy_speed |= BIT(7); in fec_enet_mii_init()
2546 if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) { in fec_enet_mii_init()
2549 * - writing MSCR: in fec_enet_mii_init()
2550 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2552 * - writing MMFR: in fec_enet_mii_init()
2553 * - mscr[7:0]_not_zero in fec_enet_mii_init()
2555 writel(0, fep->hwp + FEC_MII_DATA); in fec_enet_mii_init()
2558 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_enet_mii_init()
2561 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mii_init()
2563 fep->mii_bus = mdiobus_alloc(); in fec_enet_mii_init()
2564 if (fep->mii_bus == NULL) { in fec_enet_mii_init()
2565 err = -ENOMEM; in fec_enet_mii_init()
2569 fep->mii_bus->name = "fec_enet_mii_bus"; in fec_enet_mii_init()
2570 fep->mii_bus->read = fec_enet_mdio_read_c22; in fec_enet_mii_init()
2571 fep->mii_bus->write = fec_enet_mdio_write_c22; in fec_enet_mii_init()
2572 if (fep->quirks & FEC_QUIRK_HAS_MDIO_C45) { in fec_enet_mii_init()
2573 fep->mii_bus->read_c45 = fec_enet_mdio_read_c45; in fec_enet_mii_init()
2574 fep->mii_bus->write_c45 = fec_enet_mdio_write_c45; in fec_enet_mii_init()
2576 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in fec_enet_mii_init()
2577 pdev->name, fep->dev_id + 1); in fec_enet_mii_init()
2578 fep->mii_bus->priv = fep; in fec_enet_mii_init()
2579 fep->mii_bus->parent = &pdev->dev; in fec_enet_mii_init()
2581 err = of_mdiobus_register(fep->mii_bus, node); in fec_enet_mii_init()
2588 phydev = mdiobus_get_phy(fep->mii_bus, addr); in fec_enet_mii_init()
2590 phydev->mac_managed_pm = true; in fec_enet_mii_init()
2596 if (fep->quirks & FEC_QUIRK_SINGLE_MDIO) in fec_enet_mii_init()
2597 fec0_mii_bus = fep->mii_bus; in fec_enet_mii_init()
2602 mdiobus_free(fep->mii_bus); in fec_enet_mii_init()
2610 if (--mii_cnt == 0) { in fec_enet_mii_remove()
2611 mdiobus_unregister(fep->mii_bus); in fec_enet_mii_remove()
2612 mdiobus_free(fep->mii_bus); in fec_enet_mii_remove()
2621 strscpy(info->driver, fep->pdev->dev.driver->name, in fec_enet_get_drvinfo()
2622 sizeof(info->driver)); in fec_enet_get_drvinfo()
2623 strscpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info)); in fec_enet_get_drvinfo()
2632 r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0); in fec_enet_get_regs_len()
2717 u32 __iomem *theregs = (u32 __iomem *)fep->hwp; in fec_enet_get_regs()
2718 struct device *dev = &fep->pdev->dev; in fec_enet_get_regs()
2744 regs->version = fec_enet_register_version; in fec_enet_get_regs()
2746 memset(buf, 0, regs->len); in fec_enet_get_regs()
2752 !(fep->quirks & FEC_QUIRK_HAS_FRREG)) in fec_enet_get_regs()
2768 if (fep->bufdesc_ex) { in fec_enet_get_ts_info()
2770 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | in fec_enet_get_ts_info()
2776 if (fep->ptp_clock) in fec_enet_get_ts_info()
2777 info->phc_index = ptp_clock_index(fep->ptp_clock); in fec_enet_get_ts_info()
2779 info->phc_index = -1; in fec_enet_get_ts_info()
2781 info->tx_types = (1 << HWTSTAMP_TX_OFF) | in fec_enet_get_ts_info()
2784 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | in fec_enet_get_ts_info()
2799 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0; in fec_enet_get_pauseparam()
2800 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0; in fec_enet_get_pauseparam()
2801 pause->rx_pause = pause->tx_pause; in fec_enet_get_pauseparam()
2809 if (!ndev->phydev) in fec_enet_set_pauseparam()
2810 return -ENODEV; in fec_enet_set_pauseparam()
2812 if (pause->tx_pause != pause->rx_pause) { in fec_enet_set_pauseparam()
2815 return -EINVAL; in fec_enet_set_pauseparam()
2818 fep->pause_flag = 0; in fec_enet_set_pauseparam()
2821 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0; in fec_enet_set_pauseparam()
2822 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0; in fec_enet_set_pauseparam()
2824 phy_set_sym_pause(ndev->phydev, pause->rx_pause, pause->tx_pause, in fec_enet_set_pauseparam()
2825 pause->autoneg); in fec_enet_set_pauseparam()
2827 if (pause->autoneg) { in fec_enet_set_pauseparam()
2830 phy_start_aneg(ndev->phydev); in fec_enet_set_pauseparam()
2833 napi_disable(&fep->napi); in fec_enet_set_pauseparam()
2838 napi_enable(&fep->napi); in fec_enet_set_pauseparam()
2928 fep->ethtool_stats[i] = readl(fep->hwp + fec_stats[i].offset); in fec_enet_update_ethtool_stats()
2937 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_get_xdp_stats()
2938 rxq = fep->rx_queue[i]; in fec_enet_get_xdp_stats()
2941 xdp_stats[j] += rxq->stats[j]; in fec_enet_get_xdp_stats()
2954 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_page_pool_stats()
2955 rxq = fep->rx_queue[i]; in fec_enet_page_pool_stats()
2957 if (!rxq->page_pool) in fec_enet_page_pool_stats()
2960 page_pool_get_stats(rxq->page_pool, &stats); in fec_enet_page_pool_stats()
2975 memcpy(data, fep->ethtool_stats, FEC_STATS_SIZE); in fec_enet_get_ethtool_stats()
3020 return -EOPNOTSUPP; in fec_enet_get_sset_count()
3031 writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3034 writel(0, fep->hwp + fec_stats[i].offset); in fec_enet_clear_ethtool_stats()
3036 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_clear_ethtool_stats()
3037 rxq = fep->rx_queue[i]; in fec_enet_clear_ethtool_stats()
3039 rxq->stats[j] = 0; in fec_enet_clear_ethtool_stats()
3043 writel(0, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3057 /* ITR clock source is enet system clock (clk_ahb).
3065 return us * (fep->itr_clk_rate / 64000) / 1000; in fec_enet_us_to_itr_clock()
3075 if (!fep->rx_time_itr || !fep->rx_pkts_itr || in fec_enet_itr_coal_set()
3076 !fep->tx_time_itr || !fep->tx_pkts_itr) in fec_enet_itr_coal_set()
3079 /* Select enet system clock as Interrupt Coalescing in fec_enet_itr_coal_set()
3086 rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr); in fec_enet_itr_coal_set()
3087 rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr)); in fec_enet_itr_coal_set()
3088 tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr); in fec_enet_itr_coal_set()
3089 tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr)); in fec_enet_itr_coal_set()
3094 writel(tx_itr, fep->hwp + FEC_TXIC0); in fec_enet_itr_coal_set()
3095 writel(rx_itr, fep->hwp + FEC_RXIC0); in fec_enet_itr_coal_set()
3096 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_itr_coal_set()
3097 writel(tx_itr, fep->hwp + FEC_TXIC1); in fec_enet_itr_coal_set()
3098 writel(rx_itr, fep->hwp + FEC_RXIC1); in fec_enet_itr_coal_set()
3099 writel(tx_itr, fep->hwp + FEC_TXIC2); in fec_enet_itr_coal_set()
3100 writel(rx_itr, fep->hwp + FEC_RXIC2); in fec_enet_itr_coal_set()
3111 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_get_coalesce()
3112 return -EOPNOTSUPP; in fec_enet_get_coalesce()
3114 ec->rx_coalesce_usecs = fep->rx_time_itr; in fec_enet_get_coalesce()
3115 ec->rx_max_coalesced_frames = fep->rx_pkts_itr; in fec_enet_get_coalesce()
3117 ec->tx_coalesce_usecs = fep->tx_time_itr; in fec_enet_get_coalesce()
3118 ec->tx_max_coalesced_frames = fep->tx_pkts_itr; in fec_enet_get_coalesce()
3129 struct device *dev = &fep->pdev->dev; in fec_enet_set_coalesce()
3132 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_set_coalesce()
3133 return -EOPNOTSUPP; in fec_enet_set_coalesce()
3135 if (ec->rx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3137 return -EINVAL; in fec_enet_set_coalesce()
3140 if (ec->tx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3142 return -EINVAL; in fec_enet_set_coalesce()
3145 cycle = fec_enet_us_to_itr_clock(ndev, ec->rx_coalesce_usecs); in fec_enet_set_coalesce()
3148 return -EINVAL; in fec_enet_set_coalesce()
3151 cycle = fec_enet_us_to_itr_clock(ndev, ec->tx_coalesce_usecs); in fec_enet_set_coalesce()
3154 return -EINVAL; in fec_enet_set_coalesce()
3157 fep->rx_time_itr = ec->rx_coalesce_usecs; in fec_enet_set_coalesce()
3158 fep->rx_pkts_itr = ec->rx_max_coalesced_frames; in fec_enet_set_coalesce()
3160 fep->tx_time_itr = ec->tx_coalesce_usecs; in fec_enet_set_coalesce()
3161 fep->tx_pkts_itr = ec->tx_max_coalesced_frames; in fec_enet_set_coalesce()
3175 return us * (fep->clk_ref_rate / 1000) / 1000; in fec_enet_us_to_tx_cycle()
3181 struct ethtool_eee *p = &fep->eee; in fec_enet_eee_mode_set()
3186 ret = phy_init_eee(ndev->phydev, false); in fec_enet_eee_mode_set()
3190 sleep_cycle = fec_enet_us_to_tx_cycle(ndev, p->tx_lpi_timer); in fec_enet_eee_mode_set()
3197 p->tx_lpi_enabled = enable; in fec_enet_eee_mode_set()
3198 p->eee_enabled = enable; in fec_enet_eee_mode_set()
3199 p->eee_active = enable; in fec_enet_eee_mode_set()
3201 writel(sleep_cycle, fep->hwp + FEC_LPI_SLEEP); in fec_enet_eee_mode_set()
3202 writel(wake_cycle, fep->hwp + FEC_LPI_WAKE); in fec_enet_eee_mode_set()
3211 struct ethtool_eee *p = &fep->eee; in fec_enet_get_eee()
3213 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_get_eee()
3214 return -EOPNOTSUPP; in fec_enet_get_eee()
3217 return -ENETDOWN; in fec_enet_get_eee()
3219 edata->eee_enabled = p->eee_enabled; in fec_enet_get_eee()
3220 edata->eee_active = p->eee_active; in fec_enet_get_eee()
3221 edata->tx_lpi_timer = p->tx_lpi_timer; in fec_enet_get_eee()
3222 edata->tx_lpi_enabled = p->tx_lpi_enabled; in fec_enet_get_eee()
3224 return phy_ethtool_get_eee(ndev->phydev, edata); in fec_enet_get_eee()
3231 struct ethtool_eee *p = &fep->eee; in fec_enet_set_eee()
3234 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_set_eee()
3235 return -EOPNOTSUPP; in fec_enet_set_eee()
3238 return -ENETDOWN; in fec_enet_set_eee()
3240 p->tx_lpi_timer = edata->tx_lpi_timer; in fec_enet_set_eee()
3242 if (!edata->eee_enabled || !edata->tx_lpi_enabled || in fec_enet_set_eee()
3243 !edata->tx_lpi_timer) in fec_enet_set_eee()
3251 return phy_ethtool_set_eee(ndev->phydev, edata); in fec_enet_set_eee()
3259 if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) { in fec_enet_get_wol()
3260 wol->supported = WAKE_MAGIC; in fec_enet_get_wol()
3261 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0; in fec_enet_get_wol()
3263 wol->supported = wol->wolopts = 0; in fec_enet_get_wol()
3272 if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET)) in fec_enet_set_wol()
3273 return -EINVAL; in fec_enet_set_wol()
3275 if (wol->wolopts & ~WAKE_MAGIC) in fec_enet_set_wol()
3276 return -EINVAL; in fec_enet_set_wol()
3278 device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC); in fec_enet_set_wol()
3279 if (device_may_wakeup(&ndev->dev)) in fec_enet_set_wol()
3280 fep->wol_flag |= FEC_WOL_FLAG_ENABLE; in fec_enet_set_wol()
3282 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE); in fec_enet_set_wol()
3322 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_free_buffers()
3323 rxq = fep->rx_queue[q]; in fec_enet_free_buffers()
3324 for (i = 0; i < rxq->bd.ring_size; i++) in fec_enet_free_buffers()
3325 page_pool_put_full_page(rxq->page_pool, rxq->rx_skb_info[i].page, false); in fec_enet_free_buffers()
3328 rxq->stats[i] = 0; in fec_enet_free_buffers()
3330 if (xdp_rxq_info_is_reg(&rxq->xdp_rxq)) in fec_enet_free_buffers()
3331 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_free_buffers()
3332 page_pool_destroy(rxq->page_pool); in fec_enet_free_buffers()
3333 rxq->page_pool = NULL; in fec_enet_free_buffers()
3336 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_free_buffers()
3337 txq = fep->tx_queue[q]; in fec_enet_free_buffers()
3338 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_free_buffers()
3339 kfree(txq->tx_bounce[i]); in fec_enet_free_buffers()
3340 txq->tx_bounce[i] = NULL; in fec_enet_free_buffers()
3342 if (!txq->tx_buf[i].buf_p) { in fec_enet_free_buffers()
3343 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3347 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_free_buffers()
3348 dev_kfree_skb(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3349 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_free_buffers()
3350 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3352 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_free_buffers()
3354 page_pool_put_page(page->pp, page, 0, false); in fec_enet_free_buffers()
3357 txq->tx_buf[i].buf_p = NULL; in fec_enet_free_buffers()
3358 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3369 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3370 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) { in fec_enet_free_queue()
3371 txq = fep->tx_queue[i]; in fec_enet_free_queue()
3372 dma_free_coherent(&fep->pdev->dev, in fec_enet_free_queue()
3373 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_free_queue()
3374 txq->tso_hdrs, in fec_enet_free_queue()
3375 txq->tso_hdrs_dma); in fec_enet_free_queue()
3378 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_free_queue()
3379 kfree(fep->rx_queue[i]); in fec_enet_free_queue()
3380 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3381 kfree(fep->tx_queue[i]); in fec_enet_free_queue()
3391 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_alloc_queue()
3394 ret = -ENOMEM; in fec_enet_alloc_queue()
3398 fep->tx_queue[i] = txq; in fec_enet_alloc_queue()
3399 txq->bd.ring_size = TX_RING_SIZE; in fec_enet_alloc_queue()
3400 fep->total_tx_ring_size += fep->tx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3402 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS; in fec_enet_alloc_queue()
3403 txq->tx_wake_threshold = FEC_MAX_SKB_DESCS + 2 * MAX_SKB_FRAGS; in fec_enet_alloc_queue()
3405 txq->tso_hdrs = dma_alloc_coherent(&fep->pdev->dev, in fec_enet_alloc_queue()
3406 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_alloc_queue()
3407 &txq->tso_hdrs_dma, in fec_enet_alloc_queue()
3409 if (!txq->tso_hdrs) { in fec_enet_alloc_queue()
3410 ret = -ENOMEM; in fec_enet_alloc_queue()
3415 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_alloc_queue()
3416 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]), in fec_enet_alloc_queue()
3418 if (!fep->rx_queue[i]) { in fec_enet_alloc_queue()
3419 ret = -ENOMEM; in fec_enet_alloc_queue()
3423 fep->rx_queue[i]->bd.ring_size = RX_RING_SIZE; in fec_enet_alloc_queue()
3424 fep->total_rx_ring_size += fep->rx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3443 rxq = fep->rx_queue[queue]; in fec_enet_alloc_rxq_buffers()
3444 bdp = rxq->bd.base; in fec_enet_alloc_rxq_buffers()
3446 err = fec_enet_create_page_pool(fep, rxq, rxq->bd.ring_size); in fec_enet_alloc_rxq_buffers()
3452 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_alloc_rxq_buffers()
3453 page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_alloc_rxq_buffers()
3458 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_alloc_rxq_buffers()
3460 rxq->rx_skb_info[i].page = page; in fec_enet_alloc_rxq_buffers()
3461 rxq->rx_skb_info[i].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_alloc_rxq_buffers()
3462 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_alloc_rxq_buffers()
3464 if (fep->bufdesc_ex) { in fec_enet_alloc_rxq_buffers()
3466 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_alloc_rxq_buffers()
3469 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3473 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3474 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_rxq_buffers()
3479 return -ENOMEM; in fec_enet_alloc_rxq_buffers()
3490 txq = fep->tx_queue[queue]; in fec_enet_alloc_txq_buffers()
3491 bdp = txq->bd.base; in fec_enet_alloc_txq_buffers()
3492 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_alloc_txq_buffers()
3493 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL); in fec_enet_alloc_txq_buffers()
3494 if (!txq->tx_bounce[i]) in fec_enet_alloc_txq_buffers()
3497 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_alloc_txq_buffers()
3498 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_alloc_txq_buffers()
3500 if (fep->bufdesc_ex) { in fec_enet_alloc_txq_buffers()
3502 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_alloc_txq_buffers()
3505 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3509 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3510 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_txq_buffers()
3516 return -ENOMEM; in fec_enet_alloc_txq_buffers()
3524 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_alloc_buffers()
3526 return -ENOMEM; in fec_enet_alloc_buffers()
3528 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_alloc_buffers()
3530 return -ENOMEM; in fec_enet_alloc_buffers()
3541 ret = pm_runtime_resume_and_get(&fep->pdev->dev); in fec_enet_open()
3545 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_enet_open()
3556 if (ndev->phydev && ndev->phydev->drv) in fec_enet_open()
3583 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_open()
3586 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_open()
3587 cpu_latency_qos_add_request(&fep->pm_qos_req, 0); in fec_enet_open()
3589 napi_enable(&fep->napi); in fec_enet_open()
3590 phy_start(ndev->phydev); in fec_enet_open()
3593 device_set_wakeup_enable(&ndev->dev, fep->wol_flag & in fec_enet_open()
3603 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_open()
3604 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_open()
3605 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_open()
3614 phy_stop(ndev->phydev); in fec_enet_close()
3617 napi_disable(&fep->napi); in fec_enet_close()
3622 phy_disconnect(ndev->phydev); in fec_enet_close()
3624 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_close()
3630 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_close()
3631 cpu_latency_qos_remove_request(&fep->pm_qos_req); in fec_enet_close()
3633 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_close()
3634 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_close()
3635 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_close()
3662 if (ndev->flags & IFF_PROMISC) { in set_multicast_list()
3663 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3665 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3669 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3671 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3673 if (ndev->flags & IFF_ALLMULTI) { in set_multicast_list()
3677 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3678 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3686 crc = ether_crc_le(ndev->addr_len, ha->addr); in set_multicast_list()
3691 hash = (crc >> (32 - FEC_HASH_BITS)) & 0x3f; in set_multicast_list()
3694 hash_high |= 1 << (hash - 32); in set_multicast_list()
3699 writel(hash_high, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3700 writel(hash_low, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3711 if (!is_valid_ether_addr(addr->sa_data)) in fec_set_mac_address()
3712 return -EADDRNOTAVAIL; in fec_set_mac_address()
3713 eth_hw_addr_set(ndev, addr->sa_data); in fec_set_mac_address()
3724 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) | in fec_set_mac_address()
3725 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24), in fec_set_mac_address()
3726 fep->hwp + FEC_ADDR_LOW); in fec_set_mac_address()
3727 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24), in fec_set_mac_address()
3728 fep->hwp + FEC_ADDR_HIGH); in fec_set_mac_address()
3736 netdev_features_t changed = features ^ netdev->features; in fec_enet_set_netdev_features()
3738 netdev->features = features; in fec_enet_set_netdev_features()
3743 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3745 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3753 netdev_features_t changed = features ^ netdev->features; in fec_set_features()
3756 napi_disable(&fep->napi); in fec_set_features()
3763 napi_enable(&fep->napi); in fec_set_features()
3777 if (!(fep->quirks & FEC_QUIRK_HAS_AVB)) in fec_enet_select_queue()
3781 if (eth_type_vlan(skb->protocol)) { in fec_enet_select_queue()
3784 vlan_tag = ntohs(vhdr->h_vlan_TCI); in fec_enet_select_queue()
3787 vlan_tag = skb->vlan_tci; in fec_enet_select_queue()
3801 switch (bpf->command) { in fec_enet_bpf()
3807 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_bpf()
3808 return -EOPNOTSUPP; in fec_enet_bpf()
3810 if (!bpf->prog) in fec_enet_bpf()
3814 napi_disable(&fep->napi); in fec_enet_bpf()
3818 old_prog = xchg(&fep->xdp_prog, bpf->prog); in fec_enet_bpf()
3825 napi_enable(&fep->napi); in fec_enet_bpf()
3829 if (bpf->prog) in fec_enet_bpf()
3835 return -EOPNOTSUPP; in fec_enet_bpf()
3838 return -EOPNOTSUPP; in fec_enet_bpf()
3848 return (index % fep->num_tx_queues); in fec_enet_xdp_get_tx_queue()
3864 netdev_err_once(fep->netdev, "NOT enough BD for SG!\n"); in fec_enet_txq_xmit_frame()
3865 return -EBUSY; in fec_enet_txq_xmit_frame()
3869 bdp = txq->bd.cur; in fec_enet_txq_xmit_frame()
3870 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_xmit_frame()
3873 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3878 dma_addr = dma_map_single(&fep->pdev->dev, xdpf->data, in fec_enet_txq_xmit_frame()
3879 xdpf->len, DMA_TO_DEVICE); in fec_enet_txq_xmit_frame()
3880 if (dma_mapping_error(&fep->pdev->dev, dma_addr)) in fec_enet_txq_xmit_frame()
3881 return -ENOMEM; in fec_enet_txq_xmit_frame()
3883 frame_len = xdpf->len; in fec_enet_txq_xmit_frame()
3884 txq->tx_buf[index].buf_p = xdpf; in fec_enet_txq_xmit_frame()
3885 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_NDO; in fec_enet_txq_xmit_frame()
3890 page = virt_to_page(xdpb->data); in fec_enet_txq_xmit_frame()
3892 (xdpb->data - xdpb->data_hard_start); in fec_enet_txq_xmit_frame()
3893 dma_sync_single_for_device(&fep->pdev->dev, dma_addr, in fec_enet_txq_xmit_frame()
3895 frame_len = xdpb->data_end - xdpb->data; in fec_enet_txq_xmit_frame()
3896 txq->tx_buf[index].buf_p = page; in fec_enet_txq_xmit_frame()
3897 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_TX; in fec_enet_txq_xmit_frame()
3901 if (fep->bufdesc_ex) in fec_enet_txq_xmit_frame()
3904 bdp->cbd_bufaddr = cpu_to_fec32(dma_addr); in fec_enet_txq_xmit_frame()
3905 bdp->cbd_datlen = cpu_to_fec16(frame_len); in fec_enet_txq_xmit_frame()
3907 if (fep->bufdesc_ex) { in fec_enet_txq_xmit_frame()
3910 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_xmit_frame()
3911 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_xmit_frame()
3913 ebdp->cbd_bdu = 0; in fec_enet_txq_xmit_frame()
3914 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_xmit_frame()
3926 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_xmit_frame()
3929 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3931 /* Make sure the update to bdp are performed before txq->bd.cur. */ in fec_enet_txq_xmit_frame()
3934 txq->bd.cur = bdp; in fec_enet_txq_xmit_frame()
3937 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_xmit_frame()
3951 txq = fep->tx_queue[queue]; in fec_enet_xdp_tx_xmit()
3952 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_tx_xmit()
3979 txq = fep->tx_queue[queue]; in fec_enet_xdp_xmit()
3980 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_xmit()
4003 return -EINVAL; in fec_hwtstamp_get()
4005 if (!fep->bufdesc_ex) in fec_hwtstamp_get()
4006 return -EOPNOTSUPP; in fec_hwtstamp_get()
4020 return -EINVAL; in fec_hwtstamp_set()
4022 if (!fep->bufdesc_ex) in fec_hwtstamp_set()
4023 return -EOPNOTSUPP; in fec_hwtstamp_set()
4064 unsigned dsize = fep->bufdesc_ex ? sizeof(struct bufdesc_ex) : in fec_enet_init()
4071 fep->rx_align = 0xf; in fec_enet_init()
4072 fep->tx_align = 0xf; in fec_enet_init()
4074 fep->rx_align = 0x3; in fec_enet_init()
4075 fep->tx_align = 0x3; in fec_enet_init()
4077 fep->rx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4078 fep->tx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4079 fep->rx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4080 fep->tx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4083 ret = dma_set_mask_and_coherent(&fep->pdev->dev, DMA_BIT_MASK(32)); in fec_enet_init()
4085 dev_warn(&fep->pdev->dev, "No suitable DMA available\n"); in fec_enet_init()
4093 bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) * dsize; in fec_enet_init()
4096 cbd_base = dmam_alloc_coherent(&fep->pdev->dev, bd_size, &bd_dma, in fec_enet_init()
4099 ret = -ENOMEM; in fec_enet_init()
4109 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_init()
4110 struct fec_enet_priv_rx_q *rxq = fep->rx_queue[i]; in fec_enet_init()
4111 unsigned size = dsize * rxq->bd.ring_size; in fec_enet_init()
4113 rxq->bd.qid = i; in fec_enet_init()
4114 rxq->bd.base = cbd_base; in fec_enet_init()
4115 rxq->bd.cur = cbd_base; in fec_enet_init()
4116 rxq->bd.dma = bd_dma; in fec_enet_init()
4117 rxq->bd.dsize = dsize; in fec_enet_init()
4118 rxq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4119 rxq->bd.reg_desc_active = fep->hwp + offset_des_active_rxq[i]; in fec_enet_init()
4122 rxq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4125 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_init()
4126 struct fec_enet_priv_tx_q *txq = fep->tx_queue[i]; in fec_enet_init()
4127 unsigned size = dsize * txq->bd.ring_size; in fec_enet_init()
4129 txq->bd.qid = i; in fec_enet_init()
4130 txq->bd.base = cbd_base; in fec_enet_init()
4131 txq->bd.cur = cbd_base; in fec_enet_init()
4132 txq->bd.dma = bd_dma; in fec_enet_init()
4133 txq->bd.dsize = dsize; in fec_enet_init()
4134 txq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4135 txq->bd.reg_desc_active = fep->hwp + offset_des_active_txq[i]; in fec_enet_init()
4138 txq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4143 ndev->watchdog_timeo = TX_TIMEOUT; in fec_enet_init()
4144 ndev->netdev_ops = &fec_netdev_ops; in fec_enet_init()
4145 ndev->ethtool_ops = &fec_enet_ethtool_ops; in fec_enet_init()
4147 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK); in fec_enet_init()
4148 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi); in fec_enet_init()
4150 if (fep->quirks & FEC_QUIRK_HAS_VLAN) in fec_enet_init()
4152 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; in fec_enet_init()
4154 if (fep->quirks & FEC_QUIRK_HAS_CSUM) { in fec_enet_init()
4158 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM in fec_enet_init()
4160 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_init()
4163 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_init()
4164 fep->tx_align = 0; in fec_enet_init()
4165 fep->rx_align = 0x3f; in fec_enet_init()
4168 ndev->hw_features = ndev->features; in fec_enet_init()
4170 if (!(fep->quirks & FEC_QUIRK_SWAP_FRAME)) in fec_enet_init()
4171 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | in fec_enet_init()
4176 if (fep->quirks & FEC_QUIRK_MIB_CLEAR) in fec_enet_init()
4192 netif_napi_del(&fep->napi); in fec_enet_deinit()
4201 struct device_node *np = pdev->dev.of_node; in fec_reset_phy()
4207 err = of_property_read_u32(np, "phy-reset-duration", &msec); in fec_reset_phy()
4212 err = of_property_read_u32(np, "phy-reset-post-delay", &phy_post_delay); in fec_reset_phy()
4215 return -EINVAL; in fec_reset_phy()
4217 phy_reset = devm_gpiod_get_optional(&pdev->dev, "phy-reset", in fec_reset_phy()
4220 return dev_err_probe(&pdev->dev, PTR_ERR(phy_reset), in fec_reset_phy()
4221 "failed to get phy-reset-gpios\n"); in fec_reset_phy()
4258 struct device_node *np = pdev->dev.of_node; in fec_enet_get_queue_num()
4266 of_property_read_u32(np, "fsl,num-tx-queues", num_tx); in fec_enet_get_queue_num()
4268 of_property_read_u32(np, "fsl,num-rx-queues", num_rx); in fec_enet_get_queue_num()
4271 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4278 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4304 if (fep->quirks & FEC_QUIRK_WAKEUP_FROM_INT2) in fec_enet_get_wakeup_irq()
4305 fep->wake_irq = fep->irq[2]; in fec_enet_get_wakeup_irq()
4307 fep->wake_irq = fep->irq[0]; in fec_enet_get_wakeup_irq()
4317 gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0); in fec_enet_init_stop_mode()
4321 ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val, in fec_enet_init_stop_mode()
4324 dev_dbg(&fep->pdev->dev, "no stop mode property\n"); in fec_enet_init_stop_mode()
4328 fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np); in fec_enet_init_stop_mode()
4329 if (IS_ERR(fep->stop_gpr.gpr)) { in fec_enet_init_stop_mode()
4330 dev_err(&fep->pdev->dev, "could not find gpr regmap\n"); in fec_enet_init_stop_mode()
4331 ret = PTR_ERR(fep->stop_gpr.gpr); in fec_enet_init_stop_mode()
4332 fep->stop_gpr.gpr = NULL; in fec_enet_init_stop_mode()
4336 fep->stop_gpr.reg = out_val[1]; in fec_enet_init_stop_mode()
4337 fep->stop_gpr.bit = out_val[2]; in fec_enet_init_stop_mode()
4355 struct device_node *np = pdev->dev.of_node, *phy_node; in fec_probe()
4368 return -ENOMEM; in fec_probe()
4370 SET_NETDEV_DEV(ndev, &pdev->dev); in fec_probe()
4375 of_id = of_match_device(fec_dt_ids, &pdev->dev); in fec_probe()
4377 pdev->id_entry = of_id->data; in fec_probe()
4378 dev_info = (struct fec_devinfo *)pdev->id_entry->driver_data; in fec_probe()
4380 fep->quirks = dev_info->quirks; in fec_probe()
4382 fep->netdev = ndev; in fec_probe()
4383 fep->num_rx_queues = num_rx_qs; in fec_probe()
4384 fep->num_tx_queues = num_tx_qs; in fec_probe()
4388 if (fep->quirks & FEC_QUIRK_HAS_GBIT) in fec_probe()
4389 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; in fec_probe()
4393 pinctrl_pm_select_default_state(&pdev->dev); in fec_probe()
4395 fep->hwp = devm_platform_ioremap_resource(pdev, 0); in fec_probe()
4396 if (IS_ERR(fep->hwp)) { in fec_probe()
4397 ret = PTR_ERR(fep->hwp); in fec_probe()
4401 fep->pdev = pdev; in fec_probe()
4402 fep->dev_id = dev_id++; in fec_probe()
4408 !of_property_read_bool(np, "fsl,err006687-workaround-present")) in fec_probe()
4409 fep->quirks |= FEC_QUIRK_ERR006687; in fec_probe()
4415 if (of_property_read_bool(np, "fsl,magic-packet")) in fec_probe()
4416 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET; in fec_probe()
4422 phy_node = of_parse_phandle(np, "phy-handle", 0); in fec_probe()
4426 dev_err(&pdev->dev, in fec_probe()
4427 "broken fixed-link specification\n"); in fec_probe()
4432 fep->phy_node = phy_node; in fec_probe()
4434 ret = of_get_phy_mode(pdev->dev.of_node, &interface); in fec_probe()
4436 pdata = dev_get_platdata(&pdev->dev); in fec_probe()
4438 fep->phy_interface = pdata->phy; in fec_probe()
4440 fep->phy_interface = PHY_INTERFACE_MODE_MII; in fec_probe()
4442 fep->phy_interface = interface; in fec_probe()
4449 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in fec_probe()
4450 if (IS_ERR(fep->clk_ipg)) { in fec_probe()
4451 ret = PTR_ERR(fep->clk_ipg); in fec_probe()
4455 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in fec_probe()
4456 if (IS_ERR(fep->clk_ahb)) { in fec_probe()
4457 ret = PTR_ERR(fep->clk_ahb); in fec_probe()
4461 fep->itr_clk_rate = clk_get_rate(fep->clk_ahb); in fec_probe()
4464 fep->clk_enet_out = devm_clk_get_optional(&pdev->dev, "enet_out"); in fec_probe()
4465 if (IS_ERR(fep->clk_enet_out)) { in fec_probe()
4466 ret = PTR_ERR(fep->clk_enet_out); in fec_probe()
4470 fep->ptp_clk_on = false; in fec_probe()
4471 mutex_init(&fep->ptp_clk_mutex); in fec_probe()
4474 fep->clk_ref = devm_clk_get_optional(&pdev->dev, "enet_clk_ref"); in fec_probe()
4475 if (IS_ERR(fep->clk_ref)) { in fec_probe()
4476 ret = PTR_ERR(fep->clk_ref); in fec_probe()
4479 fep->clk_ref_rate = clk_get_rate(fep->clk_ref); in fec_probe()
4482 if (fep->rgmii_txc_dly || fep->rgmii_rxc_dly) { in fec_probe()
4483 fep->clk_2x_txclk = devm_clk_get(&pdev->dev, "enet_2x_txclk"); in fec_probe()
4484 if (IS_ERR(fep->clk_2x_txclk)) in fec_probe()
4485 fep->clk_2x_txclk = NULL; in fec_probe()
4488 fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX; in fec_probe()
4489 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); in fec_probe()
4490 if (IS_ERR(fep->clk_ptp)) { in fec_probe()
4491 fep->clk_ptp = NULL; in fec_probe()
4492 fep->bufdesc_ex = false; in fec_probe()
4499 ret = clk_prepare_enable(fep->clk_ipg); in fec_probe()
4502 ret = clk_prepare_enable(fep->clk_ahb); in fec_probe()
4506 fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy"); in fec_probe()
4507 if (!IS_ERR(fep->reg_phy)) { in fec_probe()
4508 ret = regulator_enable(fep->reg_phy); in fec_probe()
4510 dev_err(&pdev->dev, in fec_probe()
4515 if (PTR_ERR(fep->reg_phy) == -EPROBE_DEFER) { in fec_probe()
4516 ret = -EPROBE_DEFER; in fec_probe()
4519 fep->reg_phy = NULL; in fec_probe()
4522 pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); in fec_probe()
4523 pm_runtime_use_autosuspend(&pdev->dev); in fec_probe()
4524 pm_runtime_get_noresume(&pdev->dev); in fec_probe()
4525 pm_runtime_set_active(&pdev->dev); in fec_probe()
4526 pm_runtime_enable(&pdev->dev); in fec_probe()
4533 if (fep->bufdesc_ex) in fec_probe()
4549 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt, in fec_probe()
4550 0, pdev->name, ndev); in fec_probe()
4554 fep->irq[i] = irq; in fec_probe()
4567 pinctrl_pm_select_sleep_state(&pdev->dev); in fec_probe()
4569 ndev->max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN; in fec_probe()
4575 device_init_wakeup(&ndev->dev, fep->wol_flag & in fec_probe()
4578 if (fep->bufdesc_ex && fep->ptp_clock) in fec_probe()
4579 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id); in fec_probe()
4581 INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work); in fec_probe()
4583 pm_runtime_mark_last_busy(&pdev->dev); in fec_probe()
4584 pm_runtime_put_autosuspend(&pdev->dev); in fec_probe()
4596 pm_runtime_put_noidle(&pdev->dev); in fec_probe()
4597 pm_runtime_disable(&pdev->dev); in fec_probe()
4598 if (fep->reg_phy) in fec_probe()
4599 regulator_disable(fep->reg_phy); in fec_probe()
4601 clk_disable_unprepare(fep->clk_ahb); in fec_probe()
4603 clk_disable_unprepare(fep->clk_ipg); in fec_probe()
4614 dev_id--; in fec_probe()
4626 struct device_node *np = pdev->dev.of_node; in fec_drv_remove()
4629 ret = pm_runtime_get_sync(&pdev->dev); in fec_drv_remove()
4631 dev_err(&pdev->dev, in fec_drv_remove()
4635 cancel_work_sync(&fep->tx_timeout_work); in fec_drv_remove()
4639 if (fep->reg_phy) in fec_drv_remove()
4640 regulator_disable(fep->reg_phy); in fec_drv_remove()
4644 of_node_put(fep->phy_node); in fec_drv_remove()
4650 clk_disable_unprepare(fep->clk_ahb); in fec_drv_remove()
4651 clk_disable_unprepare(fep->clk_ipg); in fec_drv_remove()
4653 pm_runtime_put_noidle(&pdev->dev); in fec_drv_remove()
4654 pm_runtime_disable(&pdev->dev); in fec_drv_remove()
4668 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) in fec_suspend()
4669 fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON; in fec_suspend()
4670 phy_stop(ndev->phydev); in fec_suspend()
4671 napi_disable(&fep->napi); in fec_suspend()
4676 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_suspend()
4678 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_suspend()
4681 if (fep->wake_irq > 0) { in fec_suspend()
4682 disable_irq(fep->wake_irq); in fec_suspend()
4683 enable_irq_wake(fep->wake_irq); in fec_suspend()
4690 fep->rpm_active = !pm_runtime_status_suspended(dev); in fec_suspend()
4691 if (fep->rpm_active) { in fec_suspend()
4701 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) in fec_suspend()
4702 regulator_disable(fep->reg_phy); in fec_suspend()
4707 if (fep->clk_enet_out || fep->reg_phy) in fec_suspend()
4708 fep->link = 0; in fec_suspend()
4720 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_resume()
4721 ret = regulator_enable(fep->reg_phy); in fec_resume()
4728 if (fep->rpm_active) in fec_resume()
4736 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) { in fec_resume()
4738 if (fep->wake_irq) { in fec_resume()
4739 disable_irq_wake(fep->wake_irq); in fec_resume()
4740 enable_irq(fep->wake_irq); in fec_resume()
4743 val = readl(fep->hwp + FEC_ECNTRL); in fec_resume()
4745 writel(val, fep->hwp + FEC_ECNTRL); in fec_resume()
4746 fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON; in fec_resume()
4748 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_resume()
4754 napi_enable(&fep->napi); in fec_resume()
4755 phy_init_hw(ndev->phydev); in fec_resume()
4756 phy_start(ndev->phydev); in fec_resume()
4763 if (fep->reg_phy) in fec_resume()
4764 regulator_disable(fep->reg_phy); in fec_resume()
4773 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_suspend()
4774 clk_disable_unprepare(fep->clk_ipg); in fec_runtime_suspend()
4785 ret = clk_prepare_enable(fep->clk_ahb); in fec_runtime_resume()
4788 ret = clk_prepare_enable(fep->clk_ipg); in fec_runtime_resume()
4795 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_resume()