Lines Matching refs:tg3_asic_rev
630 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_write_mem()
655 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_read_mem()
683 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock_init()
719 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock()
739 if (tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_ape_lock()
780 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
800 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
1501 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_start()
1599 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_init()
1820 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_poll_fw()
2021 tg3_asic_rev(tp) != ASIC_REV_5785) in tg3_adjust_link()
2048 if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_adjust_link()
2237 if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) in tg3_phy_toggle_apd()
2427 (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_phy_eee_enable()
2428 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_eee_enable()
2634 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2649 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_phy_reset()
2650 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_phy_reset()
2651 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_phy_reset()
2659 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_phy_reset()
2757 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2790 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2791 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2800 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2801 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2814 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_pwrsrc_switch_to_vmain()
2815 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_pwrsrc_switch_to_vmain()
2816 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_pwrsrc_switch_to_vmain()
2839 tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_die_with_vmain()
2840 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_pwrsrc_die_with_vmain()
2863 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_switch_to_vaux()
2864 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_pwrsrc_switch_to_vaux()
2896 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_pwrsrc_switch_to_vaux()
2968 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_frob_aux_power()
2969 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_frob_aux_power()
2970 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_frob_aux_power()
3019 switch (tg3_asic_rev(tp)) { in tg3_phy_power_bug()
3044 switch (tg3_asic_rev(tp)) { in tg3_phy_led_bug()
3064 if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_power_down_phy()
3076 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_phy()
3503 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()
3637 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_halt_cpu()
3711 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3716 if (tg3_asic_rev(tp) != ASIC_REV_57766) { in tg3_load_firmware_cpu()
3916 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_load_tso_firmware()
3978 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in __tg3_set_mac_addr()
3979 tg3_asic_rev(tp) == ASIC_REV_5704) { in __tg3_set_mac_addr()
4105 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4153 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_power_down_prepare()
4186 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4187 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_power_down_prepare()
4198 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4203 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4204 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4226 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4227 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4379 switch (tg3_asic_rev(tp)) { in tg3_phy_autoneg_cfg()
4457 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_phy_copper_begin()
4758 if (tg3_asic_rev(tp) != ASIC_REV_5717) in tg3_setup_eee()
4797 if ((tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_setup_copper_phy()
4798 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_setup_copper_phy()
4799 tg3_asic_rev(tp) == ASIC_REV_5705) && in tg3_setup_copper_phy()
4859 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_setup_copper_phy()
4860 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_setup_copper_phy()
5027 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_setup_copper_phy()
5058 if (tg3_asic_rev(tp) == ASIC_REV_5700 && in tg3_setup_copper_phy()
5819 if ((tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_setup_fiber_mii_phy()
5820 tg3_asic_rev(tp) == ASIC_REV_5720) && in tg3_setup_fiber_mii_phy()
5871 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
5940 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
6094 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_setup_phy()
6095 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_setup_phy()
7664 if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { in tg3_4g_tso_overflow_test()
7805 if (tg3_asic_rev(tp) != ASIC_REV_5701) in tigon3_dma_hwbug_workaround()
8003 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_start_xmit()
8184 tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_mac_loopback()
8243 tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_phy_lpbk_set()
8267 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_phy_lpbk_set()
9015 switch (tg3_asic_rev(tp)) { in tg3_override_clk()
9036 switch (tg3_asic_rev(tp)) { in tg3_restore_clk()
9081 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()
9120 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_chip_reset()
9130 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9142 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_chip_reset()
9261 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_chip_reset()
9286 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9298 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_chip_reset()
9525 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_tx_rcbs_disable()
9567 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_rx_ret_rcbs_disable()
9568 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_rx_ret_rcbs_disable()
9678 tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_setup_rxbd_thresholds()
9679 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()
9682 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_setup_rxbd_thresholds()
9683 tg3_asic_rev(tp) == ASIC_REV_5787) in tg3_setup_rxbd_thresholds()
9861 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_lso_rd_dma_workaround_bit()
9924 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_reset_hw()
10049 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_reset_hw()
10050 tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_reset_hw()
10053 } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && in tg3_reset_hw()
10054 tg3_asic_rev(tp) != ASIC_REV_5761) { in tg3_reset_hw()
10104 } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { in tg3_reset_hw()
10106 if (tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_reset_hw()
10144 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_reset_hw()
10146 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_reset_hw()
10147 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_reset_hw()
10214 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10256 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10257 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10277 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_reset_hw()
10280 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10281 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10282 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10287 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10300 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10314 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10315 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10318 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10319 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10322 if (tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_reset_hw()
10323 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10324 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10325 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_reset_hw()
10329 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10336 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10347 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10348 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10349 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10352 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10435 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_reset_hw()
10453 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()
10457 if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_reset_hw()
10492 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10508 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_reset_hw()
10519 if (tg3_asic_rev(tp) == ASIC_REV_5703) { in tg3_reset_hw()
10522 } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_reset_hw()
10533 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10534 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_reset_hw()
10551 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_reset_hw()
10580 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10596 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_reset_hw()
10599 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10600 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10624 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10649 if ((tg3_asic_rev(tp) == ASIC_REV_5704) && in tg3_reset_hw()
10671 if (tg3_asic_rev(tp) == ASIC_REV_5704 && in tg3_reset_hw()
10678 tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_reset_hw()
10941 if (tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_periodic_fetch_stats()
10942 tg3_asic_rev(tp) != ASIC_REV_5762 && in tg3_periodic_fetch_stats()
10994 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_timer()
11130 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_timer_init()
11732 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_open()
11806 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_calc_crc_errors()
11807 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_calc_crc_errors()
12493 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_ringparam()
12494 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_ringparam()
12495 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_ringparam()
12603 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_pauseparam()
12604 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_pauseparam()
12605 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_pauseparam()
13371 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_test_memory()
13375 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_test_memory()
13487 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_run_loopback()
13673 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_test_loopback()
14273 if (tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_change_mtu()
14274 tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_change_mtu()
14275 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_change_mtu()
14276 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_change_mtu()
14389 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_nvram_info()
14830 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14914 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14961 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14975 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
15010 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_nvram_init()
15011 tg3_asic_rev(tp) != ASIC_REV_5701) { in tg3_nvram_init()
15024 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()
15026 else if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_nvram_init()
15028 else if (tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_nvram_init()
15029 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_nvram_init()
15030 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_nvram_init()
15032 else if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_nvram_init()
15034 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_nvram_init()
15036 else if (tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_nvram_init()
15039 else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_nvram_init()
15040 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_nvram_init()
15042 else if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_nvram_init()
15043 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_nvram_init()
15156 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_eeprom_hw_cfg()
15184 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_eeprom_hw_cfg()
15185 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_eeprom_hw_cfg()
15186 tg3_asic_rev(tp) != ASIC_REV_5703 && in tg3_get_eeprom_hw_cfg()
15190 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_get_eeprom_hw_cfg()
15193 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_eeprom_hw_cfg()
15194 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_eeprom_hw_cfg()
15195 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_eeprom_hw_cfg()
15243 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15244 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_get_eeprom_hw_cfg()
15257 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_eeprom_hw_cfg()
15276 if ((tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15277 tg3_asic_rev(tp) == ASIC_REV_5701) && in tg3_get_eeprom_hw_cfg()
15325 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_eeprom_hw_cfg()
15334 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_eeprom_hw_cfg()
15569 (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_probe()
15570 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_phy_probe()
15571 tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_phy_probe()
15572 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_phy_probe()
15573 (tg3_asic_rev(tp) == ASIC_REV_5717 && in tg3_phy_probe()
15575 (tg3_asic_rev(tp) == ASIC_REV_57765 && in tg3_phy_probe()
15671 if (tg3_asic_rev(tp) == ASIC_REV_5717) { in tg3_read_vpd()
15679 } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_read_vpd()
15690 } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { in tg3_read_vpd()
15705 } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_read_vpd()
15716 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_read_vpd()
15957 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_read_otp_ver()
16063 if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { in tg3_detect_asic_rev()
16109 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_detect_asic_rev()
16110 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_detect_asic_rev()
16111 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_detect_asic_rev()
16114 if (tg3_asic_rev(tp) == ASIC_REV_57765 || in tg3_detect_asic_rev()
16115 tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_detect_asic_rev()
16119 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_detect_asic_rev()
16123 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_detect_asic_rev()
16124 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_detect_asic_rev()
16125 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_detect_asic_rev()
16126 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_detect_asic_rev()
16127 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_detect_asic_rev()
16128 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_detect_asic_rev()
16132 if (tg3_asic_rev(tp) == ASIC_REV_5780 || in tg3_detect_asic_rev()
16133 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_detect_asic_rev()
16136 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_detect_asic_rev()
16137 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()
16138 tg3_asic_rev(tp) == ASIC_REV_5906 || in tg3_detect_asic_rev()
16143 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_detect_asic_rev()
16153 if ((tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_10_100_only_device()
16159 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_10_100_only_device()
16261 if (tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_get_invariants()
16321 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16322 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_get_invariants()
16331 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16336 if (tg3_asic_rev(tp) == ASIC_REV_5750 && in tg3_get_invariants()
16339 } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_invariants()
16340 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_invariants()
16344 if (tg3_asic_rev(tp) == ASIC_REV_5705) in tg3_get_invariants()
16369 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_get_invariants()
16378 (tg3_asic_rev(tp) == ASIC_REV_5714 && in tg3_get_invariants()
16384 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16400 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16401 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_invariants()
16406 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16409 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_get_invariants()
16412 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16413 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16414 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16415 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16437 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16441 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16442 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_get_invariants()
16449 } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_get_invariants()
16482 if (tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_get_invariants()
16551 else if (tg3_asic_rev(tp) == ASIC_REV_5701 || in tg3_get_invariants()
16585 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16594 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16595 tg3_asic_rev(tp) == ASIC_REV_5701))) in tg3_get_invariants()
16607 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16615 } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16616 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16617 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_get_invariants()
16622 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_get_invariants()
16671 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16678 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()
16681 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16682 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_get_invariants()
16696 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16710 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16719 if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16723 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16724 (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16739 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_invariants()
16740 tg3_asic_rev(tp) != ASIC_REV_57780 && in tg3_get_invariants()
16742 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16743 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_get_invariants()
16744 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16745 tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_get_invariants()
16755 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_invariants()
16773 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16774 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_get_invariants()
16781 if (tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_get_invariants()
16782 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_get_invariants()
16791 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16792 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16839 if (tg3_asic_rev(tp) == ASIC_REV_57766 && in tg3_get_invariants()
16846 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16852 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_get_invariants()
16885 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16895 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16905 tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16922 if (tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16939 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_invariants()
16940 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
16941 tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_get_invariants()
16967 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_device_address()
16980 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_device_address()
17043 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_calc_dma_bndry()
17044 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_calc_dma_bndry()
17282 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_test_dma()
17283 tg3_asic_rev(tp) == ASIC_REV_5750) in tg3_test_dma()
17288 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17289 tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_test_dma()
17298 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17303 if (tg3_asic_rev(tp) == ASIC_REV_5703) in tg3_test_dma()
17310 } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { in tg3_test_dma()
17313 } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_test_dma()
17323 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17324 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17327 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_test_dma()
17328 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_test_dma()
17348 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_test_dma()
17349 tg3_asic_rev(tp) != ASIC_REV_5701) in tg3_test_dma()
17454 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_init_bufmgr_config()
17735 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_init_one()
17786 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_init_one()
17787 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_init_one()
17789 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_init_one()
17790 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_init_one()
17803 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_init_one()
17894 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_init_one()
17895 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_init_one()
17896 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_init_one()