Lines Matching refs:f81604_sja1000_write

251 static int f81604_sja1000_write(struct f81604_port_priv *priv, u16 reg,  in f81604_sja1000_write()  function
277 	ret = f81604_sja1000_write(priv, F81604_SJA1000_IER,  in f81604_set_reset_mode()
294 		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD,  in f81604_set_reset_mode()
323 			return f81604_sja1000_write(priv, F81604_SJA1000_IER,  in f81604_set_normal_mode()
333 		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, mod_reg);  in f81604_set_normal_mode()
346 	ret = f81604_sja1000_write(priv, F81604_SJA1000_CDR,  in f81604_chipset_init()
353 		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCC0 + i, 0);  in f81604_chipset_init()
359 		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCM0 + i,  in f81604_chipset_init()
365 	return f81604_sja1000_write(priv, F81604_SJA1000_OCR,  in f81604_chipset_init()
770 	ret = f81604_sja1000_write(priv, F81604_CTRL_MODE_REG, mode);  in f81604_start()
784 	ret = f81604_sja1000_write(priv, F81604_SJA1000_TXERR, 0);  in f81604_start()
788 	ret = f81604_sja1000_write(priv, F81604_SJA1000_RXERR, 0);  in f81604_start()
835 	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR0, btr0);  in f81604_set_bittiming()
842 	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR1, btr1);  in f81604_set_bittiming()
899 		f81604_sja1000_write(priv, F81604_SJA1000_CMR,  in f81604_clear_reg_work()