Lines Matching +full:clk +full:- +full:source
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
21 #include <linux/clk.h>
38 { .compatible = "fsl,mpc5200-cdm", },
55 * (IP_CLK) can be selected as MSCAN clock source. According to in mpc52xx_can_get_clock()
66 freq = mpc5xxx_get_bus_frequency(&ofdev->dev); in mpc52xx_can_get_clock()
76 dev_err(&ofdev->dev, "can't get clock node!\n"); in mpc52xx_can_get_clock()
82 dev_err(&ofdev->dev, "can't map clock node!\n"); in mpc52xx_can_get_clock()
86 if (in_8(&cdm->ipb_clk_sel) & 0x1) in mpc52xx_can_get_clock()
88 val = in_be32(&cdm->rstcfg); in mpc52xx_can_get_clock()
118 struct clk *clk_in, *clk_can; in mpc512x_can_get_clock()
121 struct clk *clk_ipg; in mpc512x_can_get_clock()
123 /* the caller passed in the clock source spec that was read from in mpc512x_can_get_clock()
126 np = ofdev->dev.of_node; in mpc512x_can_get_clock()
128 of_property_read_u32(np, "fsl,mscan-clock-divider", &clockdiv); in mpc512x_can_get_clock()
129 dev_dbg(&ofdev->dev, "device tree specs: clk src[%s] div[%d]\n", in mpc512x_can_get_clock()
132 /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to in mpc512x_can_get_clock()
136 * for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC] in mpc512x_can_get_clock()
137 * bit needs to get cleared, an optional clock-divider may have in mpc512x_can_get_clock()
141 * in the absence of a clock-source spec, first an optimal clock in mpc512x_can_get_clock()
147 /* interpret the device tree's spec for the clock source */ in mpc512x_can_get_clock()
156 dev_dbg(&ofdev->dev, "got a clk source spec[%d]\n", clk_from); in mpc512x_can_get_clock()
162 dev_dbg(&ofdev->dev, "no clk source spec, trying SYS\n"); in mpc512x_can_get_clock()
163 clk_in = devm_clk_get(&ofdev->dev, "sys"); in mpc512x_can_get_clock()
173 dev_dbg(&ofdev->dev, in mpc512x_can_get_clock()
174 "clk fit, sys[%lu] div[%d] freq[%lu]\n", in mpc512x_can_get_clock()
180 dev_dbg(&ofdev->dev, "no clk source spec, trying REF\n"); in mpc512x_can_get_clock()
181 clk_in = devm_clk_get(&ofdev->dev, "ref"); in mpc512x_can_get_clock()
186 dev_dbg(&ofdev->dev, in mpc512x_can_get_clock()
187 "clk fit, ref[%lu] (no div) freq[%lu]\n", in mpc512x_can_get_clock()
192 * setup the MCLK mux source and rate if applicable, apply the in mpc512x_can_get_clock()
198 clk_can = devm_clk_get(&ofdev->dev, "ips"); in mpc512x_can_get_clock()
201 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
202 priv->clk_can = clk_can; in mpc512x_can_get_clock()
205 dev_dbg(&ofdev->dev, "clk from IPS, clksrc[%d] freq[%lu]\n", in mpc512x_can_get_clock()
210 clk_can = devm_clk_get(&ofdev->dev, "mclk"); in mpc512x_can_get_clock()
213 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
214 priv->clk_can = clk_can; in mpc512x_can_get_clock()
216 clk_in = devm_clk_get(&ofdev->dev, "sys"); in mpc512x_can_get_clock()
218 clk_in = devm_clk_get(&ofdev->dev, "ref"); in mpc512x_can_get_clock()
227 dev_dbg(&ofdev->dev, "clk from MCLK, clksrc[%d] freq[%lu]\n", in mpc512x_can_get_clock()
237 clk_ipg = devm_clk_get(&ofdev->dev, "ipg"); in mpc512x_can_get_clock()
242 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
243 priv->clk_ipg = clk_ipg; in mpc512x_can_get_clock()
245 /* return the determined clock source rate */ in mpc512x_can_get_clock()
249 dev_err(&ofdev->dev, "invalid clock source specification\n"); in mpc512x_can_get_clock()
250 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
254 dev_err(&ofdev->dev, "cannot acquire or setup bitrate clock source\n"); in mpc512x_can_get_clock()
255 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
259 dev_err(&ofdev->dev, "cannot acquire or setup register clock\n"); in mpc512x_can_get_clock()
260 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
268 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_put_clock()
269 if (priv->clk_ipg) in mpc512x_can_put_clock()
270 clk_disable_unprepare(priv->clk_ipg); in mpc512x_can_put_clock()
285 struct device_node *np = ofdev->dev.of_node; in mpc5xxx_can_probe()
291 int err = -ENOMEM; in mpc5xxx_can_probe()
293 data = of_device_get_match_data(&ofdev->dev); in mpc5xxx_can_probe()
295 return -EINVAL; in mpc5xxx_can_probe()
299 return dev_err_probe(&ofdev->dev, err, "couldn't ioremap\n"); in mpc5xxx_can_probe()
303 dev_err(&ofdev->dev, "no irq found\n"); in mpc5xxx_can_probe()
304 err = -ENODEV; in mpc5xxx_can_probe()
312 SET_NETDEV_DEV(dev, &ofdev->dev); in mpc5xxx_can_probe()
315 priv->reg_base = base; in mpc5xxx_can_probe()
316 dev->irq = irq; in mpc5xxx_can_probe()
318 clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL); in mpc5xxx_can_probe()
320 priv->type = data->type; in mpc5xxx_can_probe()
321 priv->can.clock.freq = data->get_clock(ofdev, clock_name, in mpc5xxx_can_probe()
323 if (!priv->can.clock.freq) { in mpc5xxx_can_probe()
324 dev_err(&ofdev->dev, "couldn't get MSCAN clock properties\n"); in mpc5xxx_can_probe()
330 dev_err(&ofdev->dev, "registering %s failed (err=%d)\n", in mpc5xxx_can_probe()
335 dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n", in mpc5xxx_can_probe()
336 priv->reg_base, dev->irq, priv->can.clock.freq); in mpc5xxx_can_probe()
341 if (data->put_clock) in mpc5xxx_can_probe()
342 data->put_clock(ofdev); in mpc5xxx_can_probe()
359 match = of_match_device(mpc5xxx_can_table, &ofdev->dev); in mpc5xxx_can_remove()
360 data = match ? match->data : NULL; in mpc5xxx_can_remove()
363 if (data && data->put_clock) in mpc5xxx_can_remove()
364 data->put_clock(ofdev); in mpc5xxx_can_remove()
365 iounmap(priv->reg_base); in mpc5xxx_can_remove()
366 irq_dispose_mapping(dev->irq); in mpc5xxx_can_remove()
376 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; in mpc5xxx_can_suspend()
387 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; in mpc5xxx_can_resume()
389 regs->canctl0 |= MSCAN_INITRQ; in mpc5xxx_can_resume()
390 while (!(regs->canctl1 & MSCAN_INITAK)) in mpc5xxx_can_resume()
393 regs->canctl1 = saved_regs.canctl1; in mpc5xxx_can_resume()
394 regs->canbtr0 = saved_regs.canbtr0; in mpc5xxx_can_resume()
395 regs->canbtr1 = saved_regs.canbtr1; in mpc5xxx_can_resume()
396 regs->canidac = saved_regs.canidac; in mpc5xxx_can_resume()
399 _memcpy_toio(®s->canidar1_0, (void *)&saved_regs.canidar1_0, in mpc5xxx_can_resume()
400 sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0)); in mpc5xxx_can_resume()
402 regs->canctl0 &= ~MSCAN_INITRQ; in mpc5xxx_can_resume()
403 regs->cantbsel = saved_regs.cantbsel; in mpc5xxx_can_resume()
404 regs->canrier = saved_regs.canrier; in mpc5xxx_can_resume()
405 regs->cantier = saved_regs.cantier; in mpc5xxx_can_resume()
406 regs->canctl0 = saved_regs.canctl0; in mpc5xxx_can_resume()
425 { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, },
427 { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, },