mmc/host/dw_mmc.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 #include <linux/fault-inject.h>
59  * struct dw_mci - MMC controller state shared between all slots
77  * @dma_64bit_address: Whether DMA supports 64-bit address mode or not.
80  * @dma_ops: Pointer to platform-specific DMA callbacks.
84  * @dms: structure of slave-dma private data.
107  * @drv_data: Driver specific data for identified variant of the controller
108  * @priv: Implementation defined private data.
122  * @quirks: Set of quirks that apply to specific versions of the IP.
134  * @lock is a softirq-safe spinlock protecting @queue as well as
141  * @irq_lock is an irq-safe spinlock protecting the INTMASK register
143  * enough to read-modify-write INTMASK and no other locks are grabbed when
151  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
283 /* Force 32-bit access to the FIFO */
333  * Registers to support idmac 64-bit address mode
370 /* time-out register defines */
375 /* card-type register defines */
454 /* UHS-1 register defines */
465 /* FIFO register access macros. These should not change the data endian-ness
477  * Some dw_mmc devices have 64-bit FIFOs, but expect them to be
478  * accessed using two 32-bit accesses. If such controller is used
479  * with a 64-bit kernel, this has to be done explicitly.
503 	readl_relaxed((dev)->regs + SDMMC_##reg)
505 	writel_relaxed((value), (dev)->regs + SDMMC_##reg)
507 /* 16-bit FIFO access macros */
509 	readw_relaxed((dev)->regs + SDMMC_##reg)
511 	writew_relaxed((value), (dev)->regs + SDMMC_##reg)
513 /* 64-bit FIFO access macros */
516 	readq_relaxed((dev)->regs + SDMMC_##reg)
518 	writeq_relaxed((value), (dev)->regs + SDMMC_##reg)
521  * Dummy readq implementation for architectures that don't define it.
529 	(*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
531 	(*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
546  * struct dw_mci_slot - MMC slot state
554  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
584  * dw_mci driver data - dw-mshc implementation specific driver data.
589  * @init: early implementation specific initialization.
590  * @set_ios: handle bus specific extensions.
591  * @parse_dt: parse implementation specific device tree properties.
592  * @execute_tuning: implementation specific tuning procedure.
593  * @set_data_timeout: implementation specific timeout.
594  * @get_drto_clks: implementation specific cycle count for data read timeout.
596  * Provide controller implementation specific extensions. The usage of this