Lines Matching full:host
31 #include <linux/mmc/host.h>
118 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
144 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
152 struct dw_mci *host = s->private; in dw_mci_regs_show() local
154 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
156 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
157 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
158 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
159 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
160 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
161 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
163 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
172 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
179 debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); in dw_mci_init_debugfs()
181 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
183 &host->pending_events); in dw_mci_init_debugfs()
185 &host->completed_events); in dw_mci_init_debugfs()
187 fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); in dw_mci_init_debugfs()
192 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
196 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
198 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
201 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
204 dev_err(host->dev, in dw_mci_ctrl_reset()
213 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
227 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
231 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
237 struct dw_mci *host = slot->host; in mci_send_cmd() local
240 mci_writel(host, CMDARG, arg); in mci_send_cmd()
242 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
243 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
245 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
256 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
278 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
279 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
292 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
294 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
321 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
329 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
354 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
360 static inline void dw_mci_set_cto(struct dw_mci *host) in dw_mci_set_cto() argument
367 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
368 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
373 host->bus_hz); in dw_mci_set_cto()
391 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
392 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
393 mod_timer(&host->cto_timer, in dw_mci_set_cto()
395 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
398 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
401 host->cmd = cmd; in dw_mci_start_command()
402 dev_vdbg(host->dev, in dw_mci_start_command()
406 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
408 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
410 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
414 dw_mci_set_cto(host); in dw_mci_start_command()
417 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
419 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
421 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
425 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
427 if (host->using_dma) { in dw_mci_stop_dma()
428 host->dma_ops->stop(host); in dw_mci_stop_dma()
429 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
433 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
436 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
438 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
441 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
449 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
451 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
454 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
457 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
462 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
465 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
468 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
471 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
476 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
477 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
479 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
481 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
484 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
489 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
496 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
497 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
501 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
505 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
508 host->ring_size = in dw_mci_idmac_init()
512 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
514 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
518 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
529 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
530 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
536 host->ring_size = in dw_mci_idmac_init()
540 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
541 i < host->ring_size - 1; in dw_mci_idmac_init()
543 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
550 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
554 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
556 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
558 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
559 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
563 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
564 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
568 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
569 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
573 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
579 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
588 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
644 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
645 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
646 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
651 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
660 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
718 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
719 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
720 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
724 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
729 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
730 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
732 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
741 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
742 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
745 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
747 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
753 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
755 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
758 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
772 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
774 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
777 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
782 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
784 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
786 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
791 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
797 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
801 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
806 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
808 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
812 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
816 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
822 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
826 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
827 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
830 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
835 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
838 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
839 if (!host->dms) in dw_mci_edmac_init()
842 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
843 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
844 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
846 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
847 kfree(host->dms); in dw_mci_edmac_init()
848 host->dms = NULL; in dw_mci_edmac_init()
855 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
857 if (host->dms) { in dw_mci_edmac_exit()
858 if (host->dms->ch) { in dw_mci_edmac_exit()
859 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
860 host->dms->ch = NULL; in dw_mci_edmac_exit()
862 kfree(host->dms); in dw_mci_edmac_exit()
863 host->dms = NULL; in dw_mci_edmac_exit()
876 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
902 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
920 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
926 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
938 if (!slot->host->use_dma || !data) in dw_mci_post_req()
942 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
953 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
976 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
979 spin_lock_bh(&host->lock); in dw_mci_get_cd()
985 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
990 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
994 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
1000 if (!host->use_dma) in dw_mci_adjust_fifoth()
1003 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
1004 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1027 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1030 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
1041 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1042 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1050 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1058 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1059 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1060 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1063 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1064 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1075 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1079 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1082 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1088 host->using_dma = 0; in dw_mci_submit_data_dma()
1091 if (!host->use_dma) in dw_mci_submit_data_dma()
1094 sg_len = dw_mci_pre_dma_transfer(host, data, COOKIE_MAPPED); in dw_mci_submit_data_dma()
1096 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1100 host->using_dma = 1; in dw_mci_submit_data_dma()
1102 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1103 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1105 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1106 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1114 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1115 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1118 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1120 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1123 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1124 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1126 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1127 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1129 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1130 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1132 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1141 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1149 WARN_ON(host->data); in dw_mci_submit_data()
1150 host->sg = NULL; in dw_mci_submit_data()
1151 host->data = data; in dw_mci_submit_data()
1154 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1156 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1158 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1160 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1161 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1166 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1167 host->sg = data->sg; in dw_mci_submit_data()
1168 host->part_buf_start = 0; in dw_mci_submit_data()
1169 host->part_buf_count = 0; in dw_mci_submit_data()
1171 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1173 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1174 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1176 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1177 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1179 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1181 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1189 if (host->wm_aligned) in dw_mci_submit_data()
1190 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data()
1192 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1193 host->prev_blksz = 0; in dw_mci_submit_data()
1200 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1206 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1213 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1219 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1221 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1222 div = host->bus_hz / clock; in dw_mci_setup_bus()
1223 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1230 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1239 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1240 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1241 host->bus_hz, div); in dw_mci_setup_bus()
1253 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1254 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1260 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1269 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1276 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1277 host->bus_hz; in dw_mci_setup_bus()
1280 host->current_speed = clock; in dw_mci_setup_bus()
1283 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1286 static void dw_mci_set_data_timeout(struct dw_mci *host, in dw_mci_set_data_timeout() argument
1289 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_data_timeout()
1294 return drv_data->set_data_timeout(host, timeout_ns); in dw_mci_set_data_timeout()
1296 clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; in dw_mci_set_data_timeout()
1300 tmp = DIV_ROUND_UP_ULL((u64)timeout_ns * host->bus_hz, NSEC_PER_SEC); in dw_mci_set_data_timeout()
1312 mci_writel(host, TMOUT, tmout); in dw_mci_set_data_timeout()
1313 dev_dbg(host->dev, "timeout_ns: %u => TMOUT[31:8]: %#08x", in dw_mci_set_data_timeout()
1317 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1327 host->mrq = mrq; in __dw_mci_start_request()
1329 host->pending_events = 0; in __dw_mci_start_request()
1330 host->completed_events = 0; in __dw_mci_start_request()
1331 host->cmd_status = 0; in __dw_mci_start_request()
1332 host->data_status = 0; in __dw_mci_start_request()
1333 host->dir_status = 0; in __dw_mci_start_request()
1337 dw_mci_set_data_timeout(host, data->timeout_ns); in __dw_mci_start_request()
1338 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1339 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1349 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1353 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1368 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1369 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1370 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1372 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1375 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1378 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1385 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1388 /* must be called with host->lock held */
1389 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1393 host->state); in dw_mci_queue_request()
1397 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1405 host->state = STATE_IDLE; in dw_mci_queue_request()
1408 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1409 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1410 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1412 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1419 struct dw_mci *host = slot->host; in dw_mci_request() local
1435 spin_lock_bh(&host->lock); in dw_mci_request()
1437 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1439 spin_unlock_bh(&host->lock); in dw_mci_request()
1445 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1461 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1471 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1472 slot->host->timing = ios->timing; in dw_mci_set_ios()
1481 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1489 dev_err(slot->host->dev, in dw_mci_set_ios()
1496 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1498 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1501 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1505 dev_err(slot->host->dev, in dw_mci_set_ios()
1508 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1512 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1516 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1531 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1533 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1535 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1537 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1543 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1544 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1556 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1564 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1565 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1578 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1593 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1609 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1620 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1623 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1624 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1626 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1636 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1638 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1641 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1647 struct dw_mci *host = slot->host; in dw_mci_prepare_sdio_irq() local
1658 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_prepare_sdio_irq()
1668 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_sdio_irq()
1676 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq() local
1680 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1683 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1688 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1690 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1696 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1703 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1705 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1718 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1719 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1731 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1732 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1735 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1740 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
1750 if (host->sg) { in dw_mci_reset()
1751 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1752 host->sg = NULL; in dw_mci_reset()
1755 if (host->use_dma) in dw_mci_reset()
1758 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
1763 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
1765 if (!host->use_dma) { in dw_mci_reset()
1771 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1775 dev_err(host->dev, in dw_mci_reset()
1782 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
1786 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1787 dev_err(host->dev, in dw_mci_reset()
1794 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1796 dw_mci_idmac_init(host); in dw_mci_reset()
1802 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1826 struct dw_mci *host = container_of(t, struct dw_mci, fault_timer); in dw_mci_fault_timer() local
1829 spin_lock_irqsave(&host->irq_lock, flags); in dw_mci_fault_timer()
1835 if (!host->data_status) { in dw_mci_fault_timer()
1836 host->data_status = SDMMC_INT_DCRC; in dw_mci_fault_timer()
1837 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_fault_timer()
1838 tasklet_schedule(&host->tasklet); in dw_mci_fault_timer()
1841 spin_unlock_irqrestore(&host->irq_lock, flags); in dw_mci_fault_timer()
1846 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1848 struct mmc_data *data = host->data; in dw_mci_start_fault_timer()
1853 if (!should_fail(&host->fail_data_crc, 1)) in dw_mci_start_fault_timer()
1859 hrtimer_start(&host->fault_timer, in dw_mci_start_fault_timer()
1864 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1866 hrtimer_cancel(&host->fault_timer); in dw_mci_stop_fault_timer()
1869 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1871 host->fail_data_crc = (struct fault_attr) FAULT_ATTR_INITIALIZER; in dw_mci_init_fault()
1873 hrtimer_init(&host->fault_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in dw_mci_init_fault()
1874 host->fault_timer.function = dw_mci_fault_timer; in dw_mci_init_fault()
1877 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1881 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1885 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1890 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1891 __releases(&host->lock) in dw_mci_request_end()
1892 __acquires(&host->lock) in dw_mci_request_end()
1895 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1897 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1899 host->slot->mrq = NULL; in dw_mci_request_end()
1900 host->mrq = NULL; in dw_mci_request_end()
1901 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1902 slot = list_entry(host->queue.next, in dw_mci_request_end()
1905 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1907 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1908 dw_mci_start_request(host, slot); in dw_mci_request_end()
1910 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1912 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1913 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1915 host->state = STATE_IDLE; in dw_mci_request_end()
1918 spin_unlock(&host->lock); in dw_mci_request_end()
1920 spin_lock(&host->lock); in dw_mci_request_end()
1923 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1925 u32 status = host->cmd_status; in dw_mci_command_complete()
1927 host->cmd_status = 0; in dw_mci_command_complete()
1932 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1933 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1934 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1935 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1937 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1956 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1958 u32 status = host->data_status; in dw_mci_data_complete()
1966 if (host->dir_status == in dw_mci_data_complete()
1975 } else if (host->dir_status == in dw_mci_data_complete()
1984 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1990 dw_mci_reset(host); in dw_mci_data_complete()
1999 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
2001 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_drto()
2008 drto_clks = drv_data->get_drto_clks(host); in dw_mci_set_drto()
2010 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
2011 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
2016 host->bus_hz); in dw_mci_set_drto()
2018 dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); in dw_mci_set_drto()
2023 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
2024 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
2025 mod_timer(&host->dto_timer, in dw_mci_set_drto()
2027 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
2030 static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host) in dw_mci_clear_pending_cmd_complete() argument
2032 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
2042 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
2043 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
2048 static bool dw_mci_clear_pending_data_complete(struct dw_mci *host) in dw_mci_clear_pending_data_complete() argument
2050 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
2054 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
2055 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
2062 struct dw_mci *host = from_tasklet(host, t, tasklet); in dw_mci_tasklet_func() local
2070 spin_lock(&host->lock); in dw_mci_tasklet_func()
2072 state = host->state; in dw_mci_tasklet_func()
2073 data = host->data; in dw_mci_tasklet_func()
2074 mrq = host->mrq; in dw_mci_tasklet_func()
2086 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
2089 cmd = host->cmd; in dw_mci_tasklet_func()
2090 host->cmd = NULL; in dw_mci_tasklet_func()
2091 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2092 err = dw_mci_command_complete(host, cmd); in dw_mci_tasklet_func()
2094 __dw_mci_start_request(host, host->slot, in dw_mci_tasklet_func()
2122 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_tasklet_func()
2127 send_stop_abort(host, data); in dw_mci_tasklet_func()
2128 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2134 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2151 &host->pending_events)) { in dw_mci_tasklet_func()
2152 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2154 send_stop_abort(host, data); in dw_mci_tasklet_func()
2155 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2161 &host->pending_events)) { in dw_mci_tasklet_func()
2166 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2167 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2171 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2187 &host->pending_events)) { in dw_mci_tasklet_func()
2188 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2190 send_stop_abort(host, data); in dw_mci_tasklet_func()
2191 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2200 if (!dw_mci_clear_pending_data_complete(host)) { in dw_mci_tasklet_func()
2206 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2207 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2211 dw_mci_stop_fault_timer(host); in dw_mci_tasklet_func()
2212 host->data = NULL; in dw_mci_tasklet_func()
2213 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2214 err = dw_mci_data_complete(host, data); in dw_mci_tasklet_func()
2220 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2226 send_stop_abort(host, data); in dw_mci_tasklet_func()
2238 &host->pending_events)) { in dw_mci_tasklet_func()
2239 host->cmd = NULL; in dw_mci_tasklet_func()
2240 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2254 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
2259 dw_mci_reset(host); in dw_mci_tasklet_func()
2261 dw_mci_stop_fault_timer(host); in dw_mci_tasklet_func()
2262 host->cmd = NULL; in dw_mci_tasklet_func()
2263 host->data = NULL; in dw_mci_tasklet_func()
2266 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2268 host->cmd_status = 0; in dw_mci_tasklet_func()
2270 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2275 &host->pending_events)) in dw_mci_tasklet_func()
2283 host->state = state; in dw_mci_tasklet_func()
2285 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2290 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2292 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2293 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2297 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2299 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2300 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2301 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2306 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2308 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2310 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2312 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2313 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2319 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2321 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2322 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2323 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2326 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2328 struct mmc_data *data = host->data; in dw_mci_push_data16()
2332 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2333 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2337 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2338 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2339 host->part_buf_count = 0; in dw_mci_push_data16()
2355 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2363 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2368 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2372 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2376 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2388 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2400 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2404 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2405 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2409 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2411 struct mmc_data *data = host->data; in dw_mci_push_data32()
2415 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2416 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2420 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2421 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2422 host->part_buf_count = 0; in dw_mci_push_data32()
2438 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2446 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2451 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2455 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2459 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2471 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2483 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2487 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2488 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2492 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2494 struct mmc_data *data = host->data; in dw_mci_push_data64()
2498 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2499 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2504 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2505 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2506 host->part_buf_count = 0; in dw_mci_push_data64()
2522 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2530 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2535 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2539 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2543 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2555 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2568 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2572 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2573 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2577 static void dw_mci_push_data64_32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64_32() argument
2579 struct mmc_data *data = host->data; in dw_mci_push_data64_32()
2583 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64_32()
2584 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64_32()
2589 if (host->part_buf_count == 8) { in dw_mci_push_data64_32()
2590 mci_fifo_l_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64_32()
2591 host->part_buf_count = 0; in dw_mci_push_data64_32()
2607 mci_fifo_l_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64_32()
2615 mci_fifo_l_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64_32()
2620 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64_32()
2624 mci_fifo_l_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64_32()
2628 static void dw_mci_pull_data64_32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64_32() argument
2640 aligned_buf[i] = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2653 *pdata++ = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2657 host->part_buf = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2658 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64_32()
2662 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2667 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2674 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2677 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2679 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2682 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2683 int shift = host->data_shift; in dw_mci_read_data_pio()
2692 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2698 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2699 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2703 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2710 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2711 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2714 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2726 host->sg = NULL; in dw_mci_read_data_pio()
2728 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2731 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2733 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2736 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2737 int shift = host->data_shift; in dw_mci_write_data_pio()
2740 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2747 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2754 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2755 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2759 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2766 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2767 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2780 host->sg = NULL; in dw_mci_write_data_pio()
2782 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2785 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2787 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2789 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2790 host->cmd_status = status; in dw_mci_cmd_interrupt()
2794 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2795 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2797 dw_mci_start_fault_timer(host); in dw_mci_cmd_interrupt()
2800 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2802 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2805 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2810 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2812 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2814 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2818 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2820 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2827 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2828 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2829 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2831 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2835 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2837 del_timer(&host->cto_timer); in dw_mci_interrupt()
2838 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2839 host->cmd_status = pending; in dw_mci_interrupt()
2841 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2843 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2847 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2849 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2850 del_timer(&host->dto_timer); in dw_mci_interrupt()
2853 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2854 host->data_status = pending; in dw_mci_interrupt()
2856 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2858 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2861 &host->pending_events); in dw_mci_interrupt()
2863 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2865 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2869 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2871 del_timer(&host->dto_timer); in dw_mci_interrupt()
2873 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2874 if (!host->data_status) in dw_mci_interrupt()
2875 host->data_status = pending; in dw_mci_interrupt()
2877 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2878 if (host->sg != NULL) in dw_mci_interrupt()
2879 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2881 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2882 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2884 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2888 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2889 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2890 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2894 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2895 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2896 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2900 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2902 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2903 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2905 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2909 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2910 dw_mci_handle_cd(host); in dw_mci_interrupt()
2914 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2922 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2926 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2927 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2929 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2931 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2932 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2933 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2936 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2938 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2940 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2941 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2942 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2951 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps() local
2952 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2956 if (host->pdata->caps) in dw_mci_init_slot_caps()
2957 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2959 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2960 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2965 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2966 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2970 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2975 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2982 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2983 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2985 /* if host has set a minimum_freq, we should respect it */ in dw_mci_init_slot_caps()
2986 if (host->minimum_speed) in dw_mci_init_slot_caps()
2987 mmc->f_min = host->minimum_speed; in dw_mci_init_slot_caps()
3001 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot() argument
3007 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
3013 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
3015 slot->host = host; in dw_mci_init_slot()
3016 host->slot = slot; in dw_mci_init_slot()
3037 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
3038 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
3041 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
3043 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
3081 slot->host->slot = NULL; in dw_mci_cleanup_slot()
3085 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
3088 struct device *dev = host->dev; in dw_mci_init_dma()
3101 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
3102 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
3103 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
3104 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
3105 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
3106 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
3112 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
3117 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
3120 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
3121 host->dma_64bit_address = 1; in dw_mci_init_dma()
3122 dev_info(host->dev, in dw_mci_init_dma()
3124 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
3125 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
3128 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
3129 host->dma_64bit_address = 0; in dw_mci_init_dma()
3130 dev_info(host->dev, in dw_mci_init_dma()
3135 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
3137 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
3138 if (!host->sg_cpu) { in dw_mci_init_dma()
3139 dev_err(host->dev, in dw_mci_init_dma()
3145 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
3146 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
3153 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
3154 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
3157 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
3158 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
3159 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
3160 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
3165 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
3172 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
3173 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
3178 struct dw_mci *host = from_timer(host, t, cmd11_timer); in dw_mci_cmd11_timer() local
3180 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
3181 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
3185 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
3186 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
3187 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
3192 struct dw_mci *host = from_timer(host, t, cto_timer); in dw_mci_cto_timer() local
3196 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3206 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3209 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3212 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3214 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3222 switch (host->state) { in dw_mci_cto_timer()
3231 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3232 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3233 tasklet_schedule(&host->tasklet); in dw_mci_cto_timer()
3236 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3237 host->state); in dw_mci_cto_timer()
3242 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3247 struct dw_mci *host = from_timer(host, t, dto_timer); in dw_mci_dto_timer() local
3251 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3257 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3260 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3263 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3265 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3273 switch (host->state) { in dw_mci_dto_timer()
3281 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3282 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3283 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3284 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
3287 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3288 host->state); in dw_mci_dto_timer()
3293 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3297 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3300 struct device *dev = host->dev; in dw_mci_parse_dt()
3301 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3321 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3324 host->wm_aligned = true; in dw_mci_parse_dt()
3330 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3339 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3345 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
3354 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3357 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3358 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3359 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3361 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3362 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3366 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3368 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3372 if (!host->pdata) { in dw_mci_probe()
3373 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3374 if (IS_ERR(host->pdata)) in dw_mci_probe()
3375 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3379 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3380 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3381 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3382 ret = PTR_ERR(host->biu_clk); in dw_mci_probe()
3387 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3389 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3394 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3395 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3396 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3397 ret = PTR_ERR(host->ciu_clk); in dw_mci_probe()
3401 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3403 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3405 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3409 if (host->pdata->bus_hz) { in dw_mci_probe()
3410 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3412 dev_warn(host->dev, in dw_mci_probe()
3414 host->pdata->bus_hz); in dw_mci_probe()
3416 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3419 if (!host->bus_hz) { in dw_mci_probe()
3420 dev_err(host->dev, in dw_mci_probe()
3426 if (host->pdata->rstc) { in dw_mci_probe()
3427 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3429 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3433 ret = drv_data->init(host); in dw_mci_probe()
3435 dev_err(host->dev, in dw_mci_probe()
3441 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3442 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3443 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3445 spin_lock_init(&host->lock); in dw_mci_probe()
3446 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3447 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3449 dw_mci_init_fault(host); in dw_mci_probe()
3452 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3455 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3457 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3458 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3460 host->data_shift = 1; in dw_mci_probe()
3462 if ((host->quirks & DW_MMC_QUIRK_FIFO64_32)) { in dw_mci_probe()
3463 host->push_data = dw_mci_push_data64_32; in dw_mci_probe()
3464 host->pull_data = dw_mci_pull_data64_32; in dw_mci_probe()
3466 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3467 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3470 host->data_shift = 3; in dw_mci_probe()
3474 "HCON reports a reserved host data width!\n" in dw_mci_probe()
3476 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3477 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3479 host->data_shift = 2; in dw_mci_probe()
3483 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3488 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3489 dw_mci_init_dma(host); in dw_mci_probe()
3491 /* Clear the interrupts for the host controller */ in dw_mci_probe()
3492 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3493 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3496 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3502 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3509 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3512 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3514 host->fifo_depth = fifo_size; in dw_mci_probe()
3515 host->fifoth_val = in dw_mci_probe()
3517 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3520 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3521 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3527 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3528 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3530 if (host->data_addr_override) in dw_mci_probe()
3531 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3532 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3533 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3535 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3537 tasklet_setup(&host->tasklet, dw_mci_tasklet_func); in dw_mci_probe()
3538 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3539 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3547 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3551 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3553 dev_info(host->dev, in dw_mci_probe()
3554 "DW MMC controller at irq %d,%d bit host data width,%u deep fifo\n", in dw_mci_probe()
3555 host->irq, width, fifo_size); in dw_mci_probe()
3558 ret = dw_mci_init_slot(host); in dw_mci_probe()
3560 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3565 dw_mci_enable_cd(host); in dw_mci_probe()
3570 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3571 host->dma_ops->exit(host); in dw_mci_probe()
3573 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3576 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3579 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3585 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3587 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3588 if (host->slot) in dw_mci_remove()
3589 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3591 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3592 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3595 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3596 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3598 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3599 host->dma_ops->exit(host); in dw_mci_remove()
3601 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3603 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3604 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3613 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_suspend() local
3615 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3616 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3618 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3620 if (host->slot && in dw_mci_runtime_suspend()
3621 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3622 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3623 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3632 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_resume() local
3634 if (host->slot && in dw_mci_runtime_resume()
3635 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3636 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3637 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3642 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3646 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_runtime_resume()
3647 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3652 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3653 host->dma_ops->init(host); in dw_mci_runtime_resume()
3659 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3660 host->prev_blksz = 0; in dw_mci_runtime_resume()
3663 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3665 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3666 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3669 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()
3672 if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3673 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3676 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3679 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3680 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3683 dw_mci_enable_cd(host); in dw_mci_runtime_resume()
3688 if (host->slot && in dw_mci_runtime_resume()
3689 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3690 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3691 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()