1 // SPDX-License-Identifier: GPL-2.0
22 	MT6357_TOP_GEN(BUCK),
33 	MT6358_TOP_GEN(BUCK),
44 	MT6359_TOP_GEN(BUCK),
79 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_enable()
81 	irqd->enable_hwirq[hwirq] = true;  in pmic_irq_enable()
88 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_disable()
90 	irqd->enable_hwirq[hwirq] = false;  in pmic_irq_disable()
97 	mutex_lock(&chip->irqlock);  in pmic_irq_lock()
104 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_sync_unlock()
106 	for (i = 0; i < irqd->num_pmic_irqs; i++) {  in pmic_irq_sync_unlock()
107 		if (irqd->enable_hwirq[i] == irqd->cache_hwirq[i])  in pmic_irq_sync_unlock()
112 		while ((top_gp + 1) < irqd->num_top &&  in pmic_irq_sync_unlock()
113 		       i >= irqd->pmic_ints[top_gp + 1].hwirq_base)  in pmic_irq_sync_unlock()
117 		gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;  in pmic_irq_sync_unlock()
120 		en_reg = irqd->pmic_ints[top_gp].en_reg +  in pmic_irq_sync_unlock()
121 			 (irqd->pmic_ints[top_gp].en_reg_shift * int_regs);  in pmic_irq_sync_unlock()
123 		regmap_update_bits(chip->regmap, en_reg, BIT(shift),  in pmic_irq_sync_unlock()
124 				   irqd->enable_hwirq[i] << shift);  in pmic_irq_sync_unlock()
126 		irqd->cache_hwirq[i] = irqd->enable_hwirq[i];  in pmic_irq_sync_unlock()
128 	mutex_unlock(&chip->irqlock);  in pmic_irq_sync_unlock()
132 	.name = "mt6358-irq",
146 	struct pmic_irq_data *irqd = chip->irq_data;  in mt6358_irq_sp_handler()
148 	for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {  in mt6358_irq_sp_handler()
149 		sta_reg = irqd->pmic_ints[top_gp].sta_reg +  in mt6358_irq_sp_handler()
150 			irqd->pmic_ints[top_gp].sta_reg_shift * i;  in mt6358_irq_sp_handler()
152 		ret = regmap_read(chip->regmap, sta_reg, &irq_status);  in mt6358_irq_sp_handler()
154 			dev_err(chip->dev,  in mt6358_irq_sp_handler()
155 				"Failed to read IRQ status, ret=%d\n", ret);  in mt6358_irq_sp_handler()
166 			hwirq = irqd->pmic_ints[top_gp].hwirq_base +  in mt6358_irq_sp_handler()
169 			virq = irq_find_mapping(chip->irq_domain, hwirq);  in mt6358_irq_sp_handler()
176 		regmap_write(chip->regmap, sta_reg, irq_status);  in mt6358_irq_sp_handler()
183 	struct pmic_irq_data *irqd = chip->irq_data;  in mt6358_irq_handler()
187 	ret = regmap_read(chip->regmap,  in mt6358_irq_handler()
188 			  irqd->top_int_status_reg,  in mt6358_irq_handler()
191 		dev_err(chip->dev,  in mt6358_irq_handler()
192 			"Failed to read status from the device, ret=%d\n", ret);  in mt6358_irq_handler()
196 	for (i = 0; i < irqd->num_top; i++) {  in mt6358_irq_handler()
197 		bit = BIT(irqd->pmic_ints[i].top_offset);  in mt6358_irq_handler()
209 static int pmic_irq_domain_map(struct irq_domain *d, unsigned int irq,  in pmic_irq_domain_map()  argument
212 	struct mt6397_chip *mt6397 = d->host_data;  in pmic_irq_domain_map()
232 	switch (chip->chip_id) {  in mt6358_irq_init()
234 		chip->irq_data = &mt6357_irqd;  in mt6358_irq_init()
239 		chip->irq_data = &mt6358_irqd;  in mt6358_irq_init()
243 		chip->irq_data = &mt6359_irqd;  in mt6358_irq_init()
247 		dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);  in mt6358_irq_init()
248 		return -ENODEV;  in mt6358_irq_init()
251 	mutex_init(&chip->irqlock);  in mt6358_irq_init()
252 	irqd = chip->irq_data;  in mt6358_irq_init()
253 	irqd->enable_hwirq = devm_kcalloc(chip->dev,  in mt6358_irq_init()
254 					  irqd->num_pmic_irqs,  in mt6358_irq_init()
255 					  sizeof(*irqd->enable_hwirq),  in mt6358_irq_init()
257 	if (!irqd->enable_hwirq)  in mt6358_irq_init()
258 		return -ENOMEM;  in mt6358_irq_init()
260 	irqd->cache_hwirq = devm_kcalloc(chip->dev,  in mt6358_irq_init()
261 					 irqd->num_pmic_irqs,  in mt6358_irq_init()
262 					 sizeof(*irqd->cache_hwirq),  in mt6358_irq_init()
264 	if (!irqd->cache_hwirq)  in mt6358_irq_init()
265 		return -ENOMEM;  in mt6358_irq_init()
268 	for (i = 0; i < irqd->num_top; i++) {  in mt6358_irq_init()
269 		for (j = 0; j < irqd->pmic_ints[i].num_int_regs; j++)  in mt6358_irq_init()
270 			regmap_write(chip->regmap,  in mt6358_irq_init()
271 				     irqd->pmic_ints[i].en_reg +  in mt6358_irq_init()
272 				     irqd->pmic_ints[i].en_reg_shift * j, 0);  in mt6358_irq_init()
275 	chip->irq_domain = irq_domain_add_linear(chip->dev->of_node,  in mt6358_irq_init()
276 						 irqd->num_pmic_irqs,  in mt6358_irq_init()
278 	if (!chip->irq_domain) {  in mt6358_irq_init()
279 		dev_err(chip->dev, "Could not create IRQ domain\n");  in mt6358_irq_init()
280 		return -ENODEV;  in mt6358_irq_init()
283 	ret = devm_request_threaded_irq(chip->dev, chip->irq, NULL,  in mt6358_irq_init()
287 		dev_err(chip->dev, "Failed to register IRQ=%d, ret=%d\n",  in mt6358_irq_init()
288 			chip->irq, ret);  in mt6358_irq_init()
292 	enable_irq_wake(chip->irq);  in mt6358_irq_init()