1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2017-2021 NVIDIA CORPORATION.  All rights reserved.
14 #include <soc/tegra/mc.h>
17 #include <dt-bindings/memory/tegra186-mc.h>
20 #include "mc.h"
26 static int tegra186_mc_probe(struct tegra_mc *mc)  in tegra186_mc_probe()  argument
28 	struct platform_device *pdev = to_platform_device(mc->dev);  in tegra186_mc_probe()
33 	mc->bcast_ch_regs = devm_platform_ioremap_resource_byname(pdev, "broadcast");  in tegra186_mc_probe()
34 	if (IS_ERR(mc->bcast_ch_regs)) {  in tegra186_mc_probe()
35 		if (PTR_ERR(mc->bcast_ch_regs) == -EINVAL) {  in tegra186_mc_probe()
36 			dev_warn(&pdev->dev,  in tegra186_mc_probe()
37 				 "Broadcast channel is missing, please update your device-tree\n");  in tegra186_mc_probe()
38 			mc->bcast_ch_regs = NULL;  in tegra186_mc_probe()
42 		return PTR_ERR(mc->bcast_ch_regs);  in tegra186_mc_probe()
45 	mc->ch_regs = devm_kcalloc(mc->dev, mc->soc->num_channels, sizeof(*mc->ch_regs),  in tegra186_mc_probe()
47 	if (!mc->ch_regs)  in tegra186_mc_probe()
48 		return -ENOMEM;  in tegra186_mc_probe()
50 	for (i = 0; i < mc->soc->num_channels; i++) {  in tegra186_mc_probe()
53 		mc->ch_regs[i] = devm_platform_ioremap_resource_byname(pdev, name);  in tegra186_mc_probe()
54 		if (IS_ERR(mc->ch_regs[i]))  in tegra186_mc_probe()
55 			return PTR_ERR(mc->ch_regs[i]);  in tegra186_mc_probe()
59 	err = of_platform_populate(mc->dev->of_node, NULL, NULL, mc->dev);  in tegra186_mc_probe()
66 static void tegra186_mc_remove(struct tegra_mc *mc)  in tegra186_mc_remove()  argument
68 	of_platform_depopulate(mc->dev);  in tegra186_mc_remove()
72 static void tegra186_mc_client_sid_override(struct tegra_mc *mc,  in tegra186_mc_client_sid_override()  argument
74 					    unsigned int sid)  in tegra186_mc_client_sid_override()  argument
78 	if (client->regs.sid.security == 0 && client->regs.sid.override == 0)  in tegra186_mc_client_sid_override()
81 	value = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
100 		writel(value, mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
103 	value = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
106 	if (old != sid) {  in tegra186_mc_client_sid_override()
107 		dev_dbg(mc->dev, "overriding SID %x for %s with %x\n", old,  in tegra186_mc_client_sid_override()
108 			client->name, sid);  in tegra186_mc_client_sid_override()
109 		writel(sid, mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
114 static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *dev)  in tegra186_mc_probe_device()  argument
121 	while (!of_parse_phandle_with_args(dev->of_node, "interconnects", "#interconnect-cells",  in tegra186_mc_probe_device()
123 		if (args.np == mc->dev->of_node && args.args_count != 0) {  in tegra186_mc_probe_device()
124 			for (i = 0; i < mc->soc->num_clients; i++) {  in tegra186_mc_probe_device()
125 				const struct tegra_mc_client *client = &mc->soc->clients[i];  in tegra186_mc_probe_device()
127 				if (client->id == args.args[0]) {  in tegra186_mc_probe_device()
128 					u32 sid = fwspec->ids[0] & MC_SID_STREAMID_OVERRIDE_MASK;  in tegra186_mc_probe_device()  local
130 					tegra186_mc_client_sid_override(mc, client, sid);  in tegra186_mc_probe_device()
154 		.sid = TEGRA186_SID_PASSTHROUGH,
156 			.sid = {
164 		.sid = TEGRA186_SID_AFI,
166 			.sid = {
174 		.sid = TEGRA186_SID_HDA,
176 			.sid = {
184 		.sid = TEGRA186_SID_HOST1X,
186 			.sid = {
194 		.sid = TEGRA186_SID_NVENC,
196 			.sid = {
204 		.sid = TEGRA186_SID_SATA,
206 			.sid = {
214 		.sid = TEGRA186_SID_PASSTHROUGH,
216 			.sid = {
224 		.sid = TEGRA186_SID_NVENC,
226 			.sid = {
234 		.sid = TEGRA186_SID_AFI,
236 			.sid = {
244 		.sid = TEGRA186_SID_HDA,
246 			.sid = {
254 		.sid = TEGRA186_SID_PASSTHROUGH,
256 			.sid = {
264 		.sid = TEGRA186_SID_SATA,
266 			.sid = {
274 		.sid = TEGRA186_SID_ISP,
276 			.sid = {
284 		.sid = TEGRA186_SID_ISP,
286 			.sid = {
294 		.sid = TEGRA186_SID_ISP,
296 			.sid = {
304 		.sid = TEGRA186_SID_XUSB_HOST,
306 			.sid = {
314 		.sid = TEGRA186_SID_XUSB_HOST,
316 			.sid = {
324 		.sid = TEGRA186_SID_XUSB_DEV,
326 			.sid = {
334 		.sid = TEGRA186_SID_XUSB_DEV,
336 			.sid = {
344 		.sid = TEGRA186_SID_TSEC,
346 			.sid = {
354 		.sid = TEGRA186_SID_TSEC,
356 			.sid = {
364 		.sid = TEGRA186_SID_GPU,
366 			.sid = {
374 		.sid = TEGRA186_SID_GPU,
376 			.sid = {
384 		.sid = TEGRA186_SID_SDMMC1,
386 			.sid = {
394 		.sid = TEGRA186_SID_SDMMC2,
396 			.sid = {
404 		.sid = TEGRA186_SID_SDMMC3,
406 			.sid = {
414 		.sid = TEGRA186_SID_SDMMC4,
416 			.sid = {
424 		.sid = TEGRA186_SID_SDMMC1,
426 			.sid = {
434 		.sid = TEGRA186_SID_SDMMC2,
436 			.sid = {
444 		.sid = TEGRA186_SID_SDMMC3,
446 			.sid = {
454 		.sid = TEGRA186_SID_SDMMC4,
456 			.sid = {
464 		.sid = TEGRA186_SID_VIC,
466 			.sid = {
474 		.sid = TEGRA186_SID_VIC,
476 			.sid = {
484 		.sid = TEGRA186_SID_VI,
486 			.sid = {
494 		.sid = TEGRA186_SID_NVDEC,
496 			.sid = {
504 		.sid = TEGRA186_SID_NVDEC,
506 			.sid = {
514 		.sid = TEGRA186_SID_APE,
516 			.sid = {
524 		.sid = TEGRA186_SID_APE,
526 			.sid = {
534 		.sid = TEGRA186_SID_NVJPG,
536 			.sid = {
544 		.sid = TEGRA186_SID_NVJPG,
546 			.sid = {
554 		.sid = TEGRA186_SID_SE,
556 			.sid = {
564 		.sid = TEGRA186_SID_SE,
566 			.sid = {
574 		.sid = TEGRA186_SID_ETR,
576 			.sid = {
584 		.sid = TEGRA186_SID_ETR,
586 			.sid = {
594 		.sid = TEGRA186_SID_TSECB,
596 			.sid = {
604 		.sid = TEGRA186_SID_TSECB,
606 			.sid = {
614 		.sid = TEGRA186_SID_GPU,
616 			.sid = {
624 		.sid = TEGRA186_SID_GPU,
626 			.sid = {
634 		.sid = TEGRA186_SID_GPCDMA_0,
636 			.sid = {
644 		.sid = TEGRA186_SID_GPCDMA_0,
646 			.sid = {
654 		.sid = TEGRA186_SID_EQOS,
656 			.sid = {
664 		.sid = TEGRA186_SID_EQOS,
666 			.sid = {
674 		.sid = TEGRA186_SID_UFSHC,
676 			.sid = {
684 		.sid = TEGRA186_SID_UFSHC,
686 			.sid = {
694 		.sid = TEGRA186_SID_NVDISPLAY,
696 			.sid = {
704 		.sid = TEGRA186_SID_BPMP,
706 			.sid = {
714 		.sid = TEGRA186_SID_BPMP,
716 			.sid = {
724 		.sid = TEGRA186_SID_BPMP,
726 			.sid = {
734 		.sid = TEGRA186_SID_BPMP,
736 			.sid = {
744 		.sid = TEGRA186_SID_AON,
746 			.sid = {
754 		.sid = TEGRA186_SID_AON,
756 			.sid = {
764 		.sid = TEGRA186_SID_AON,
766 			.sid = {
774 		.sid = TEGRA186_SID_AON,
776 			.sid = {
784 		.sid = TEGRA186_SID_SCE,
786 			.sid = {
794 		.sid = TEGRA186_SID_SCE,
796 			.sid = {
804 		.sid = TEGRA186_SID_SCE,
806 			.sid = {
814 		.sid = TEGRA186_SID_SCE,
816 			.sid = {
824 		.sid = TEGRA186_SID_APE,
826 			.sid = {
834 		.sid = TEGRA186_SID_APE,
836 			.sid = {
844 		.sid = TEGRA186_SID_NVDISPLAY,
846 			.sid = {
854 		.sid = TEGRA186_SID_VIC,
856 			.sid = {
864 		.sid = TEGRA186_SID_NVDEC,
866 			.sid = {