Lines Matching +full:cs +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
32 #include <linux/omap-gpmc.h>
36 #include <linux/platform_data/mtd-nand-omap2.h>
38 #define DEVICE_NAME "omap-gpmc"
80 #define GPMC_CONFIG_LIMITEDADDRESS BIT(1)
96 * The first 1MB of GPMC address space is typically mapped to
138 #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
139 #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
141 #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29)
142 #define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28)
144 #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27)
151 #define GPMC_CONFIG1_WAIT_READ_MON (1 << 22)
152 #define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21)
158 #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
160 #define GPMC_CONFIG1_DEVICESIZE_MAX 1
164 #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
166 #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1))
169 #define GPMC_CONFIG7_CSVALID (1 << 6)
187 #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */
200 #define GPMC_CS_RESERVED (1 << 0)
206 /* Structure to save gpmc cs context */
248 unsigned int is_suspended:1;
257 /* Define chip-selects as reserved by default until probe completes */
277 void gpmc_cs_write_reg(int cs, int idx, u32 val) in gpmc_cs_write_reg() argument
281 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_reg()
285 static u32 gpmc_cs_read_reg(int cs, int idx) in gpmc_cs_read_reg() argument
289 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_read_reg()
305 * gpmc_get_clk_period - get period of selected clock domain in ps
306 * @cs: Chip Select Region.
309 * GPMC_CS_CONFIG1 GPMCFCLKDIVIDER for cs has to be setup
312 static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) in gpmc_get_clk_period() argument
321 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_get_clk_period()
322 div = (l & 0x03) + 1; in gpmc_get_clk_period()
334 static unsigned int gpmc_ns_to_clk_ticks(unsigned int time_ns, int cs, in gpmc_ns_to_clk_ticks() argument
340 tick_ps = gpmc_get_clk_period(cs, cd); in gpmc_ns_to_clk_ticks()
342 return (time_ns * 1000 + tick_ps - 1) / tick_ps; in gpmc_ns_to_clk_ticks()
347 return gpmc_ns_to_clk_ticks(time_ns, /* any CS */ 0, GPMC_CD_FCLK); in gpmc_ns_to_ticks()
357 return (time_ps + tick_ps - 1) / tick_ps; in gpmc_ps_to_ticks()
360 static unsigned int gpmc_clk_ticks_to_ns(unsigned int ticks, int cs, in gpmc_clk_ticks_to_ns() argument
363 return ticks * gpmc_get_clk_period(cs, cd) / 1000; in gpmc_clk_ticks_to_ns()
368 return gpmc_clk_ticks_to_ns(ticks, /* any CS */ 0, GPMC_CD_FCLK); in gpmc_ticks_to_ns()
383 static inline void gpmc_cs_modify_reg(int cs, int reg, u32 mask, bool value) in gpmc_cs_modify_reg() argument
387 l = gpmc_cs_read_reg(cs, reg); in gpmc_cs_modify_reg()
392 gpmc_cs_write_reg(cs, reg, l); in gpmc_cs_modify_reg()
395 static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) in gpmc_cs_bool_timings() argument
397 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG1, in gpmc_cs_bool_timings()
399 p->time_para_granularity); in gpmc_cs_bool_timings()
400 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG2, in gpmc_cs_bool_timings()
401 GPMC_CONFIG2_CSEXTRADELAY, p->cs_extra_delay); in gpmc_cs_bool_timings()
402 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG3, in gpmc_cs_bool_timings()
403 GPMC_CONFIG3_ADVEXTRADELAY, p->adv_extra_delay); in gpmc_cs_bool_timings()
404 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
405 GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay); in gpmc_cs_bool_timings()
406 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
407 GPMC_CONFIG4_WEEXTRADELAY, p->we_extra_delay); in gpmc_cs_bool_timings()
408 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
410 p->cycle2cyclesamecsen); in gpmc_cs_bool_timings()
411 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
413 p->cycle2cyclediffcsen); in gpmc_cs_bool_timings()
418 * get_gpmc_timing_reg - read a timing parameter and print DTS settings for it.
419 * @cs: Chip Select Region
430 * tick format: gpmc,name = <value> /‍* x ns -- y ns; x ticks *‍/
431 * Where x ns -- y ns result in the same tick value.
439 int cs, int reg, int st_bit, int end_bit, int max, in get_gpmc_timing_reg() argument
451 l = gpmc_cs_read_reg(cs, reg); in get_gpmc_timing_reg()
452 nr_bits = end_bit - st_bit + 1; in get_gpmc_timing_reg()
453 mask = (1 << nr_bits) - 1; in get_gpmc_timing_reg()
468 time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd) + 1; in get_gpmc_timing_reg()
469 time_ns = gpmc_clk_ticks_to_ns(l, cs, cd); in get_gpmc_timing_reg()
470 pr_info("gpmc,%s = <%u>; /* %u ns - %u ns; %i ticks%s*/\n", in get_gpmc_timing_reg()
482 #define GPMC_PRINT_CONFIG(cs, config) \ argument
483 pr_info("cs%i %s: 0x%08x\n", cs, #config, \
484 gpmc_cs_read_reg(cs, config))
486 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 0)
488 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, 0, 1, 0)
490 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 1)
492 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1)
494 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 0, 0)
496 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, (cd), 0, 0, 0)
498 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, (cd), 0, 0, 0)
500 static void gpmc_show_regs(int cs, const char *desc) in gpmc_show_regs() argument
502 pr_info("gpmc cs%i %s:\n", cs, desc); in gpmc_show_regs()
503 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG1); in gpmc_show_regs()
504 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG2); in gpmc_show_regs()
505 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG3); in gpmc_show_regs()
506 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG4); in gpmc_show_regs()
507 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG5); in gpmc_show_regs()
508 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG6); in gpmc_show_regs()
512 * Note that gpmc,wait-pin handing wrongly assumes bit 8 is available,
515 static void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
517 gpmc_show_regs(cs, desc); in gpmc_cs_show_timings()
519 pr_info("gpmc cs%i access configuration:\n", cs); in gpmc_cs_show_timings()
520 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity"); in gpmc_cs_show_timings()
521 GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data"); in gpmc_cs_show_timings()
522 GPMC_GET_RAW_SHIFT_MAX(GPMC_CS_CONFIG1, 12, 13, 1, in gpmc_cs_show_timings()
523 GPMC_CONFIG1_DEVICESIZE_MAX, "device-width"); in gpmc_cs_show_timings()
524 GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin"); in gpmc_cs_show_timings()
525 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write"); in gpmc_cs_show_timings()
526 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 22, 22, "wait-on-read"); in gpmc_cs_show_timings()
529 "burst-length"); in gpmc_cs_show_timings()
530 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 27, 27, "sync-write"); in gpmc_cs_show_timings()
531 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 28, 28, "burst-write"); in gpmc_cs_show_timings()
532 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 29, 29, "gpmc,sync-read"); in gpmc_cs_show_timings()
533 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 30, 30, "burst-read"); in gpmc_cs_show_timings()
534 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 31, 31, "burst-wrap"); in gpmc_cs_show_timings()
536 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG2, 7, 7, "cs-extra-delay"); in gpmc_cs_show_timings()
538 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG3, 7, 7, "adv-extra-delay"); in gpmc_cs_show_timings()
540 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 23, 23, "we-extra-delay"); in gpmc_cs_show_timings()
541 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 7, 7, "oe-extra-delay"); in gpmc_cs_show_timings()
543 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 7, 7, "cycle2cycle-samecsen"); in gpmc_cs_show_timings()
544 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 6, 6, "cycle2cycle-diffcsen"); in gpmc_cs_show_timings()
546 pr_info("gpmc cs%i timings configuration:\n", cs); in gpmc_cs_show_timings()
547 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 0, 3, "cs-on-ns"); in gpmc_cs_show_timings()
548 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 8, 12, "cs-rd-off-ns"); in gpmc_cs_show_timings()
549 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 16, 20, "cs-wr-off-ns"); in gpmc_cs_show_timings()
551 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 0, 3, "adv-on-ns"); in gpmc_cs_show_timings()
552 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 8, 12, "adv-rd-off-ns"); in gpmc_cs_show_timings()
553 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 16, 20, "adv-wr-off-ns"); in gpmc_cs_show_timings()
555 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 4, 6, "adv-aad-mux-on-ns"); in gpmc_cs_show_timings()
557 "adv-aad-mux-rd-off-ns"); in gpmc_cs_show_timings()
559 "adv-aad-mux-wr-off-ns"); in gpmc_cs_show_timings()
562 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 0, 3, "oe-on-ns"); in gpmc_cs_show_timings()
563 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 8, 12, "oe-off-ns"); in gpmc_cs_show_timings()
565 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 4, 6, "oe-aad-mux-on-ns"); in gpmc_cs_show_timings()
566 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 13, 15, "oe-aad-mux-off-ns"); in gpmc_cs_show_timings()
568 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 16, 19, "we-on-ns"); in gpmc_cs_show_timings()
569 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 24, 28, "we-off-ns"); in gpmc_cs_show_timings()
571 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 0, 4, "rd-cycle-ns"); in gpmc_cs_show_timings()
572 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 8, 12, "wr-cycle-ns"); in gpmc_cs_show_timings()
573 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 16, 20, "access-ns"); in gpmc_cs_show_timings()
575 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 24, 27, "page-burst-access-ns"); in gpmc_cs_show_timings()
577 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 0, 3, "bus-turnaround-ns"); in gpmc_cs_show_timings()
578 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 8, 11, "cycle2cycle-delay-ns"); in gpmc_cs_show_timings()
582 "wait-monitoring-ns", GPMC_CD_CLK); in gpmc_cs_show_timings()
585 "clk-activation-ns", GPMC_CD_FCLK); in gpmc_cs_show_timings()
587 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 16, 19, "wr-data-mux-bus-ns"); in gpmc_cs_show_timings()
588 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 24, 28, "wr-access-ns"); in gpmc_cs_show_timings()
591 static inline void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
597 * set_gpmc_timing_reg - set a single timing parameter for Chip Select Region.
601 * @cs: Chip Select Region.
610 * @return: 0 on success, -1 on error.
612 static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max, in set_gpmc_timing_reg() argument
621 ticks = gpmc_ns_to_clk_ticks(time, cs, cd); in set_gpmc_timing_reg()
622 nr_bits = end_bit - st_bit + 1; in set_gpmc_timing_reg()
623 mask = (1 << nr_bits) - 1; in set_gpmc_timing_reg()
629 pr_err("%s: GPMC CS%d: %s %d ns, %d ticks > %d ticks\n", in set_gpmc_timing_reg()
630 __func__, cs, name, time, ticks, max); in set_gpmc_timing_reg()
632 return -1; in set_gpmc_timing_reg()
635 l = gpmc_cs_read_reg(cs, reg); in set_gpmc_timing_reg()
637 pr_info("GPMC CS%d: %-17s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", in set_gpmc_timing_reg()
638 cs, name, ticks, gpmc_get_clk_period(cs, cd) * ticks / 1000, in set_gpmc_timing_reg()
643 gpmc_cs_write_reg(cs, reg, l); in set_gpmc_timing_reg()
649 * gpmc_calc_waitmonitoring_divider - calculate proper GPMCFCLKDIVIDER based on WAITMONITORINGTIME
651 * read --> don't sample bus too early
652 * write --> data is longer on bus
655 * gpmc_clk_div + 1 = ceil(ceil(waitmonitoringtime_ns / gpmc_fclk_ns)
657 * WAITMONITORINGTIME resulting in 0 or 1 tick with div = 1 are caught by
661 * @return: -1 on failure to scale, else proper divider > 0.
667 div += GPMC_CONFIG1_WAITMONITORINGTIME_MAX - 1; in gpmc_calc_waitmonitoring_divider()
671 return -1; in gpmc_calc_waitmonitoring_divider()
673 div = 1; in gpmc_calc_waitmonitoring_divider()
679 * gpmc_calc_divider - calculate GPMC_FCLK divider for sync_clk GPMC_CLK period.
681 * @return: Returns at least 1 if GPMC_FCLK can be divided to GPMC_CLK.
682 * Else, returns -1.
689 return -1; in gpmc_calc_divider()
691 div = 1; in gpmc_calc_divider()
697 * gpmc_cs_set_timings - program timing parameters for Chip Select Region.
698 * @cs: Chip Select Region.
701 * @return: 0 on success, -1 on error.
703 int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, in gpmc_cs_set_timings() argument
709 div = gpmc_calc_divider(t->sync_clk); in gpmc_cs_set_timings()
711 return -EINVAL; in gpmc_cs_set_timings()
716 * Calculate GPMCFCLKDIVIDER independent of gpmc,sync-clk-ps in DT for in gpmc_cs_set_timings()
726 if (!s->sync_read && !s->sync_write && in gpmc_cs_set_timings()
727 (s->wait_on_read || s->wait_on_write) in gpmc_cs_set_timings()
729 div = gpmc_calc_waitmonitoring_divider(t->wait_monitoring); in gpmc_cs_set_timings()
733 t->wait_monitoring in gpmc_cs_set_timings()
735 return -ENXIO; in gpmc_cs_set_timings()
740 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 0, 3, 0, t->cs_on, in gpmc_cs_set_timings()
742 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 8, 12, 0, t->cs_rd_off, in gpmc_cs_set_timings()
744 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 16, 20, 0, t->cs_wr_off, in gpmc_cs_set_timings()
747 return -ENXIO; in gpmc_cs_set_timings()
749 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 0, 3, 0, t->adv_on, in gpmc_cs_set_timings()
751 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 8, 12, 0, t->adv_rd_off, in gpmc_cs_set_timings()
753 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 16, 20, 0, t->adv_wr_off, in gpmc_cs_set_timings()
756 return -ENXIO; in gpmc_cs_set_timings()
759 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 4, 6, 0, in gpmc_cs_set_timings()
760 t->adv_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
762 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 24, 26, 0, in gpmc_cs_set_timings()
763 t->adv_aad_mux_rd_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
765 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 28, 30, 0, in gpmc_cs_set_timings()
766 t->adv_aad_mux_wr_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
769 return -ENXIO; in gpmc_cs_set_timings()
772 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 0, 3, 0, t->oe_on, in gpmc_cs_set_timings()
774 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 8, 12, 0, t->oe_off, in gpmc_cs_set_timings()
777 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 4, 6, 0, in gpmc_cs_set_timings()
778 t->oe_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
780 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 13, 15, 0, in gpmc_cs_set_timings()
781 t->oe_aad_mux_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
784 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 16, 19, 0, t->we_on, in gpmc_cs_set_timings()
786 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 24, 28, 0, t->we_off, in gpmc_cs_set_timings()
789 return -ENXIO; in gpmc_cs_set_timings()
791 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 0, 4, 0, t->rd_cycle, in gpmc_cs_set_timings()
793 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 8, 12, 0, t->wr_cycle, in gpmc_cs_set_timings()
795 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 16, 20, 0, t->access, in gpmc_cs_set_timings()
797 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 24, 27, 0, in gpmc_cs_set_timings()
798 t->page_burst_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
801 return -ENXIO; in gpmc_cs_set_timings()
803 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 0, 3, 0, in gpmc_cs_set_timings()
804 t->bus_turnaround, GPMC_CD_FCLK, in gpmc_cs_set_timings()
806 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 8, 11, 0, in gpmc_cs_set_timings()
807 t->cycle2cycle_delay, GPMC_CD_FCLK, in gpmc_cs_set_timings()
810 return -ENXIO; in gpmc_cs_set_timings()
813 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 16, 19, 0, in gpmc_cs_set_timings()
814 t->wr_data_mux_bus, GPMC_CD_FCLK, in gpmc_cs_set_timings()
817 return -ENXIO; in gpmc_cs_set_timings()
820 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 24, 28, 0, in gpmc_cs_set_timings()
821 t->wr_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
824 return -ENXIO; in gpmc_cs_set_timings()
827 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_cs_set_timings()
829 l |= (div - 1); in gpmc_cs_set_timings()
830 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); in gpmc_cs_set_timings()
833 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 18, 19, in gpmc_cs_set_timings()
835 t->wait_monitoring, GPMC_CD_CLK, in gpmc_cs_set_timings()
837 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 25, 26, in gpmc_cs_set_timings()
839 t->clk_activation, GPMC_CD_FCLK, in gpmc_cs_set_timings()
842 return -ENXIO; in gpmc_cs_set_timings()
845 pr_info("GPMC CS%d CLK period is %lu ns (div %d)\n", in gpmc_cs_set_timings()
846 cs, (div * gpmc_get_fclk_period()) / 1000, div); in gpmc_cs_set_timings()
849 gpmc_cs_bool_timings(cs, &t->bool_timings); in gpmc_cs_set_timings()
850 gpmc_cs_show_timings(cs, "after gpmc_cs_set_timings"); in gpmc_cs_set_timings()
855 static int gpmc_cs_set_memconf(int cs, u32 base, u32 size) in gpmc_cs_set_memconf() argument
864 if (base & (size - 1)) in gpmc_cs_set_memconf()
865 return -EINVAL; in gpmc_cs_set_memconf()
868 mask = (1 << GPMC_SECTION_SHIFT) - size; in gpmc_cs_set_memconf()
872 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_set_memconf()
877 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_set_memconf()
882 static void gpmc_cs_enable_mem(int cs) in gpmc_cs_enable_mem() argument
886 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_enable_mem()
888 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_enable_mem()
891 static void gpmc_cs_disable_mem(int cs) in gpmc_cs_disable_mem() argument
895 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_disable_mem()
897 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_disable_mem()
900 static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) in gpmc_cs_get_memconf() argument
905 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_get_memconf()
908 *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); in gpmc_cs_get_memconf()
911 static int gpmc_cs_mem_enabled(int cs) in gpmc_cs_mem_enabled() argument
915 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_mem_enabled()
919 static void gpmc_cs_set_reserved(int cs, int reserved) in gpmc_cs_set_reserved() argument
921 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_reserved()
923 gpmc->flags |= GPMC_CS_RESERVED; in gpmc_cs_set_reserved()
926 static bool gpmc_cs_reserved(int cs) in gpmc_cs_reserved() argument
928 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_reserved()
930 return gpmc->flags & GPMC_CS_RESERVED; in gpmc_cs_reserved()
937 size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); in gpmc_mem_align()
938 order = GPMC_CHUNK_SHIFT - 1; in gpmc_mem_align()
940 size >>= 1; in gpmc_mem_align()
943 size = 1 << order; in gpmc_mem_align()
947 static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) in gpmc_cs_insert_mem() argument
949 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_insert_mem()
950 struct resource *res = &gpmc->mem; in gpmc_cs_insert_mem()
955 res->start = base; in gpmc_cs_insert_mem()
956 res->end = base + size - 1; in gpmc_cs_insert_mem()
963 static int gpmc_cs_delete_mem(int cs) in gpmc_cs_delete_mem() argument
965 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_delete_mem()
966 struct resource *res = &gpmc->mem; in gpmc_cs_delete_mem()
971 res->start = 0; in gpmc_cs_delete_mem()
972 res->end = 0; in gpmc_cs_delete_mem()
978 int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) in gpmc_cs_request() argument
980 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_request()
981 struct resource *res = &gpmc->mem; in gpmc_cs_request()
982 int r = -1; in gpmc_cs_request()
984 if (cs >= gpmc_cs_num) { in gpmc_cs_request()
985 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_request()
986 return -ENODEV; in gpmc_cs_request()
989 if (size > (1 << GPMC_SECTION_SHIFT)) in gpmc_cs_request()
990 return -ENOMEM; in gpmc_cs_request()
993 if (gpmc_cs_reserved(cs)) { in gpmc_cs_request()
994 r = -EBUSY; in gpmc_cs_request()
997 if (gpmc_cs_mem_enabled(cs)) in gpmc_cs_request()
998 r = adjust_resource(res, res->start & ~(size - 1), size); in gpmc_cs_request()
1005 /* Disable CS while changing base address and size mask */ in gpmc_cs_request()
1006 gpmc_cs_disable_mem(cs); in gpmc_cs_request()
1008 r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); in gpmc_cs_request()
1014 /* Enable CS */ in gpmc_cs_request()
1015 gpmc_cs_enable_mem(cs); in gpmc_cs_request()
1016 *base = res->start; in gpmc_cs_request()
1017 gpmc_cs_set_reserved(cs, 1); in gpmc_cs_request()
1024 void gpmc_cs_free(int cs) in gpmc_cs_free() argument
1030 if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { in gpmc_cs_free()
1031 WARN(1, "Trying to free non-reserved GPMC CS%d\n", cs); in gpmc_cs_free()
1035 gpmc = &gpmc_cs[cs]; in gpmc_cs_free()
1036 res = &gpmc->mem; in gpmc_cs_free()
1038 gpmc_cs_disable_mem(cs); in gpmc_cs_free()
1039 if (res->flags) in gpmc_cs_free()
1041 gpmc_cs_set_reserved(cs, 0); in gpmc_cs_free()
1058 if (!gpmc_is_valid_waitpin(p->wait_pin)) in gpmc_alloc_waitpin()
1059 return -EINVAL; in gpmc_alloc_waitpin()
1061 waitpin = &gpmc->waitpins[p->wait_pin]; in gpmc_alloc_waitpin()
1063 if (!waitpin->desc) { in gpmc_alloc_waitpin()
1068 waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, in gpmc_alloc_waitpin()
1069 p->wait_pin, "WAITPIN", in gpmc_alloc_waitpin()
1074 if (IS_ERR(waitpin_desc) && ret != -EBUSY) in gpmc_alloc_waitpin()
1078 waitpin->desc = waitpin_desc; in gpmc_alloc_waitpin()
1079 waitpin->pin = p->wait_pin; in gpmc_alloc_waitpin()
1080 waitpin->polarity = p->wait_pin_polarity; in gpmc_alloc_waitpin()
1083 if (p->wait_pin_polarity != waitpin->polarity || in gpmc_alloc_waitpin()
1084 p->wait_pin != waitpin->pin) { in gpmc_alloc_waitpin()
1085 dev_err(gpmc->dev, in gpmc_alloc_waitpin()
1086 "shared-wait-pin: invalid configuration\n"); in gpmc_alloc_waitpin()
1087 return -EINVAL; in gpmc_alloc_waitpin()
1089 dev_info(gpmc->dev, "shared wait-pin: %d\n", waitpin->pin); in gpmc_alloc_waitpin()
1099 gpiochip_free_own_desc(gpmc->waitpins[wait_pin].desc); in gpmc_free_waitpin()
1103 * gpmc_configure - write request to configure gpmc
1124 return -EINVAL; in gpmc_configure()
1144 * gpmc_omap_get_nand_ops - Get the GPMC NAND interface
1146 * @cs: GPMC chip select number on which the NAND sits. The
1149 * Returns NULL on error e.g. invalid cs.
1151 struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *reg, int cs) in gpmc_omap_get_nand_ops() argument
1155 if (cs >= gpmc_cs_num) in gpmc_omap_get_nand_ops()
1158 reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1159 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1160 reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1161 GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1162 reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1163 GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1164 reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; in gpmc_omap_get_nand_ops()
1165 reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; in gpmc_omap_get_nand_ops()
1166 reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; in gpmc_omap_get_nand_ops()
1167 reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; in gpmc_omap_get_nand_ops()
1168 reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; in gpmc_omap_get_nand_ops()
1169 reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; in gpmc_omap_get_nand_ops()
1170 reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; in gpmc_omap_get_nand_ops()
1171 reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; in gpmc_omap_get_nand_ops()
1174 reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + in gpmc_omap_get_nand_ops()
1176 reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + in gpmc_omap_get_nand_ops()
1178 reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + in gpmc_omap_get_nand_ops()
1180 reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + in gpmc_omap_get_nand_ops()
1182 reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 + in gpmc_omap_get_nand_ops()
1184 reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 + in gpmc_omap_get_nand_ops()
1186 reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 + in gpmc_omap_get_nand_ops()
1248 if (!s->sync_write) { in gpmc_omap_onenand_calc_sync_timings()
1264 dev_t.cyc_iaa = (latency + 1); in gpmc_omap_onenand_calc_sync_timings()
1267 dev_t.cyc_aavdh_oe = 1; in gpmc_omap_onenand_calc_sync_timings()
1273 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument
1281 gpmc_read_settings_dt(dev->of_node, &gpmc_s); in gpmc_omap_onenand_set_timings()
1283 info->sync_read = gpmc_s.sync_read; in gpmc_omap_onenand_set_timings()
1284 info->sync_write = gpmc_s.sync_write; in gpmc_omap_onenand_set_timings()
1285 info->burst_len = gpmc_s.burst_len; in gpmc_omap_onenand_set_timings()
1292 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_omap_onenand_set_timings()
1296 return gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_omap_onenand_set_timings()
1321 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_endis()
1335 gpmc_irq_endis(p->hwirq, false); in gpmc_irq_disable()
1340 gpmc_irq_endis(p->hwirq, true); in gpmc_irq_enable()
1345 gpmc_irq_endis(d->hwirq, false); in gpmc_irq_mask()
1350 gpmc_irq_endis(d->hwirq, true); in gpmc_irq_unmask()
1362 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_edge_config()
1375 unsigned int hwirq = d->hwirq; in gpmc_irq_ack()
1379 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_ack()
1381 /* Setting bit to 1 clears (or Acks) the interrupt */ in gpmc_irq_ack()
1388 if (d->hwirq < GPMC_NR_NAND_IRQS) in gpmc_irq_set_type()
1389 return -EINVAL; in gpmc_irq_set_type()
1393 gpmc_irq_edge_config(d->hwirq, false); in gpmc_irq_set_type()
1395 gpmc_irq_edge_config(d->hwirq, true); in gpmc_irq_set_type()
1397 return -EINVAL; in gpmc_irq_set_type()
1405 struct gpmc_device *gpmc = d->host_data; in gpmc_irq_map()
1410 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1413 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1437 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) { in gpmc_handle_irq()
1440 regvalx >>= 8 - GPMC_NR_NAND_IRQS; in gpmc_handle_irq()
1445 dev_warn(gpmc->dev, in gpmc_handle_irq()
1471 gpmc->irq_chip.name = "gpmc"; in gpmc_setup_irq()
1472 gpmc->irq_chip.irq_enable = gpmc_irq_enable; in gpmc_setup_irq()
1473 gpmc->irq_chip.irq_disable = gpmc_irq_disable; in gpmc_setup_irq()
1474 gpmc->irq_chip.irq_ack = gpmc_irq_ack; in gpmc_setup_irq()
1475 gpmc->irq_chip.irq_mask = gpmc_irq_mask; in gpmc_setup_irq()
1476 gpmc->irq_chip.irq_unmask = gpmc_irq_unmask; in gpmc_setup_irq()
1477 gpmc->irq_chip.irq_set_type = gpmc_irq_set_type; in gpmc_setup_irq()
1479 gpmc_irq_domain = irq_domain_add_linear(gpmc->dev->of_node, in gpmc_setup_irq()
1480 gpmc->nirqs, in gpmc_setup_irq()
1484 dev_err(gpmc->dev, "IRQ domain add failed\n"); in gpmc_setup_irq()
1485 return -ENODEV; in gpmc_setup_irq()
1488 rc = request_irq(gpmc->irq, gpmc_handle_irq, 0, "gpmc", gpmc); in gpmc_setup_irq()
1490 dev_err(gpmc->dev, "failed to request irq %d: %d\n", in gpmc_setup_irq()
1491 gpmc->irq, rc); in gpmc_setup_irq()
1503 free_irq(gpmc->irq, gpmc); in gpmc_free_irq()
1505 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) in gpmc_free_irq()
1516 int cs; in gpmc_mem_exit() local
1518 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_exit()
1519 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_exit()
1521 gpmc_cs_delete_mem(cs); in gpmc_mem_exit()
1527 int cs; in gpmc_mem_init() local
1529 if (!gpmc->data) { in gpmc_mem_init()
1534 gpmc_mem_root.start = gpmc->data->start; in gpmc_mem_init()
1535 gpmc_mem_root.end = gpmc->data->end; in gpmc_mem_init()
1539 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_init()
1542 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_init()
1544 gpmc_cs_get_memconf(cs, &base, &size); in gpmc_mem_init()
1545 if (gpmc_cs_insert_mem(cs, base, size)) { in gpmc_mem_init()
1546 pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", in gpmc_mem_init()
1547 __func__, cs, base, base + size); in gpmc_mem_init()
1548 gpmc_cs_disable_mem(cs); in gpmc_mem_init()
1560 temp = (temp + div - 1) / div; in gpmc_round_ps_to_sync_clk()
1572 temp = dev_t->t_avdp_r; in gpmc_calc_sync_read_timings()
1579 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_read_timings()
1580 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_read_timings()
1582 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1585 temp = dev_t->t_oeasu; /* XXX: remove this ? */ in gpmc_calc_sync_read_timings()
1587 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); in gpmc_calc_sync_read_timings()
1588 temp = max_t(u32, temp, gpmc_t->adv_rd_off + in gpmc_calc_sync_read_timings()
1589 gpmc_ticks_to_ps(dev_t->cyc_aavdh_oe)); in gpmc_calc_sync_read_timings()
1591 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1598 temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); in gpmc_calc_sync_read_timings()
1599 temp += gpmc_t->clk_activation; in gpmc_calc_sync_read_timings()
1600 if (dev_t->cyc_oe) in gpmc_calc_sync_read_timings()
1601 temp = max_t(u32, temp, gpmc_t->oe_on + in gpmc_calc_sync_read_timings()
1602 gpmc_ticks_to_ps(dev_t->cyc_oe)); in gpmc_calc_sync_read_timings()
1603 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1605 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_sync_read_timings()
1606 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_sync_read_timings()
1609 temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); in gpmc_calc_sync_read_timings()
1610 temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + in gpmc_calc_sync_read_timings()
1611 gpmc_t->access; in gpmc_calc_sync_read_timings()
1613 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_read_timings()
1614 temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_read_timings()
1615 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1627 temp = dev_t->t_avdp_w; in gpmc_calc_sync_write_timings()
1630 gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_write_timings()
1631 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_write_timings()
1633 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1636 temp = max_t(u32, dev_t->t_weasu, in gpmc_calc_sync_write_timings()
1637 gpmc_t->clk_activation + dev_t->t_rdyo); in gpmc_calc_sync_write_timings()
1643 gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_sync_write_timings()
1644 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_sync_write_timings()
1645 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_sync_write_timings()
1647 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1651 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_sync_write_timings()
1653 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_sync_write_timings()
1657 gpmc_t->wr_access = gpmc_t->access; in gpmc_calc_sync_write_timings()
1660 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_sync_write_timings()
1662 gpmc_t->wr_access + gpmc_ticks_to_ps(1)); in gpmc_calc_sync_write_timings()
1664 gpmc_t->we_on + gpmc_ticks_to_ps(dev_t->cyc_wpl)); in gpmc_calc_sync_write_timings()
1665 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1667 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_sync_write_timings()
1668 dev_t->t_wph); in gpmc_calc_sync_write_timings()
1671 temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); in gpmc_calc_sync_write_timings()
1672 temp += gpmc_t->wr_access; in gpmc_calc_sync_write_timings()
1674 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_write_timings()
1676 gpmc_t->cs_wr_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_write_timings()
1677 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1689 temp = dev_t->t_avdp_r; in gpmc_calc_async_read_timings()
1691 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_read_timings()
1692 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1695 temp = dev_t->t_oeasu; in gpmc_calc_async_read_timings()
1697 temp = max_t(u32, temp, gpmc_t->adv_rd_off + dev_t->t_aavdh); in gpmc_calc_async_read_timings()
1698 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1701 temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ in gpmc_calc_async_read_timings()
1702 gpmc_t->oe_on + dev_t->t_oe); in gpmc_calc_async_read_timings()
1703 temp = max_t(u32, temp, gpmc_t->cs_on + dev_t->t_ce); in gpmc_calc_async_read_timings()
1704 temp = max_t(u32, temp, gpmc_t->adv_on + dev_t->t_aa); in gpmc_calc_async_read_timings()
1705 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1707 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_async_read_timings()
1708 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_async_read_timings()
1711 temp = max_t(u32, dev_t->t_rd_cycle, in gpmc_calc_async_read_timings()
1712 gpmc_t->cs_rd_off + dev_t->t_cez_r); in gpmc_calc_async_read_timings()
1713 temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); in gpmc_calc_async_read_timings()
1714 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1726 temp = dev_t->t_avdp_w; in gpmc_calc_async_write_timings()
1728 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_write_timings()
1729 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1732 temp = dev_t->t_weasu; in gpmc_calc_async_write_timings()
1734 temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_async_write_timings()
1735 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_async_write_timings()
1736 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_async_write_timings()
1738 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1742 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_async_write_timings()
1744 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_async_write_timings()
1747 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_async_write_timings()
1748 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1750 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_async_write_timings()
1751 dev_t->t_wph); in gpmc_calc_async_write_timings()
1754 temp = max_t(u32, dev_t->t_wr_cycle, in gpmc_calc_async_write_timings()
1755 gpmc_t->cs_wr_off + dev_t->t_cez_w); in gpmc_calc_async_write_timings()
1756 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1766 gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) * in gpmc_calc_sync_common_timings()
1769 gpmc_t->page_burst_access = gpmc_round_ps_to_sync_clk( in gpmc_calc_sync_common_timings()
1770 dev_t->t_bacc, in gpmc_calc_sync_common_timings()
1771 gpmc_t->sync_clk); in gpmc_calc_sync_common_timings()
1773 temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); in gpmc_calc_sync_common_timings()
1774 gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_common_timings()
1776 if (gpmc_calc_divider(gpmc_t->sync_clk) != 1) in gpmc_calc_sync_common_timings()
1779 if (dev_t->ce_xdelay) in gpmc_calc_sync_common_timings()
1780 gpmc_t->bool_timings.cs_extra_delay = true; in gpmc_calc_sync_common_timings()
1781 if (dev_t->avd_xdelay) in gpmc_calc_sync_common_timings()
1782 gpmc_t->bool_timings.adv_extra_delay = true; in gpmc_calc_sync_common_timings()
1783 if (dev_t->oe_xdelay) in gpmc_calc_sync_common_timings()
1784 gpmc_t->bool_timings.oe_extra_delay = true; in gpmc_calc_sync_common_timings()
1785 if (dev_t->we_xdelay) in gpmc_calc_sync_common_timings()
1786 gpmc_t->bool_timings.we_extra_delay = true; in gpmc_calc_sync_common_timings()
1798 gpmc_t->cs_on = gpmc_round_ps_to_ticks(dev_t->t_ceasu); in gpmc_calc_common_timings()
1801 temp = dev_t->t_avdasu; in gpmc_calc_common_timings()
1802 if (dev_t->t_ce_avd) in gpmc_calc_common_timings()
1804 gpmc_t->cs_on + dev_t->t_ce_avd); in gpmc_calc_common_timings()
1805 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_common_timings()
1820 t->cs_on /= 1000; in gpmc_convert_ps_to_ns()
1821 t->cs_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1822 t->cs_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1823 t->adv_on /= 1000; in gpmc_convert_ps_to_ns()
1824 t->adv_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1825 t->adv_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1826 t->we_on /= 1000; in gpmc_convert_ps_to_ns()
1827 t->we_off /= 1000; in gpmc_convert_ps_to_ns()
1828 t->oe_on /= 1000; in gpmc_convert_ps_to_ns()
1829 t->oe_off /= 1000; in gpmc_convert_ps_to_ns()
1830 t->page_burst_access /= 1000; in gpmc_convert_ps_to_ns()
1831 t->access /= 1000; in gpmc_convert_ps_to_ns()
1832 t->rd_cycle /= 1000; in gpmc_convert_ps_to_ns()
1833 t->wr_cycle /= 1000; in gpmc_convert_ps_to_ns()
1834 t->bus_turnaround /= 1000; in gpmc_convert_ps_to_ns()
1835 t->cycle2cycle_delay /= 1000; in gpmc_convert_ps_to_ns()
1836 t->wait_monitoring /= 1000; in gpmc_convert_ps_to_ns()
1837 t->clk_activation /= 1000; in gpmc_convert_ps_to_ns()
1838 t->wr_access /= 1000; in gpmc_convert_ps_to_ns()
1839 t->wr_data_mux_bus /= 1000; in gpmc_convert_ps_to_ns()
1849 mux = gpmc_s->mux_add_data ? true : false; in gpmc_calc_timings()
1850 sync = (gpmc_s->sync_read || gpmc_s->sync_write); in gpmc_calc_timings()
1857 if (gpmc_s && gpmc_s->sync_read) in gpmc_calc_timings()
1862 if (gpmc_s && gpmc_s->sync_write) in gpmc_calc_timings()
1874 * gpmc_cs_program_settings - programs non-timing related settings
1875 * @cs: GPMC chip-select to program
1878 * Programs non-timing related settings for a GPMC chip-select, such as
1879 * bus-width, burst configuration, etc. Function should be called once
1880 * for each chip-select that is being used and must be called before
1885 int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) in gpmc_cs_program_settings() argument
1889 if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { in gpmc_cs_program_settings()
1890 pr_err("%s: invalid width %d!", __func__, p->device_width); in gpmc_cs_program_settings()
1891 return -EINVAL; in gpmc_cs_program_settings()
1894 /* Address-data multiplexing not supported for NAND devices */ in gpmc_cs_program_settings()
1895 if (p->device_nand && p->mux_add_data) { in gpmc_cs_program_settings()
1897 return -EINVAL; in gpmc_cs_program_settings()
1900 if ((p->mux_add_data > GPMC_MUX_AD) || in gpmc_cs_program_settings()
1901 ((p->mux_add_data == GPMC_MUX_AAD) && in gpmc_cs_program_settings()
1904 return -EINVAL; in gpmc_cs_program_settings()
1908 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1909 switch (p->burst_len) { in gpmc_cs_program_settings()
1915 pr_err("%s: invalid page/burst-length (%d)\n", in gpmc_cs_program_settings()
1916 __func__, p->burst_len); in gpmc_cs_program_settings()
1917 return -EINVAL; in gpmc_cs_program_settings()
1921 if (p->wait_pin != GPMC_WAITPIN_INVALID && in gpmc_cs_program_settings()
1922 p->wait_pin > gpmc_nr_waitpins) { in gpmc_cs_program_settings()
1923 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); in gpmc_cs_program_settings()
1924 return -EINVAL; in gpmc_cs_program_settings()
1927 config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); in gpmc_cs_program_settings()
1929 if (p->sync_read) in gpmc_cs_program_settings()
1931 if (p->sync_write) in gpmc_cs_program_settings()
1933 if (p->wait_on_read) in gpmc_cs_program_settings()
1935 if (p->wait_on_write) in gpmc_cs_program_settings()
1937 if (p->wait_on_read || p->wait_on_write) in gpmc_cs_program_settings()
1938 config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); in gpmc_cs_program_settings()
1939 if (p->device_nand) in gpmc_cs_program_settings()
1941 if (p->mux_add_data) in gpmc_cs_program_settings()
1942 config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); in gpmc_cs_program_settings()
1943 if (p->burst_read) in gpmc_cs_program_settings()
1945 if (p->burst_write) in gpmc_cs_program_settings()
1947 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1948 config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); in gpmc_cs_program_settings()
1949 config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; in gpmc_cs_program_settings()
1952 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); in gpmc_cs_program_settings()
1954 if (p->wait_pin_polarity != GPMC_WAITPINPOLARITY_INVALID) { in gpmc_cs_program_settings()
1957 if (p->wait_pin_polarity == GPMC_WAITPINPOLARITY_ACTIVE_LOW) in gpmc_cs_program_settings()
1958 config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); in gpmc_cs_program_settings()
1959 else if (p->wait_pin_polarity == GPMC_WAITPINPOLARITY_ACTIVE_HIGH) in gpmc_cs_program_settings()
1960 config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); in gpmc_cs_program_settings()
1969 static void gpmc_cs_set_name(int cs, const char *name) in gpmc_cs_set_name() argument
1971 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_name()
1973 gpmc->name = name; in gpmc_cs_set_name()
1976 static const char *gpmc_cs_get_name(int cs) in gpmc_cs_get_name() argument
1978 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_get_name()
1980 return gpmc->name; in gpmc_cs_get_name()
1984 * gpmc_cs_remap - remaps a chip-select physical base address
1985 * @cs: chip-select to remap
1986 * @base: physical base address to re-map chip-select to
1988 * Re-maps a chip-select to a new physical base address specified by
1992 static int gpmc_cs_remap(int cs, u32 base) in gpmc_cs_remap() argument
1997 if (cs >= gpmc_cs_num) { in gpmc_cs_remap()
1998 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_remap()
1999 return -ENODEV; in gpmc_cs_remap()
2007 base &= ~(SZ_16M - 1); in gpmc_cs_remap()
2009 gpmc_cs_get_memconf(cs, &old_base, &size); in gpmc_cs_remap()
2013 ret = gpmc_cs_delete_mem(cs); in gpmc_cs_remap()
2017 ret = gpmc_cs_insert_mem(cs, base, size); in gpmc_cs_remap()
2021 ret = gpmc_cs_set_memconf(cs, base, size); in gpmc_cs_remap()
2027 * gpmc_read_settings_dt - read gpmc settings from device-tree
2028 * @np: pointer to device-tree node for a gpmc child device
2031 * Reads the GPMC settings for a GPMC child device from device-tree and
2040 p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); in gpmc_read_settings_dt()
2041 p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); in gpmc_read_settings_dt()
2042 of_property_read_u32(np, "gpmc,device-width", &p->device_width); in gpmc_read_settings_dt()
2043 of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); in gpmc_read_settings_dt()
2045 if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { in gpmc_read_settings_dt()
2046 p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); in gpmc_read_settings_dt()
2047 p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); in gpmc_read_settings_dt()
2048 p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); in gpmc_read_settings_dt()
2049 if (!p->burst_read && !p->burst_write) in gpmc_read_settings_dt()
2050 pr_warn("%s: page/burst-length set but not used!\n", in gpmc_read_settings_dt()
2054 p->wait_pin = GPMC_WAITPIN_INVALID; in gpmc_read_settings_dt()
2055 p->wait_pin_polarity = GPMC_WAITPINPOLARITY_INVALID; in gpmc_read_settings_dt()
2057 if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { in gpmc_read_settings_dt()
2058 if (!gpmc_is_valid_waitpin(p->wait_pin)) { in gpmc_read_settings_dt()
2059 pr_err("%s: Invalid wait-pin (%d)\n", __func__, p->wait_pin); in gpmc_read_settings_dt()
2060 p->wait_pin = GPMC_WAITPIN_INVALID; in gpmc_read_settings_dt()
2063 if (!of_property_read_u32(np, "ti,wait-pin-polarity", in gpmc_read_settings_dt()
2064 &p->wait_pin_polarity)) { in gpmc_read_settings_dt()
2065 if (p->wait_pin_polarity != GPMC_WAITPINPOLARITY_ACTIVE_HIGH && in gpmc_read_settings_dt()
2066 p->wait_pin_polarity != GPMC_WAITPINPOLARITY_ACTIVE_LOW) { in gpmc_read_settings_dt()
2067 pr_err("%s: Invalid wait-pin-polarity (%d)\n", in gpmc_read_settings_dt()
2068 __func__, p->wait_pin_polarity); in gpmc_read_settings_dt()
2069 p->wait_pin_polarity = GPMC_WAITPINPOLARITY_INVALID; in gpmc_read_settings_dt()
2073 p->wait_on_read = of_property_read_bool(np, in gpmc_read_settings_dt()
2074 "gpmc,wait-on-read"); in gpmc_read_settings_dt()
2075 p->wait_on_write = of_property_read_bool(np, in gpmc_read_settings_dt()
2076 "gpmc,wait-on-write"); in gpmc_read_settings_dt()
2077 if (!p->wait_on_read && !p->wait_on_write) in gpmc_read_settings_dt()
2094 of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); in gpmc_read_timings_dt()
2097 of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); in gpmc_read_timings_dt()
2098 of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); in gpmc_read_timings_dt()
2099 of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); in gpmc_read_timings_dt()
2102 of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); in gpmc_read_timings_dt()
2103 of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); in gpmc_read_timings_dt()
2104 of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); in gpmc_read_timings_dt()
2105 of_property_read_u32(np, "gpmc,adv-aad-mux-on-ns", in gpmc_read_timings_dt()
2106 &gpmc_t->adv_aad_mux_on); in gpmc_read_timings_dt()
2107 of_property_read_u32(np, "gpmc,adv-aad-mux-rd-off-ns", in gpmc_read_timings_dt()
2108 &gpmc_t->adv_aad_mux_rd_off); in gpmc_read_timings_dt()
2109 of_property_read_u32(np, "gpmc,adv-aad-mux-wr-off-ns", in gpmc_read_timings_dt()
2110 &gpmc_t->adv_aad_mux_wr_off); in gpmc_read_timings_dt()
2113 of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); in gpmc_read_timings_dt()
2114 of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); in gpmc_read_timings_dt()
2117 of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); in gpmc_read_timings_dt()
2118 of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); in gpmc_read_timings_dt()
2119 of_property_read_u32(np, "gpmc,oe-aad-mux-on-ns", in gpmc_read_timings_dt()
2120 &gpmc_t->oe_aad_mux_on); in gpmc_read_timings_dt()
2121 of_property_read_u32(np, "gpmc,oe-aad-mux-off-ns", in gpmc_read_timings_dt()
2122 &gpmc_t->oe_aad_mux_off); in gpmc_read_timings_dt()
2125 of_property_read_u32(np, "gpmc,page-burst-access-ns", in gpmc_read_timings_dt()
2126 &gpmc_t->page_burst_access); in gpmc_read_timings_dt()
2127 of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); in gpmc_read_timings_dt()
2128 of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); in gpmc_read_timings_dt()
2129 of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); in gpmc_read_timings_dt()
2130 of_property_read_u32(np, "gpmc,bus-turnaround-ns", in gpmc_read_timings_dt()
2131 &gpmc_t->bus_turnaround); in gpmc_read_timings_dt()
2132 of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", in gpmc_read_timings_dt()
2133 &gpmc_t->cycle2cycle_delay); in gpmc_read_timings_dt()
2134 of_property_read_u32(np, "gpmc,wait-monitoring-ns", in gpmc_read_timings_dt()
2135 &gpmc_t->wait_monitoring); in gpmc_read_timings_dt()
2136 of_property_read_u32(np, "gpmc,clk-activation-ns", in gpmc_read_timings_dt()
2137 &gpmc_t->clk_activation); in gpmc_read_timings_dt()
2140 of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); in gpmc_read_timings_dt()
2141 of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", in gpmc_read_timings_dt()
2142 &gpmc_t->wr_data_mux_bus); in gpmc_read_timings_dt()
2145 p = &gpmc_t->bool_timings; in gpmc_read_timings_dt()
2147 p->cycle2cyclediffcsen = in gpmc_read_timings_dt()
2148 of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); in gpmc_read_timings_dt()
2149 p->cycle2cyclesamecsen = in gpmc_read_timings_dt()
2150 of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); in gpmc_read_timings_dt()
2151 p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); in gpmc_read_timings_dt()
2152 p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); in gpmc_read_timings_dt()
2153 p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); in gpmc_read_timings_dt()
2154 p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); in gpmc_read_timings_dt()
2155 p->time_para_granularity = in gpmc_read_timings_dt()
2156 of_property_read_bool(np, "gpmc,time-para-granularity"); in gpmc_read_timings_dt()
2160 * gpmc_probe_generic_child - configures the gpmc for a child device
2162 * @child: pointer to device-tree node for child device
2164 * Allocates and configures a GPMC chip-select for a child device.
2175 int ret, cs; in gpmc_probe_generic_child() local
2179 if (of_property_read_u32(child, "reg", &cs) < 0) { in gpmc_probe_generic_child()
2180 dev_err(&pdev->dev, "%pOF has no 'reg' property\n", in gpmc_probe_generic_child()
2182 return -ENODEV; in gpmc_probe_generic_child()
2186 dev_err(&pdev->dev, "%pOF has malformed 'reg' property\n", in gpmc_probe_generic_child()
2188 return -ENODEV; in gpmc_probe_generic_child()
2196 name = gpmc_cs_get_name(cs); in gpmc_probe_generic_child()
2200 ret = gpmc_cs_request(cs, resource_size(&res), &base); in gpmc_probe_generic_child()
2202 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); in gpmc_probe_generic_child()
2205 gpmc_cs_set_name(cs, child->full_name); in gpmc_probe_generic_child()
2216 WARN(1, "enable GPMC debug to configure .dts timings for CS%i\n", in gpmc_probe_generic_child()
2217 cs); in gpmc_probe_generic_child()
2218 gpmc_cs_show_timings(cs, in gpmc_probe_generic_child()
2223 /* CS must be disabled while making changes to gpmc configuration */ in gpmc_probe_generic_child()
2224 gpmc_cs_disable_mem(cs); in gpmc_probe_generic_child()
2227 * FIXME: gpmc_cs_request() will map the CS to an arbitrary in gpmc_probe_generic_child()
2229 * device-tree we want the NOR flash to be mapped to the in gpmc_probe_generic_child()
2230 * location specified in the device-tree blob. So remap the in gpmc_probe_generic_child()
2231 * CS to this location. Once DT migration is complete should in gpmc_probe_generic_child()
2234 ret = gpmc_cs_remap(cs, res.start); in gpmc_probe_generic_child()
2236 dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", in gpmc_probe_generic_child()
2237 cs, &res.start); in gpmc_probe_generic_child()
2239 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2240 "GPMC CS %d start cannot be lesser than 0x%x\n", in gpmc_probe_generic_child()
2241 cs, GPMC_MEM_START); in gpmc_probe_generic_child()
2243 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2244 "GPMC CS %d end cannot be greater than 0x%x\n", in gpmc_probe_generic_child()
2245 cs, GPMC_MEM_END); in gpmc_probe_generic_child()
2253 of_property_read_u32(child, "nand-bus-width", &val); in gpmc_probe_generic_child()
2262 dev_err(&pdev->dev, "%pOFn: invalid 'nand-bus-width'\n", in gpmc_probe_generic_child()
2264 ret = -EINVAL; in gpmc_probe_generic_child()
2272 ret = of_property_read_u32(child, "bank-width", in gpmc_probe_generic_child()
2275 dev_err(&pdev->dev, in gpmc_probe_generic_child()
2276 "%pOF has no 'gpmc,device-width' property\n", in gpmc_probe_generic_child()
2289 gpmc_cs_show_timings(cs, "before gpmc_cs_program_settings"); in gpmc_probe_generic_child()
2291 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_probe_generic_child()
2295 ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_probe_generic_child()
2297 dev_err(&pdev->dev, "failed to set gpmc timings for: %pOFn\n", in gpmc_probe_generic_child()
2302 /* Clear limited address i.e. enable A26-A11 */ in gpmc_probe_generic_child()
2307 /* Enable CS region */ in gpmc_probe_generic_child()
2308 gpmc_cs_enable_mem(cs); in gpmc_probe_generic_child()
2313 if (!of_platform_device_create(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2317 if (of_platform_default_populate(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2324 dev_err(&pdev->dev, "failed to create gpmc child %pOFn\n", child); in gpmc_probe_generic_child()
2325 ret = -ENODEV; in gpmc_probe_generic_child()
2330 gpmc_cs_free(cs); in gpmc_probe_generic_child()
2341 of_match_device(gpmc_dt_ids, &pdev->dev); in gpmc_probe_dt()
2346 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", in gpmc_probe_dt()
2349 pr_err("%s: number of chip-selects not defined\n", __func__); in gpmc_probe_dt()
2351 } else if (gpmc_cs_num < 1) { in gpmc_probe_dt()
2352 pr_err("%s: all chip-selects are disabled\n", __func__); in gpmc_probe_dt()
2353 return -EINVAL; in gpmc_probe_dt()
2355 pr_err("%s: number of supported chip-selects cannot be > %d\n", in gpmc_probe_dt()
2357 return -EINVAL; in gpmc_probe_dt()
2360 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", in gpmc_probe_dt()
2375 for_each_available_child_of_node(pdev->dev.of_node, child) { in gpmc_probe_dt_children()
2378 dev_err(&pdev->dev, "failed to probe DT child '%pOFn': %d\n", in gpmc_probe_dt_children()
2400 return 1; /* we're input only */ in gpmc_gpio_get_direction()
2412 return -EINVAL; /* we're input only */ in gpmc_gpio_direction_output()
2435 gpmc->gpio_chip.parent = gpmc->dev; in gpmc_gpio_init()
2436 gpmc->gpio_chip.owner = THIS_MODULE; in gpmc_gpio_init()
2437 gpmc->gpio_chip.label = DEVICE_NAME; in gpmc_gpio_init()
2438 gpmc->gpio_chip.ngpio = gpmc_nr_waitpins; in gpmc_gpio_init()
2439 gpmc->gpio_chip.get_direction = gpmc_gpio_get_direction; in gpmc_gpio_init()
2440 gpmc->gpio_chip.direction_input = gpmc_gpio_direction_input; in gpmc_gpio_init()
2441 gpmc->gpio_chip.direction_output = gpmc_gpio_direction_output; in gpmc_gpio_init()
2442 gpmc->gpio_chip.set = gpmc_gpio_set; in gpmc_gpio_init()
2443 gpmc->gpio_chip.get = gpmc_gpio_get; in gpmc_gpio_init()
2444 gpmc->gpio_chip.base = -1; in gpmc_gpio_init()
2446 ret = devm_gpiochip_add_data(gpmc->dev, &gpmc->gpio_chip, NULL); in gpmc_gpio_init()
2448 dev_err(gpmc->dev, "could not register gpio chip: %d\n", ret); in gpmc_gpio_init()
2463 gpmc_context = &gpmc->context; in omap3_gpmc_save_context()
2465 gpmc_context->sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); in omap3_gpmc_save_context()
2466 gpmc_context->irqenable = gpmc_read_reg(GPMC_IRQENABLE); in omap3_gpmc_save_context()
2467 gpmc_context->timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); in omap3_gpmc_save_context()
2468 gpmc_context->config = gpmc_read_reg(GPMC_CONFIG); in omap3_gpmc_save_context()
2469 gpmc_context->prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); in omap3_gpmc_save_context()
2470 gpmc_context->prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); in omap3_gpmc_save_context()
2471 gpmc_context->prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); in omap3_gpmc_save_context()
2473 gpmc_context->cs_context[i].is_valid = gpmc_cs_mem_enabled(i); in omap3_gpmc_save_context()
2474 if (gpmc_context->cs_context[i].is_valid) { in omap3_gpmc_save_context()
2475 gpmc_context->cs_context[i].config1 = in omap3_gpmc_save_context()
2477 gpmc_context->cs_context[i].config2 = in omap3_gpmc_save_context()
2479 gpmc_context->cs_context[i].config3 = in omap3_gpmc_save_context()
2481 gpmc_context->cs_context[i].config4 = in omap3_gpmc_save_context()
2483 gpmc_context->cs_context[i].config5 = in omap3_gpmc_save_context()
2485 gpmc_context->cs_context[i].config6 = in omap3_gpmc_save_context()
2487 gpmc_context->cs_context[i].config7 = in omap3_gpmc_save_context()
2501 gpmc_context = &gpmc->context; in omap3_gpmc_restore_context()
2503 gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context->sysconfig); in omap3_gpmc_restore_context()
2504 gpmc_write_reg(GPMC_IRQENABLE, gpmc_context->irqenable); in omap3_gpmc_restore_context()
2505 gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context->timeout_ctrl); in omap3_gpmc_restore_context()
2506 gpmc_write_reg(GPMC_CONFIG, gpmc_context->config); in omap3_gpmc_restore_context()
2507 gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context->prefetch_config1); in omap3_gpmc_restore_context()
2508 gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context->prefetch_config2); in omap3_gpmc_restore_context()
2509 gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context->prefetch_control); in omap3_gpmc_restore_context()
2511 if (gpmc_context->cs_context[i].is_valid) { in omap3_gpmc_restore_context()
2513 gpmc_context->cs_context[i].config1); in omap3_gpmc_restore_context()
2515 gpmc_context->cs_context[i].config2); in omap3_gpmc_restore_context()
2517 gpmc_context->cs_context[i].config3); in omap3_gpmc_restore_context()
2519 gpmc_context->cs_context[i].config4); in omap3_gpmc_restore_context()
2521 gpmc_context->cs_context[i].config5); in omap3_gpmc_restore_context()
2523 gpmc_context->cs_context[i].config6); in omap3_gpmc_restore_context()
2525 gpmc_context->cs_context[i].config7); in omap3_gpmc_restore_context()
2538 if (gpmc->is_suspended || pm_runtime_suspended(gpmc->dev)) in omap_gpmc_context_notifier()
2562 gpmc = devm_kzalloc(&pdev->dev, sizeof(*gpmc), GFP_KERNEL); in gpmc_probe()
2564 return -ENOMEM; in gpmc_probe()
2566 gpmc->dev = &pdev->dev; in gpmc_probe()
2576 gpmc_base = devm_ioremap_resource(&pdev->dev, res); in gpmc_probe()
2582 dev_err(&pdev->dev, "couldn't get data reg resource\n"); in gpmc_probe()
2583 return -ENOENT; in gpmc_probe()
2586 gpmc->data = res; in gpmc_probe()
2589 gpmc->irq = platform_get_irq(pdev, 0); in gpmc_probe()
2590 if (gpmc->irq < 0) in gpmc_probe()
2591 return gpmc->irq; in gpmc_probe()
2593 gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck"); in gpmc_probe()
2595 dev_err(&pdev->dev, "Failed to get GPMC fck\n"); in gpmc_probe()
2600 dev_err(&pdev->dev, "Invalid GPMC fck clock rate\n"); in gpmc_probe()
2601 return -EINVAL; in gpmc_probe()
2604 if (pdev->dev.of_node) { in gpmc_probe()
2613 gpmc->waitpins = devm_kzalloc(&pdev->dev, in gpmc_probe()
2616 if (!gpmc->waitpins) in gpmc_probe()
2617 return -ENOMEM; in gpmc_probe()
2620 gpmc->waitpins[i].pin = GPMC_WAITPIN_INVALID; in gpmc_probe()
2622 pm_runtime_enable(&pdev->dev); in gpmc_probe()
2623 pm_runtime_get_sync(&pdev->dev); in gpmc_probe()
2628 * FIXME: Once device-tree migration is complete the below flags in gpmc_probe()
2629 * should be populated based upon the device-tree compatible in gpmc_probe()
2632 * devices support the addr-addr-data multiplex protocol. in gpmc_probe()
2635 * - OMAP24xx = 2.0 in gpmc_probe()
2636 * - OMAP3xxx = 5.0 in gpmc_probe()
2637 * - OMAP44xx/54xx/AM335x = 6.0 in gpmc_probe()
2643 dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), in gpmc_probe()
2651 gpmc->nirqs = GPMC_NR_NAND_IRQS + gpmc_nr_waitpins; in gpmc_probe()
2654 dev_err(gpmc->dev, "gpmc_setup_irq failed\n"); in gpmc_probe()
2660 gpmc->nb.notifier_call = omap_gpmc_context_notifier; in gpmc_probe()
2661 cpu_pm_register_notifier(&gpmc->nb); in gpmc_probe()
2667 pm_runtime_put_sync(&pdev->dev); in gpmc_probe()
2668 pm_runtime_disable(&pdev->dev); in gpmc_probe()
2678 cpu_pm_unregister_notifier(&gpmc->nb); in gpmc_remove()
2683 pm_runtime_put_sync(&pdev->dev); in gpmc_remove()
2684 pm_runtime_disable(&pdev->dev); in gpmc_remove()
2696 gpmc->is_suspended = 1; in gpmc_suspend()
2707 gpmc->is_suspended = 0; in gpmc_resume()
2717 { .compatible = "ti,omap2420-gpmc" },
2718 { .compatible = "ti,omap2430-gpmc" },
2719 { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */
2720 { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */
2721 { .compatible = "ti,am3352-gpmc" }, /* am335x devices */
2722 { .compatible = "ti,am64-gpmc" },