513  * +-< XVCLK
554  * +-< XVCLK
652 	struct clk *xvclk;  member
667  * XVCLK = 24 MHz
681  * XVCLK = 24 MHz
695  * XVCLK = 24 MHz
1226 	xvclk_rate = clk_get_rate(sensor->xvclk);  in ov5648_mode_pll1_rate()
1872 	 * - XVCLK must be provided 1 ms before register access;  in ov5648_sensor_power()
1907 		ret = clk_prepare_enable(sensor->xvclk);  in ov5648_sensor_power()
1909 			dev_err(sensor->dev, "failed to enable XVCLK clock\n");  in ov5648_sensor_power()
1922 		clk_disable_unprepare(sensor->xvclk);  in ov5648_sensor_power()
2516 	sensor->xvclk = devm_clk_get(dev, NULL);  in ov5648_probe()
2517 	if (IS_ERR(sensor->xvclk)) {  in ov5648_probe()
2519 		ret = PTR_ERR(sensor->xvclk);  in ov5648_probe()
2523 	rate = clk_get_rate(sensor->xvclk);  in ov5648_probe()