Lines Matching refs:ov01a10_write_reg
331 static int ov01a10_write_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 val) in ov01a10_write_reg() function
358 ret = ov01a10_write_reg(ov01a10, r_list->regs[i].address, 1, in ov01a10_write_reg_list()
377 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_B, 3, real); in ov01a10_update_digital_gain()
383 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GB, 3, real); in ov01a10_update_digital_gain()
389 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GR, 3, real); in ov01a10_update_digital_gain()
395 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_R, 3, real); in ov01a10_update_digital_gain()
409 return ov01a10_write_reg(ov01a10, OV01A10_REG_TEST_PATTERN, 1, pattern); in ov01a10_test_pattern()
419 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_X_WIN, 1, offset); in ov01a10_set_hflip()
430 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val); in ov01a10_set_hflip()
439 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_Y_WIN, 1, offset); in ov01a10_set_vflip()
450 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val); in ov01a10_set_vflip()
475 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_ANALOG_GAIN, 2, in ov01a10_set_ctrl()
484 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_EXPOSURE, 2, in ov01a10_set_ctrl()
489 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_VTS, 2, in ov01a10_set_ctrl()
648 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1, in ov01a10_start_streaming()
661 ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1, in ov01a10_stop_streaming()