Lines Matching +full:dma +full:- +full:poll +full:- +full:cnt
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * hfcpci.c low level driver for CCD's hfc-pci based cards
8 * type approval valid for HFC-S PCI A based card
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
16 * NOTE: only one poll value must be given for all cards
19 * poll:
20 * NOTE: only one poll value must be given for all cards
46 static uint poll, tics; variable
53 module_param(poll, uint, S_IRUGO | S_IWUSR);
102 /* marker saving last b-fifo frame count */
141 hc->hw.int_m2 |= HFCPCI_IRQ_ENABLE; in enable_hwirq()
142 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in enable_hwirq()
148 hc->hw.int_m2 &= ~((u_char)HFCPCI_IRQ_ENABLE); in disable_hwirq()
149 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in disable_hwirq()
159 pci_write_config_word(hc->pdev, PCI_COMMAND, 0); in release_io_hfcpci()
160 del_timer(&hc->hw.timer); in release_io_hfcpci()
161 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci()
162 hc->hw.dmahandle); in release_io_hfcpci()
163 iounmap(hc->hw.pci_io); in release_io_hfcpci()
172 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_setmode()
173 hc->hw.clkdel = CLKDEL_NT; /* ST-Bit delay for NT-Mode */ in hfcpci_setmode()
174 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */ in hfcpci_setmode()
175 hc->hw.states = 1; /* G1 */ in hfcpci_setmode()
177 hc->hw.clkdel = CLKDEL_TE; /* ST-Bit delay for TE-Mode */ in hfcpci_setmode()
178 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */ in hfcpci_setmode()
179 hc->hw.states = 2; /* F2 */ in hfcpci_setmode()
181 Write_hfc(hc, HFCPCI_CLKDEL, hc->hw.clkdel); in hfcpci_setmode()
182 Write_hfc(hc, HFCPCI_STATES, HFCPCI_LOAD_STATE | hc->hw.states); in hfcpci_setmode()
184 Write_hfc(hc, HFCPCI_STATES, hc->hw.states | 0x40); /* Deactivate */ in hfcpci_setmode()
185 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in hfcpci_setmode()
196 int cnt = 0; in reset_hfcpci() local
202 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in reset_hfcpci()
205 pci_write_config_word(hc->pdev, PCI_COMMAND, in reset_hfcpci()
208 printk(KERN_DEBUG "HFC-PCI status(%x) before reset\n", val); in reset_hfcpci()
209 hc->hw.cirm = HFCPCI_RESET; /* Reset On */ in reset_hfcpci()
210 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
213 hc->hw.cirm = 0; /* Reset Off */ in reset_hfcpci()
214 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
216 printk(KERN_DEBUG "HFC-PCI status(%x) after reset\n", val); in reset_hfcpci()
217 while (cnt < 50000) { /* max 50000 us */ in reset_hfcpci()
219 cnt += 5; in reset_hfcpci()
224 printk(KERN_DEBUG "HFC-PCI status(%x) after %dus\n", val, cnt); in reset_hfcpci()
226 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
228 hc->hw.bswapped = 0; /* no exchange */ in reset_hfcpci()
229 hc->hw.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
230 hc->hw.trm = HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
231 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
232 hc->hw.sctrl_r = 0; in reset_hfcpci()
233 hc->hw.sctrl_e = HFCPCI_AUTO_AWAKE; /* S/T Auto awake */ in reset_hfcpci()
234 hc->hw.mst_m = 0; in reset_hfcpci()
235 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in reset_hfcpci()
236 hc->hw.mst_m |= HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
237 if (test_bit(HFC_CFG_NEG_F0, &hc->cfg)) in reset_hfcpci()
238 hc->hw.mst_m |= HFCPCI_F0_NEGATIV; in reset_hfcpci()
239 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in reset_hfcpci()
240 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in reset_hfcpci()
241 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in reset_hfcpci()
242 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in reset_hfcpci()
244 hc->hw.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
246 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in reset_hfcpci()
254 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in reset_hfcpci()
255 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in reset_hfcpci()
259 * Slots 0 and 1 are set for B-chan 1 and 2 in reset_hfcpci()
260 * D- and monitor/CI channel are not enabled in reset_hfcpci()
261 * STIO1 is used as output for data, B1+B2 from ST->IOM+HFC in reset_hfcpci()
262 * STIO2 is used as data input, B1+B2 from IOM->ST in reset_hfcpci()
263 * ST B-channel send disabled -> continuous 1s in reset_hfcpci()
266 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in reset_hfcpci()
268 hc->hw.conn = 0x09; in reset_hfcpci()
270 hc->hw.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
271 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in reset_hfcpci()
283 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in reset_hfcpci()
294 hc->hw.timer.expires = jiffies + 75; in hfcpci_Timer()
297 * WriteReg(hc, HFCD_DATA, HFCD_CTMT, hc->hw.ctmt | 0x80); in hfcpci_Timer()
298 * add_timer(&hc->hw.timer); in hfcpci_Timer()
304 * select a b-channel entry matching and active
309 if (test_bit(FLG_ACTIVE, &hc->bch[0].Flags) && in Sel_BCS()
310 (hc->bch[0].nr & channel)) in Sel_BCS()
311 return &hc->bch[0]; in Sel_BCS()
312 else if (test_bit(FLG_ACTIVE, &hc->bch[1].Flags) && in Sel_BCS()
313 (hc->bch[1].nr & channel)) in Sel_BCS()
314 return &hc->bch[1]; in Sel_BCS()
320 * clear the desired B-channel rx fifo
329 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
330 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
332 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
333 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
336 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
337 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
338 hc->hw.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
339 bzr->f1 = MAX_B_FRAMES; in hfcpci_clear_fifo_rx()
340 bzr->f2 = bzr->f1; /* init F pointers to remain constant */ in hfcpci_clear_fifo_rx()
341 bzr->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_rx()
342 bzr->za[MAX_B_FRAMES].z2 = cpu_to_le16( in hfcpci_clear_fifo_rx()
343 le16_to_cpu(bzr->za[MAX_B_FRAMES].z1)); in hfcpci_clear_fifo_rx()
345 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
346 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
350 * clear the desired B-channel tx fifo
358 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
359 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
361 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
362 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
365 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
366 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
367 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
370 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
371 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
372 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2), in hfcpci_clear_fifo_tx()
374 bzt->f2 = MAX_B_FRAMES; in hfcpci_clear_fifo_tx()
375 bzt->f1 = bzt->f2; /* init F pointers to remain constant */ in hfcpci_clear_fifo_tx()
376 bzt->za[MAX_B_FRAMES].z1 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 1); in hfcpci_clear_fifo_tx()
377 bzt->za[MAX_B_FRAMES].z2 = cpu_to_le16(B_FIFO_SIZE + B_SUB_VAL - 2); in hfcpci_clear_fifo_tx()
379 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
380 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
381 if (hc->bch[fifo].debug & DEBUG_HW_BCHANNEL) in hfcpci_clear_fifo_tx()
384 fifo, bzt->f1, bzt->f2, in hfcpci_clear_fifo_tx()
385 le16_to_cpu(bzt->za[MAX_B_FRAMES].z1), in hfcpci_clear_fifo_tx()
386 le16_to_cpu(bzt->za[MAX_B_FRAMES].z2)); in hfcpci_clear_fifo_tx()
390 * read a complete B-frame out of the buffer
400 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_empty_bfifo()
402 zp = &bz->za[bz->f2]; /* point to Z-Regs */ in hfcpci_empty_bfifo()
403 new_z2 = le16_to_cpu(zp->z2) + count; /* new position in fifo */ in hfcpci_empty_bfifo()
405 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_bfifo()
406 new_f2 = (bz->f2 + 1) & MAX_B_FRAMES; in hfcpci_empty_bfifo()
408 (*(bdata + (le16_to_cpu(zp->z1) - B_SUB_VAL)))) { in hfcpci_empty_bfifo()
409 if (bch->debug & DEBUG_HW) in hfcpci_empty_bfifo()
413 bch->err_inv++; in hfcpci_empty_bfifo()
415 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
416 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
418 bch->rx_skb = mI_alloc_skb(count - 3, GFP_ATOMIC); in hfcpci_empty_bfifo()
419 if (!bch->rx_skb) { in hfcpci_empty_bfifo()
423 count -= 3; in hfcpci_empty_bfifo()
424 ptr = skb_put(bch->rx_skb, count); in hfcpci_empty_bfifo()
426 if (le16_to_cpu(zp->z2) + count <= B_FIFO_SIZE + B_SUB_VAL) in hfcpci_empty_bfifo()
429 maxlen = B_FIFO_SIZE + B_SUB_VAL - in hfcpci_empty_bfifo()
430 le16_to_cpu(zp->z2); /* maximum */ in hfcpci_empty_bfifo()
432 ptr1 = bdata + (le16_to_cpu(zp->z2) - B_SUB_VAL); in hfcpci_empty_bfifo()
435 count -= maxlen; in hfcpci_empty_bfifo()
442 bz->za[new_f2].z2 = cpu_to_le16(new_z2); in hfcpci_empty_bfifo()
443 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_bfifo()
449 * D-channel receive procedure
454 struct dchannel *dch = &hc->dch; in receive_dmsg()
462 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg()
463 while (((df->f1 & D_FREG_MASK) != (df->f2 & D_FREG_MASK)) && count--) { in receive_dmsg()
464 zp = &df->za[df->f2 & D_FREG_MASK]; in receive_dmsg()
465 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in receive_dmsg()
469 if (dch->debug & DEBUG_HW_DCHANNEL) in receive_dmsg()
471 "hfcpci recd f1(%d) f2(%d) z1(%x) z2(%x) cnt(%d)\n", in receive_dmsg()
472 df->f1, df->f2, in receive_dmsg()
473 le16_to_cpu(zp->z1), in receive_dmsg()
474 le16_to_cpu(zp->z2), in receive_dmsg()
478 (df->data[le16_to_cpu(zp->z1)])) { in receive_dmsg()
479 if (dch->debug & DEBUG_HW) in receive_dmsg()
484 df->data[le16_to_cpu(zp->z1)]); in receive_dmsg()
486 cs->err_rx++; in receive_dmsg()
488 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
490 df->za[df->f2 & D_FREG_MASK].z2 = in receive_dmsg()
491 cpu_to_le16((le16_to_cpu(zp->z2) + rcnt) & in receive_dmsg()
492 (D_FIFO_SIZE - 1)); in receive_dmsg()
494 dch->rx_skb = mI_alloc_skb(rcnt - 3, GFP_ATOMIC); in receive_dmsg()
495 if (!dch->rx_skb) { in receive_dmsg()
497 "HFC-PCI: D receive out of memory\n"); in receive_dmsg()
501 rcnt -= 3; in receive_dmsg()
502 ptr = skb_put(dch->rx_skb, rcnt); in receive_dmsg()
504 if (le16_to_cpu(zp->z2) + rcnt <= D_FIFO_SIZE) in receive_dmsg()
507 maxlen = D_FIFO_SIZE - le16_to_cpu(zp->z2); in receive_dmsg()
510 ptr1 = df->data + le16_to_cpu(zp->z2); in receive_dmsg()
513 rcnt -= maxlen; in receive_dmsg()
517 ptr1 = df->data; /* start of buffer */ in receive_dmsg()
520 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | in receive_dmsg()
522 df->za[df->f2 & D_FREG_MASK].z2 = cpu_to_le16(( in receive_dmsg()
523 le16_to_cpu(zp->z2) + total) & (D_FIFO_SIZE - 1)); in receive_dmsg()
531 * check for transparent receive data and read max one 'poll' size if avail
541 z1r = &rxbz->za[MAX_B_FRAMES].z1; /* pointer to z reg */ in hfcpci_empty_fifo_trans()
543 z1t = &txbz->za[MAX_B_FRAMES].z1; in hfcpci_empty_fifo_trans()
546 fcnt_rx = le16_to_cpu(*z1r) - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
554 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_fifo_trans()
556 fcnt_tx = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_empty_fifo_trans()
559 /* fcnt_tx contains available bytes in tx-fifo */ in hfcpci_empty_fifo_trans()
560 fcnt_tx = B_FIFO_SIZE - fcnt_tx; in hfcpci_empty_fifo_trans()
561 /* remaining bytes to send (bytes in tx-fifo) */ in hfcpci_empty_fifo_trans()
563 if (test_bit(FLG_RX_OFF, &bch->Flags)) { in hfcpci_empty_fifo_trans()
564 bch->dropcnt += fcnt_rx; in hfcpci_empty_fifo_trans()
570 pr_warn("B%d: No bufferspace for %d bytes\n", bch->nr, fcnt_rx); in hfcpci_empty_fifo_trans()
572 ptr = skb_put(bch->rx_skb, fcnt_rx); in hfcpci_empty_fifo_trans()
576 maxlen = B_FIFO_SIZE + B_SUB_VAL - le16_to_cpu(*z2r); in hfcpci_empty_fifo_trans()
579 ptr1 = bdata + (le16_to_cpu(*z2r) - B_SUB_VAL); in hfcpci_empty_fifo_trans()
582 fcnt_rx -= maxlen; in hfcpci_empty_fifo_trans()
595 * B-channel main receive routine
600 struct hfc_pci *hc = bch->hw; in main_rec_hfcpci()
607 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in main_rec_hfcpci()
608 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
609 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in main_rec_hfcpci()
610 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
613 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
614 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in main_rec_hfcpci()
615 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
619 count--; in main_rec_hfcpci()
620 if (rxbz->f1 != rxbz->f2) { in main_rec_hfcpci()
621 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
623 bch->nr, rxbz->f1, rxbz->f2); in main_rec_hfcpci()
624 zp = &rxbz->za[rxbz->f2]; in main_rec_hfcpci()
626 rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2); in main_rec_hfcpci()
630 if (bch->debug & DEBUG_HW_BCHANNEL) in main_rec_hfcpci()
632 "hfcpci rec ch(%x) z1(%x) z2(%x) cnt(%d)\n", in main_rec_hfcpci()
633 bch->nr, le16_to_cpu(zp->z1), in main_rec_hfcpci()
634 le16_to_cpu(zp->z2), rcnt); in main_rec_hfcpci()
636 rcnt = rxbz->f1 - rxbz->f2; in main_rec_hfcpci()
639 if (hc->hw.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
643 hc->hw.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
648 } else if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in main_rec_hfcpci()
659 * D-channel send routine
664 struct dchannel *dch = &hc->dch; in hfcpci_fill_dfifo()
670 if ((dch->debug & DEBUG_HW_DCHANNEL) && !(dch->debug & DEBUG_HW_DFIFO)) in hfcpci_fill_dfifo()
673 if (!dch->tx_skb) in hfcpci_fill_dfifo()
675 count = dch->tx_skb->len - dch->tx_idx; in hfcpci_fill_dfifo()
678 df = &((union fifo_area *) (hc->hw.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
680 if (dch->debug & DEBUG_HW_DFIFO) in hfcpci_fill_dfifo()
682 df->f1, df->f2, in hfcpci_fill_dfifo()
683 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1)); in hfcpci_fill_dfifo()
684 fcnt = df->f1 - df->f2; /* frame count actually buffered */ in hfcpci_fill_dfifo()
687 if (fcnt > (MAX_D_FRAMES - 1)) { in hfcpci_fill_dfifo()
688 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
692 cs->err_tx++; in hfcpci_fill_dfifo()
697 maxlen = le16_to_cpu(df->za[df->f2 & D_FREG_MASK].z2) - in hfcpci_fill_dfifo()
698 le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) - 1; in hfcpci_fill_dfifo()
702 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
706 if (dch->debug & DEBUG_HW_DCHANNEL) in hfcpci_fill_dfifo()
710 new_z1 = (le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1) + count) & in hfcpci_fill_dfifo()
711 (D_FIFO_SIZE - 1); in hfcpci_fill_dfifo()
712 new_f1 = ((df->f1 + 1) & D_FREG_MASK) | (D_FREG_MASK + 1); in hfcpci_fill_dfifo()
713 src = dch->tx_skb->data + dch->tx_idx; /* source pointer */ in hfcpci_fill_dfifo()
714 dst = df->data + le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
715 maxlen = D_FIFO_SIZE - le16_to_cpu(df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
721 count -= maxlen; /* remaining bytes */ in hfcpci_fill_dfifo()
723 dst = df->data; /* start of buffer */ in hfcpci_fill_dfifo()
727 df->za[new_f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
729 df->za[df->f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); in hfcpci_fill_dfifo()
731 df->f1 = new_f1; /* next frame */ in hfcpci_fill_dfifo()
732 dch->tx_idx = dch->tx_skb->len; in hfcpci_fill_dfifo()
736 * B-channel send routine
741 struct hfc_pci *hc = bch->hw; in hfcpci_fill_fifo()
749 if ((bch->debug & DEBUG_HW_BCHANNEL) && !(bch->debug & DEBUG_HW_BFIFO)) in hfcpci_fill_fifo()
751 if ((!bch->tx_skb) || bch->tx_skb->len == 0) { in hfcpci_fill_fifo()
752 if (!test_bit(FLG_FILLEMPTY, &bch->Flags) && in hfcpci_fill_fifo()
753 !test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcpci_fill_fifo()
757 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
759 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in hfcpci_fill_fifo()
760 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
761 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
763 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
764 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
767 if (test_bit(FLG_TRANSPARENT, &bch->Flags)) { in hfcpci_fill_fifo()
768 z1t = &bz->za[MAX_B_FRAMES].z1; in hfcpci_fill_fifo()
770 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
772 "cnt(%d) z1(%x) z2(%x)\n", bch->nr, count, in hfcpci_fill_fifo()
774 fcnt = le16_to_cpu(*z2t) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
777 if (test_bit(FLG_FILLEMPTY, &bch->Flags)) { in hfcpci_fill_fifo()
784 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
785 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
786 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
788 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
794 memset(dst, bch->fill[0], maxlen); /* first copy */ in hfcpci_fill_fifo()
795 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
798 memset(dst, bch->fill[0], count); in hfcpci_fill_fifo()
804 fcnt = B_FIFO_SIZE - fcnt; in hfcpci_fill_fifo()
808 count = bch->tx_skb->len - bch->tx_idx; in hfcpci_fill_fifo()
809 /* maximum fill shall be poll*2 */ in hfcpci_fill_fifo()
810 if (count > (poll << 1) - fcnt) in hfcpci_fill_fifo()
811 count = (poll << 1) - fcnt; in hfcpci_fill_fifo()
818 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
819 src = bch->tx_skb->data + bch->tx_idx; in hfcpci_fill_fifo()
821 dst = bdata + (le16_to_cpu(*z1t) - B_SUB_VAL); in hfcpci_fill_fifo()
822 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(*z1t); in hfcpci_fill_fifo()
824 if (bch->debug & DEBUG_HW_BFIFO) in hfcpci_fill_fifo()
829 bch->tx_idx += count; in hfcpci_fill_fifo()
833 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
840 if (bch->tx_idx < bch->tx_skb->len) in hfcpci_fill_fifo()
842 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
847 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
850 __func__, bch->nr, bz->f1, bz->f2, in hfcpci_fill_fifo()
851 bz->za[bz->f1].z1); in hfcpci_fill_fifo()
852 fcnt = bz->f1 - bz->f2; /* frame count actually buffered */ in hfcpci_fill_fifo()
855 if (fcnt > (MAX_B_FRAMES - 1)) { in hfcpci_fill_fifo()
856 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
862 maxlen = le16_to_cpu(bz->za[bz->f2].z2) - in hfcpci_fill_fifo()
863 le16_to_cpu(bz->za[bz->f1].z1) - 1; in hfcpci_fill_fifo()
867 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
869 bch->nr, count, maxlen); in hfcpci_fill_fifo()
872 if (bch->debug & DEBUG_HW_BCHANNEL) in hfcpci_fill_fifo()
876 new_z1 = le16_to_cpu(bz->za[bz->f1].z1) + count; in hfcpci_fill_fifo()
879 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
881 new_f1 = ((bz->f1 + 1) & MAX_B_FRAMES); in hfcpci_fill_fifo()
882 src = bch->tx_skb->data + bch->tx_idx; /* source pointer */ in hfcpci_fill_fifo()
883 dst = bdata + (le16_to_cpu(bz->za[bz->f1].z1) - B_SUB_VAL); in hfcpci_fill_fifo()
884 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - le16_to_cpu(bz->za[bz->f1].z1); in hfcpci_fill_fifo()
890 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
896 bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */ in hfcpci_fill_fifo()
897 bz->f1 = new_f1; /* next frame */ in hfcpci_fill_fifo()
898 dev_kfree_skb_any(bch->tx_skb); in hfcpci_fill_fifo()
911 if (dch->debug) in ph_state_te()
913 __func__, dch->state); in ph_state_te()
914 switch (dch->state) { in ph_state_te()
916 l1_event(dch->l1, HW_RESET_IND); in ph_state_te()
919 l1_event(dch->l1, HW_DEACT_IND); in ph_state_te()
923 l1_event(dch->l1, ANYSIGNAL); in ph_state_te()
926 l1_event(dch->l1, INFO2); in ph_state_te()
929 l1_event(dch->l1, INFO4_P8); in ph_state_te()
940 struct hfc_pci *hc = dch->hw; in handle_nt_timer3()
942 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in handle_nt_timer3()
943 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in handle_nt_timer3()
944 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in handle_nt_timer3()
945 hc->hw.nt_timer = 0; in handle_nt_timer3()
946 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in handle_nt_timer3()
947 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in handle_nt_timer3()
948 hc->hw.mst_m |= HFCPCI_MASTER; in handle_nt_timer3()
949 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in handle_nt_timer3()
950 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in handle_nt_timer3()
957 struct hfc_pci *hc = dch->hw; in ph_state_nt()
959 if (dch->debug) in ph_state_nt()
961 __func__, dch->state); in ph_state_nt()
962 switch (dch->state) { in ph_state_nt()
964 if (hc->hw.nt_timer < 0) { in ph_state_nt()
965 hc->hw.nt_timer = 0; in ph_state_nt()
966 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
967 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
968 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
969 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
975 dch->state = 4; in ph_state_nt()
976 } else if (hc->hw.nt_timer == 0) { in ph_state_nt()
977 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
978 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
979 hc->hw.nt_timer = NT_T1_COUNT; in ph_state_nt()
980 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
981 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
982 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
984 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
985 test_and_set_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
986 /* allow G2 -> G3 transition */ in ph_state_nt()
993 hc->hw.nt_timer = 0; in ph_state_nt()
994 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
995 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
996 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
997 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
998 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_nt()
999 hc->hw.mst_m &= ~HFCPCI_MASTER; in ph_state_nt()
1000 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in ph_state_nt()
1001 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in ph_state_nt()
1002 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_nt()
1006 hc->hw.nt_timer = 0; in ph_state_nt()
1007 test_and_clear_bit(FLG_HFC_TIMER_T3, &dch->Flags); in ph_state_nt()
1008 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1009 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
1010 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1013 if (!test_and_set_bit(FLG_HFC_TIMER_T3, &dch->Flags)) { in ph_state_nt()
1015 &dch->Flags)) { in ph_state_nt()
1019 test_and_clear_bit(FLG_HFC_TIMER_T1, &dch->Flags); in ph_state_nt()
1020 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
1021 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1022 hc->hw.nt_timer = NT_T3_COUNT; in ph_state_nt()
1023 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
1024 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
1025 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
1035 struct hfc_pci *hc = dch->hw; in ph_state()
1037 if (hc->hw.protocol == ISDN_P_NT_S0) { in ph_state()
1038 if (test_bit(FLG_HFC_TIMER_T3, &dch->Flags) && in ph_state()
1039 hc->hw.nt_timer < 0) in ph_state()
1053 struct hfc_pci *hc = dch->hw; in hfc_l1callback()
1058 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1059 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1060 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1067 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfc_l1callback()
1068 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1069 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1072 l1_event(dch->l1, HW_POWERUP_IND); in hfc_l1callback()
1075 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfc_l1callback()
1076 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1077 skb_queue_purge(&dch->squeue); in hfc_l1callback()
1078 if (dch->tx_skb) { in hfc_l1callback()
1079 dev_kfree_skb(dch->tx_skb); in hfc_l1callback()
1080 dch->tx_skb = NULL; in hfc_l1callback()
1082 dch->tx_idx = 0; in hfc_l1callback()
1083 if (dch->rx_skb) { in hfc_l1callback()
1084 dev_kfree_skb(dch->rx_skb); in hfc_l1callback()
1085 dch->rx_skb = NULL; in hfc_l1callback()
1087 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfc_l1callback()
1088 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfc_l1callback()
1089 del_timer(&dch->timer); in hfc_l1callback()
1095 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1096 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1100 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfc_l1callback()
1101 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfc_l1callback()
1105 if (dch->debug & DEBUG_HW) in hfc_l1callback()
1108 return -1; in hfc_l1callback()
1119 if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) in tx_birq()
1122 dev_kfree_skb_any(bch->tx_skb); in tx_birq()
1131 if (dch->tx_skb && dch->tx_idx < dch->tx_skb->len) in tx_dirq()
1132 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1134 dev_kfree_skb(dch->tx_skb); in tx_dirq()
1136 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1148 spin_lock(&hc->lock); in hfcpci_int()
1149 if (!(hc->hw.int_m2 & 0x08)) { in hfcpci_int()
1150 spin_unlock(&hc->lock); in hfcpci_int()
1156 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1158 "HFC-PCI: stat(%02x) s1(%02x)\n", stat, val); in hfcpci_int()
1161 spin_unlock(&hc->lock); in hfcpci_int()
1164 hc->irqcnt++; in hfcpci_int()
1166 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1167 printk(KERN_DEBUG "HFC-PCI irq %x\n", val); in hfcpci_int()
1168 val &= hc->hw.int_m1; in hfcpci_int()
1171 if (hc->dch.debug & DEBUG_HW_DCHANNEL) in hfcpci_int()
1172 printk(KERN_DEBUG "ph_state chg %d->%d\n", in hfcpci_int()
1173 hc->dch.state, exval); in hfcpci_int()
1174 hc->dch.state = exval; in hfcpci_int()
1175 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1179 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_int()
1180 if ((--hc->hw.nt_timer) < 0) in hfcpci_int()
1181 schedule_event(&hc->dch, FLG_PHCHANGE); in hfcpci_int()
1184 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | HFCPCI_CLTIMER); in hfcpci_int()
1187 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1190 else if (hc->dch.debug) in hfcpci_int()
1197 else if (hc->dch.debug) in hfcpci_int()
1201 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1204 else if (hc->dch.debug) in hfcpci_int()
1211 else if (hc->dch.debug) in hfcpci_int()
1217 if (test_and_clear_bit(FLG_BUSY_TIMER, &hc->dch.Flags)) in hfcpci_int()
1218 del_timer(&hc->dch.timer); in hfcpci_int()
1219 tx_dirq(&hc->dch); in hfcpci_int()
1221 spin_unlock(&hc->lock); in hfcpci_int()
1226 * timer callback for D-chan busy resolution. Currently no function
1239 struct hfc_pci *hc = bch->hw; in mode_hfcpci()
1243 if (bch->debug & DEBUG_HW_BCHANNEL) in mode_hfcpci()
1245 "HFCPCI bchannel protocol %x-->%x ch %x-->%x\n", in mode_hfcpci()
1246 bch->state, protocol, bch->nr, bc); in mode_hfcpci()
1251 if (!test_bit(HFC_CFG_PCM, &hc->cfg)) in mode_hfcpci()
1258 } else if (test_bit(HFC_CFG_PCM, &hc->cfg) && (protocol > ISDN_P_NONE)) in mode_hfcpci()
1261 if (hc->chanlimit > 1) { in mode_hfcpci()
1262 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1263 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1267 hc->hw.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1268 hc->hw.sctrl_e |= 0x80; in mode_hfcpci()
1270 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1271 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1275 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1276 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1280 case (-1): /* used for init */ in mode_hfcpci()
1281 bch->state = -1; in mode_hfcpci()
1282 bch->nr = bc; in mode_hfcpci()
1285 if (bch->state == ISDN_P_NONE) in mode_hfcpci()
1288 hc->hw.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1289 hc->hw.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1291 hc->hw.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1292 hc->hw.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1295 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1296 hc->hw.int_m1 &= ~(HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1299 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1300 hc->hw.int_m1 &= ~(HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1304 if (bch->nr & 2) in mode_hfcpci()
1305 hc->hw.cirm &= 0x7f; in mode_hfcpci()
1307 hc->hw.cirm &= 0xbf; in mode_hfcpci()
1309 bch->state = ISDN_P_NONE; in mode_hfcpci()
1310 bch->nr = bc; in mode_hfcpci()
1311 test_and_clear_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1312 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1315 bch->state = protocol; in mode_hfcpci()
1316 bch->nr = bc; in mode_hfcpci()
1320 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1321 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1323 hc->hw.cirm |= 0x80; in mode_hfcpci()
1326 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1327 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1329 hc->hw.cirm |= 0x40; in mode_hfcpci()
1333 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1335 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1337 hc->hw.ctmt |= 2; in mode_hfcpci()
1338 hc->hw.conn &= ~0x18; in mode_hfcpci()
1340 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1342 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1344 hc->hw.ctmt |= 1; in mode_hfcpci()
1345 hc->hw.conn &= ~0x03; in mode_hfcpci()
1347 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags); in mode_hfcpci()
1350 bch->state = protocol; in mode_hfcpci()
1351 bch->nr = bc; in mode_hfcpci()
1355 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1356 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1358 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1359 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1362 hc->hw.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1363 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1364 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1366 hc->hw.ctmt &= ~2; in mode_hfcpci()
1367 hc->hw.conn &= ~0x18; in mode_hfcpci()
1369 hc->hw.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1370 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1371 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1373 hc->hw.ctmt &= ~1; in mode_hfcpci()
1374 hc->hw.conn &= ~0x03; in mode_hfcpci()
1376 test_and_set_bit(FLG_HDLC, &bch->Flags); in mode_hfcpci()
1380 return -ENOPROTOOPT; in mode_hfcpci()
1382 if (test_bit(HFC_CFG_PCM, &hc->cfg)) { in mode_hfcpci()
1384 (protocol == -1)) { /* init case */ in mode_hfcpci()
1388 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) { in mode_hfcpci()
1397 hc->hw.conn &= 0xc7; in mode_hfcpci()
1398 hc->hw.conn |= 0x08; in mode_hfcpci()
1406 hc->hw.conn &= 0xf8; in mode_hfcpci()
1407 hc->hw.conn |= 0x01; in mode_hfcpci()
1416 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in mode_hfcpci()
1417 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in mode_hfcpci()
1418 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in mode_hfcpci()
1419 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in mode_hfcpci()
1420 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in mode_hfcpci()
1421 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in mode_hfcpci()
1422 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in mode_hfcpci()
1424 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in mode_hfcpci()
1432 struct hfc_pci *hc = bch->hw; in set_hfcpci_rxtest()
1434 if (bch->debug & DEBUG_HW_BCHANNEL) in set_hfcpci_rxtest()
1436 "HFCPCI bchannel test rx protocol %x-->%x ch %x-->%x\n", in set_hfcpci_rxtest()
1437 bch->state, protocol, bch->nr, chan); in set_hfcpci_rxtest()
1438 if (bch->nr != chan) { in set_hfcpci_rxtest()
1441 bch->nr, chan); in set_hfcpci_rxtest()
1442 return -EINVAL; in set_hfcpci_rxtest()
1446 bch->state = protocol; in set_hfcpci_rxtest()
1449 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1450 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1452 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1453 hc->hw.ctmt |= 2; in set_hfcpci_rxtest()
1454 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1456 hc->hw.cirm |= 0x80; in set_hfcpci_rxtest()
1459 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1460 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1462 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1463 hc->hw.ctmt |= 1; in set_hfcpci_rxtest()
1464 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1466 hc->hw.cirm |= 0x40; in set_hfcpci_rxtest()
1471 bch->state = protocol; in set_hfcpci_rxtest()
1474 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1475 hc->hw.last_bfifo_cnt[1] = 0; in set_hfcpci_rxtest()
1476 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1477 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1478 hc->hw.ctmt &= ~2; in set_hfcpci_rxtest()
1479 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1481 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1482 hc->hw.last_bfifo_cnt[0] = 0; in set_hfcpci_rxtest()
1483 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1484 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1485 hc->hw.ctmt &= ~1; in set_hfcpci_rxtest()
1486 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1491 return -ENOPROTOOPT; in set_hfcpci_rxtest()
1493 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in set_hfcpci_rxtest()
1494 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in set_hfcpci_rxtest()
1495 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in set_hfcpci_rxtest()
1496 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in set_hfcpci_rxtest()
1497 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in set_hfcpci_rxtest()
1499 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in set_hfcpci_rxtest()
1507 struct hfc_pci *hc = bch->hw; in deactivate_bchannel()
1510 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
1512 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in deactivate_bchannel()
1513 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
1517 * Layer 1 B-channel hardware access
1528 struct hfc_pci *hc = bch->hw; in hfc_bctrl()
1529 int ret = -EINVAL; in hfc_bctrl()
1532 if (bch->debug & DEBUG_HW) in hfc_bctrl()
1536 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1538 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1541 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1543 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1546 spin_lock_irqsave(&hc->lock, flags); in hfc_bctrl()
1547 mode_hfcpci(bch, bch->nr, ISDN_P_NONE); in hfc_bctrl()
1548 spin_unlock_irqrestore(&hc->lock, flags); in hfc_bctrl()
1552 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfc_bctrl()
1554 ch->protocol = ISDN_P_NONE; in hfc_bctrl()
1555 ch->peer = NULL; in hfc_bctrl()
1570 * Layer2 -> Layer 1 Dchannel data
1577 struct hfc_pci *hc = dch->hw; in hfcpci_l2l1D()
1578 int ret = -EINVAL; in hfcpci_l2l1D()
1583 switch (hh->prim) { in hfcpci_l2l1D()
1585 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1588 id = hh->id; /* skb can be freed */ in hfcpci_l2l1D()
1589 hfcpci_fill_dfifo(dch->hw); in hfcpci_l2l1D()
1591 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1594 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1597 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1598 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1600 if (test_bit(HFC_CFG_MASTER, &hc->cfg)) in hfcpci_l2l1D()
1601 hc->hw.mst_m |= HFCPCI_MASTER; in hfcpci_l2l1D()
1602 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1603 if (test_bit(FLG_ACTIVE, &dch->Flags)) { in hfcpci_l2l1D()
1604 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1605 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in hfcpci_l2l1D()
1609 test_and_set_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1613 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1614 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1617 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in hfcpci_l2l1D()
1618 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1D()
1619 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1625 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcpci_l2l1D()
1626 if (dch->tx_skb) { in hfcpci_l2l1D()
1627 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcpci_l2l1D()
1628 dch->tx_skb = NULL; in hfcpci_l2l1D()
1630 dch->tx_idx = 0; in hfcpci_l2l1D()
1631 if (dch->rx_skb) { in hfcpci_l2l1D()
1632 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcpci_l2l1D()
1633 dch->rx_skb = NULL; in hfcpci_l2l1D()
1635 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcpci_l2l1D()
1636 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcpci_l2l1D()
1637 del_timer(&dch->timer); in hfcpci_l2l1D()
1639 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in hfcpci_l2l1D()
1640 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in hfcpci_l2l1D()
1642 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfcpci_l2l1D()
1643 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1645 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1648 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1649 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1D()
1659 * Layer2 -> Layer 1 Bchannel data
1665 struct hfc_pci *hc = bch->hw; in hfcpci_l2l1B()
1666 int ret = -EINVAL; in hfcpci_l2l1B()
1670 switch (hh->prim) { in hfcpci_l2l1B()
1672 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1678 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1681 spin_lock_irqsave(&hc->lock, flags); in hfcpci_l2l1B()
1682 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) in hfcpci_l2l1B()
1683 ret = mode_hfcpci(bch, bch->nr, ch->protocol); in hfcpci_l2l1B()
1686 spin_unlock_irqrestore(&hc->lock, flags); in hfcpci_l2l1B()
1711 timer_setup(&hc->dch.timer, hfcpci_dbusy_timer, 0); in inithfcpci()
1712 hc->chanlimit = 2; in inithfcpci()
1713 mode_hfcpci(&hc->bch[0], 1, -1); in inithfcpci()
1714 mode_hfcpci(&hc->bch[1], 2, -1); in inithfcpci()
1721 int cnt = 3; in init_card() local
1727 spin_lock_irqsave(&hc->lock, flags); in init_card()
1729 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1730 if (request_irq(hc->irq, hfcpci_int, IRQF_SHARED, "HFC PCI", hc)) { in init_card()
1732 "mISDN: couldn't get interrupt %d\n", hc->irq); in init_card()
1733 return -EIO; in init_card()
1735 spin_lock_irqsave(&hc->lock, flags); in init_card()
1737 while (cnt) { in init_card()
1745 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1750 hc->irq, hc->irqcnt); in init_card()
1752 spin_lock_irqsave(&hc->lock, flags); in init_card()
1753 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in init_card()
1754 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in init_card()
1756 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in init_card()
1757 if (!hc->irqcnt) { in init_card()
1760 "during init %d\n", hc->irq, 4 - cnt); in init_card()
1761 if (cnt == 1) in init_card()
1765 cnt--; in init_card()
1768 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1769 hc->initdone = 1; in init_card()
1774 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
1775 free_irq(hc->irq, hc); in init_card()
1776 return -EIO; in init_card()
1785 switch (cq->op) { in channel_ctrl()
1787 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_CONNECT | in channel_ctrl()
1792 if (cq->channel < 0 || cq->channel > 2) { in channel_ctrl()
1793 ret = -EINVAL; in channel_ctrl()
1796 if (cq->channel & 1) { in channel_ctrl()
1797 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1805 hc->hw.conn = (hc->hw.conn & ~7) | 6; in channel_ctrl()
1806 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1808 if (cq->channel & 2) { in channel_ctrl()
1809 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1817 hc->hw.conn = (hc->hw.conn & ~0x38) | 0x30; in channel_ctrl()
1818 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1820 if (cq->channel & 3) in channel_ctrl()
1821 hc->hw.trm |= 0x80; /* enable IOM-loop */ in channel_ctrl()
1823 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1824 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1825 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1827 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1830 if (cq->channel == cq->p1) { in channel_ctrl()
1831 ret = -EINVAL; in channel_ctrl()
1834 if (cq->channel < 1 || cq->channel > 2 || in channel_ctrl()
1835 cq->p1 < 1 || cq->p1 > 2) { in channel_ctrl()
1836 ret = -EINVAL; in channel_ctrl()
1839 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1847 if (test_bit(HFC_CFG_SW_DD_DU, &hc->cfg)) in channel_ctrl()
1855 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x36; in channel_ctrl()
1856 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1857 hc->hw.trm |= 0x80; in channel_ctrl()
1858 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1861 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1862 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1863 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1866 ret = l1_event(hc->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_ctrl()
1870 __func__, cq->op); in channel_ctrl()
1871 ret = -EINVAL; in channel_ctrl()
1885 hc->dch.dev.id, __builtin_return_address(0)); in open_dchannel()
1886 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
1887 return -EINVAL; in open_dchannel()
1888 if (rq->adr.channel == 1) { in open_dchannel()
1889 /* TODO: E-Channel */ in open_dchannel()
1890 return -EINVAL; in open_dchannel()
1892 if (!hc->initdone) { in open_dchannel()
1893 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1894 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1898 hc->hw.protocol = rq->protocol; in open_dchannel()
1899 ch->protocol = rq->protocol; in open_dchannel()
1904 if (rq->protocol != ch->protocol) { in open_dchannel()
1905 if (hc->hw.protocol == ISDN_P_TE_S0) in open_dchannel()
1906 l1_event(hc->dch.l1, CLOSE_CHANNEL); in open_dchannel()
1907 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
1908 err = create_l1(&hc->dch, hfc_l1callback); in open_dchannel()
1912 hc->hw.protocol = rq->protocol; in open_dchannel()
1913 ch->protocol = rq->protocol; in open_dchannel()
1918 if (((ch->protocol == ISDN_P_NT_S0) && (hc->dch.state == 3)) || in open_dchannel()
1919 ((ch->protocol == ISDN_P_TE_S0) && (hc->dch.state == 7))) { in open_dchannel()
1923 rq->ch = ch; in open_dchannel()
1934 if (rq->adr.channel == 0 || rq->adr.channel > 2) in open_bchannel()
1935 return -EINVAL; in open_bchannel()
1936 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
1937 return -EINVAL; in open_bchannel()
1938 bch = &hc->bch[rq->adr.channel - 1]; in open_bchannel()
1939 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
1940 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
1941 bch->ch.protocol = rq->protocol; in open_bchannel()
1942 rq->ch = &bch->ch; /* TODO: E-channel */ in open_bchannel()
1956 struct hfc_pci *hc = dch->hw; in hfc_dctrl()
1960 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1966 if ((rq->protocol == ISDN_P_TE_S0) || in hfc_dctrl()
1967 (rq->protocol == ISDN_P_NT_S0)) in hfc_dctrl()
1975 __func__, hc->dch.dev.id, in hfc_dctrl()
1983 if (dch->debug & DEBUG_HW) in hfc_dctrl()
1986 return -EINVAL; in hfc_dctrl()
1996 printk(KERN_INFO "mISDN: HFC-PCI driver %s\n", hfcpci_revision); in setup_hw()
1997 hc->hw.cirm = 0; in setup_hw()
1998 hc->dch.state = 0; in setup_hw()
1999 pci_set_master(hc->pdev); in setup_hw()
2000 if (!hc->irq) { in setup_hw()
2001 printk(KERN_WARNING "HFC-PCI: No IRQ for PCI card found\n"); in setup_hw()
2002 return -EINVAL; in setup_hw()
2004 hc->hw.pci_io = in setup_hw()
2005 (char __iomem *)(unsigned long)hc->pdev->resource[1].start; in setup_hw()
2007 if (!hc->hw.pci_io) { in setup_hw()
2008 printk(KERN_WARNING "HFC-PCI: No IO-Mem for PCI card found\n"); in setup_hw()
2009 return -ENOMEM; in setup_hw()
2013 if (dma_set_mask(&hc->pdev->dev, 0xFFFF8000)) { in setup_hw()
2015 "HFC-PCI: No usable DMA configuration!\n"); in setup_hw()
2016 return -EIO; in setup_hw()
2018 buffer = dma_alloc_coherent(&hc->pdev->dev, 0x8000, &hc->hw.dmahandle, in setup_hw()
2023 "HFC-PCI: Error allocating memory for FIFO!\n"); in setup_hw()
2024 return -ENOMEM; in setup_hw()
2026 hc->hw.fifos = buffer; in setup_hw()
2027 pci_write_config_dword(hc->pdev, 0x80, hc->hw.dmahandle); in setup_hw()
2028 hc->hw.pci_io = ioremap((ulong) hc->hw.pci_io, 256); in setup_hw()
2029 if (unlikely(!hc->hw.pci_io)) { in setup_hw()
2031 "HFC-PCI: Error in ioremap for PCI!\n"); in setup_hw()
2032 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in setup_hw()
2033 hc->hw.dmahandle); in setup_hw()
2034 return -ENOMEM; in setup_hw()
2038 "HFC-PCI: defined at mem %#lx fifo %p(%pad) IRQ %d HZ %d\n", in setup_hw()
2039 (u_long) hc->hw.pci_io, hc->hw.fifos, in setup_hw()
2040 &hc->hw.dmahandle, hc->irq, HZ); in setup_hw()
2043 pci_write_config_word(hc->pdev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_hw()
2044 hc->hw.int_m2 = 0; in setup_hw()
2046 hc->hw.int_m1 = 0; in setup_hw()
2047 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in setup_hw()
2050 timer_setup(&hc->hw.timer, hfcpci_Timer, 0); in setup_hw()
2052 test_and_set_bit(HFC_CFG_MASTER, &hc->cfg); in setup_hw()
2060 spin_lock_irqsave(&hc->lock, flags); in release_card()
2061 hc->hw.int_m2 = 0; /* interrupt output off ! */ in release_card()
2063 mode_hfcpci(&hc->bch[0], 1, ISDN_P_NONE); in release_card()
2064 mode_hfcpci(&hc->bch[1], 2, ISDN_P_NONE); in release_card()
2065 if (hc->dch.timer.function != NULL) { in release_card()
2066 del_timer(&hc->dch.timer); in release_card()
2067 hc->dch.timer.function = NULL; in release_card()
2069 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
2070 if (hc->hw.protocol == ISDN_P_TE_S0) in release_card()
2071 l1_event(hc->dch.l1, CLOSE_CHANNEL); in release_card()
2072 if (hc->initdone) in release_card()
2073 free_irq(hc->irq, hc); in release_card()
2075 mISDN_unregister_device(&hc->dch.dev); in release_card()
2076 mISDN_freebchannel(&hc->bch[1]); in release_card()
2077 mISDN_freebchannel(&hc->bch[0]); in release_card()
2078 mISDN_freedchannel(&hc->dch); in release_card()
2079 pci_set_drvdata(hc->pdev, NULL); in release_card()
2086 int err = -EINVAL; in setup_card()
2090 card->dch.debug = debug; in setup_card()
2091 spin_lock_init(&card->lock); in setup_card()
2092 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, ph_state); in setup_card()
2093 card->dch.hw = card; in setup_card()
2094 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in setup_card()
2095 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in setup_card()
2097 card->dch.dev.D.send = hfcpci_l2l1D; in setup_card()
2098 card->dch.dev.D.ctrl = hfc_dctrl; in setup_card()
2099 card->dch.dev.nrbchan = 2; in setup_card()
2101 card->bch[i].nr = i + 1; in setup_card()
2102 set_channelmap(i + 1, card->dch.dev.channelmap); in setup_card()
2103 card->bch[i].debug = debug; in setup_card()
2104 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, poll >> 1); in setup_card()
2105 card->bch[i].hw = card; in setup_card()
2106 card->bch[i].ch.send = hfcpci_l2l1B; in setup_card()
2107 card->bch[i].ch.ctrl = hfc_bctrl; in setup_card()
2108 card->bch[i].ch.nr = i + 1; in setup_card()
2109 list_add(&card->bch[i].ch.list, &card->dch.dev.bchannels); in setup_card()
2114 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-pci.%d", HFC_cnt + 1); in setup_card()
2115 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, name); in setup_card()
2122 mISDN_freebchannel(&card->bch[1]); in setup_card()
2123 mISDN_freebchannel(&card->bch[0]); in setup_card()
2124 mISDN_freedchannel(&card->dch); in setup_card()
2152 {HFC_BERKOM_TCONCEPT, 0, "German telekom T-Concept"},
2164 {HFC_SITECOM_DC105V2, 0, "Sitecom Connectivity DC-105 ISDN TA"},
2222 int err = -ENOMEM; in hfc_probe()
2224 struct _hfc_map *m = (struct _hfc_map *)ent->driver_data; in hfc_probe()
2231 card->pdev = pdev; in hfc_probe()
2232 card->subtype = m->subtype; in hfc_probe()
2240 m->name, pci_name(pdev)); in hfc_probe()
2242 card->irq = pdev->irq; in hfc_probe()
2279 if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) { in _hfcpci_softirq()
2280 spin_lock_irq(&hc->lock); in _hfcpci_softirq()
2281 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in _hfcpci_softirq()
2282 if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */ in _hfcpci_softirq()
2286 bch = Sel_BCS(hc, hc->hw.bswapped ? 1 : 2); in _hfcpci_softirq()
2287 if (bch && bch->state == ISDN_P_B_RAW) { /* B2 rx&tx */ in _hfcpci_softirq()
2291 spin_unlock_irq(&hc->lock); in _hfcpci_softirq()
2303 if ((s32)(hfc_jiffies + tics - jiffies) <= 0) in hfcpci_softirq()
2316 if (!poll) in HFC_init()
2317 poll = HFCPCI_BTRANS_THRESHOLD; in HFC_init()
2319 if (poll != HFCPCI_BTRANS_THRESHOLD) { in HFC_init()
2320 tics = (poll * HZ) / 8000; in HFC_init()
2323 poll = (tics * 8000) / HZ; in HFC_init()
2324 if (poll > 256 || poll < 8) { in HFC_init()
2325 printk(KERN_ERR "%s: Wrong poll value %d not in range " in HFC_init()
2326 "of 8..256.\n", __func__, poll); in HFC_init()
2327 err = -EINVAL; in HFC_init()
2331 if (poll != HFCPCI_BTRANS_THRESHOLD) { in HFC_init()
2332 printk(KERN_INFO "%s: Using alternative poll value of %d\n", in HFC_init()
2333 __func__, poll); in HFC_init()