890 	struct arm_smmu_smr *smr = smmu->smrs + idx;  in arm_smmu_write_smr()  local
891 	u32 reg = FIELD_PREP(ARM_SMMU_SMR_ID, smr->id) |  in arm_smmu_write_smr()
892 		  FIELD_PREP(ARM_SMMU_SMR_MASK, smr->mask);  in arm_smmu_write_smr()
894 	if (!(smmu->features & ARM_SMMU_FEAT_EXIDS) && smr->valid)  in arm_smmu_write_smr()
927  * The width of SMR's mask field depends on sCR0_EXIDENABLE, so this function
932 	u32 smr;  in arm_smmu_test_smr_masks()  local
941 	 * Somewhat perversely, not having a free SMR for this test implies we  in arm_smmu_test_smr_masks()
951 	 * SMR.ID bits may not be preserved if the corresponding MASK  in arm_smmu_test_smr_masks()
955 	smr = FIELD_PREP(ARM_SMMU_SMR_ID, smmu->streamid_mask);  in arm_smmu_test_smr_masks()
956 	arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr);  in arm_smmu_test_smr_masks()
957 	smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i));  in arm_smmu_test_smr_masks()
958 	smmu->streamid_mask = FIELD_GET(ARM_SMMU_SMR_ID, smr);  in arm_smmu_test_smr_masks()
960 	smr = FIELD_PREP(ARM_SMMU_SMR_MASK, smmu->streamid_mask);  in arm_smmu_test_smr_masks()
961 	arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr);  in arm_smmu_test_smr_masks()
962 	smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i));  in arm_smmu_test_smr_masks()
963 	smmu->smr_mask_mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr);  in arm_smmu_test_smr_masks()
1388 			dev_err(dev, "SMR mask 0x%x out of range for SMMU (0x%x)\n",  in arm_smmu_probe_device()