385 static void dispc_ovr_write(struct dispc_device *dispc, u32 hw_videoport,  in dispc_ovr_write()  argument
388 	void __iomem *base = dispc->base_ovr[hw_videoport];  in dispc_ovr_write()
393 static u32 dispc_ovr_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)  in dispc_ovr_read()  argument
395 	void __iomem *base = dispc->base_ovr[hw_videoport];  in dispc_ovr_read()
400 static void dispc_vp_write(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_write()  argument
403 	void __iomem *base = dispc->base_vp[hw_videoport];  in dispc_vp_write()
408 static u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)  in dispc_vp_read()  argument
410 	void __iomem *base = dispc->base_vp[hw_videoport];  in dispc_vp_read()
494 static dispc_irq_t dispc_vp_irq_from_raw(u32 stat, u32 hw_videoport)  in dispc_vp_irq_from_raw()  argument
499 		vp_stat |= DSS_IRQ_VP_FRAME_DONE(hw_videoport);  in dispc_vp_irq_from_raw()
501 		vp_stat |= DSS_IRQ_VP_VSYNC_EVEN(hw_videoport);  in dispc_vp_irq_from_raw()
503 		vp_stat |= DSS_IRQ_VP_VSYNC_ODD(hw_videoport);  in dispc_vp_irq_from_raw()
505 		vp_stat |= DSS_IRQ_VP_SYNC_LOST(hw_videoport);  in dispc_vp_irq_from_raw()
510 static u32 dispc_vp_irq_to_raw(dispc_irq_t vpstat, u32 hw_videoport)  in dispc_vp_irq_to_raw()  argument
514 	if (vpstat & DSS_IRQ_VP_FRAME_DONE(hw_videoport))  in dispc_vp_irq_to_raw()
516 	if (vpstat & DSS_IRQ_VP_VSYNC_EVEN(hw_videoport))  in dispc_vp_irq_to_raw()
518 	if (vpstat & DSS_IRQ_VP_VSYNC_ODD(hw_videoport))  in dispc_vp_irq_to_raw()
520 	if (vpstat & DSS_IRQ_VP_SYNC_LOST(hw_videoport))  in dispc_vp_irq_to_raw()
547 					       u32 hw_videoport)  in dispc_k2g_vp_read_irqstatus()  argument
549 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS);  in dispc_k2g_vp_read_irqstatus()
551 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k2g_vp_read_irqstatus()
555 					 u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k2g_vp_write_irqstatus()  argument
557 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k2g_vp_write_irqstatus()
559 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS, stat);  in dispc_k2g_vp_write_irqstatus()
579 					       u32 hw_videoport)  in dispc_k2g_vp_read_irqenable()  argument
581 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE);  in dispc_k2g_vp_read_irqenable()
583 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k2g_vp_read_irqenable()
587 				       u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k2g_vp_set_irqenable()  argument
589 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k2g_vp_set_irqenable()
591 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE, stat);  in dispc_k2g_vp_set_irqenable()
662 					      u32 hw_videoport)  in dispc_k3_vp_read_irqstatus()  argument
664 	u32 stat = dispc_read(dispc, DISPC_VP_IRQSTATUS(hw_videoport));  in dispc_k3_vp_read_irqstatus()
666 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k3_vp_read_irqstatus()
670 					u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k3_vp_write_irqstatus()  argument
672 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k3_vp_write_irqstatus()
674 	dispc_write(dispc, DISPC_VP_IRQSTATUS(hw_videoport), stat);  in dispc_k3_vp_write_irqstatus()
694 					      u32 hw_videoport)  in dispc_k3_vp_read_irqenable()  argument
696 	u32 stat = dispc_read(dispc, DISPC_VP_IRQENABLE(hw_videoport));  in dispc_k3_vp_read_irqenable()
698 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k3_vp_read_irqenable()
702 				      u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k3_vp_set_irqenable()  argument
704 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k3_vp_set_irqenable()
706 	dispc_write(dispc, DISPC_VP_IRQENABLE(hw_videoport), stat);  in dispc_k3_vp_set_irqenable()
876 					       u32 hw_videoport,  in dispc_vp_find_bus_fmt()  argument
889 int dispc_vp_bus_check(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_bus_check()  argument
895 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_bus_check()
903 	if (dispc->feat->vp_bus_type[hw_videoport] != DISPC_VP_OLDI &&  in dispc_vp_bus_check()
906 			__func__, dispc->feat->vp_name[hw_videoport]);  in dispc_vp_bus_check()
933 				    u32 hw_videoport, int num_lines)  in dispc_set_num_datalines()  argument
955 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, v, 10, 8);  in dispc_set_num_datalines()
958 static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport,  in dispc_enable_oldi()  argument
962 	u32 oldi_reset_bit = BIT(5 + hw_videoport);  in dispc_enable_oldi()
984 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, oldi_cfg);  in dispc_enable_oldi()
995 void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_prepare()  argument
1001 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_prepare()
1007 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) {  in dispc_vp_prepare()
1010 		dispc_enable_oldi(dispc, hw_videoport, fmt);  in dispc_vp_prepare()
1014 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_enable()  argument
1023 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_enable()
1029 	dispc_set_num_datalines(dispc, hw_videoport, fmt->data_width);  in dispc_vp_enable()
1039 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_H,  in dispc_vp_enable()
1044 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_V,  in dispc_vp_enable()
1066 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI)  in dispc_vp_enable()
1069 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_POL_FREQ,  in dispc_vp_enable()
1078 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_SIZE_SCREEN,  in dispc_vp_enable()
1082 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0);  in dispc_vp_enable()
1085 void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_disable()  argument
1087 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, 0, 0);  in dispc_vp_disable()
1090 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_unprepare()  argument
1092 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) {  in dispc_vp_unprepare()
1093 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, 0);  in dispc_vp_unprepare()
1099 bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_go_busy()  argument
1101 	return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5);  in dispc_vp_go_busy()
1104 void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_go()  argument
1106 	WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5));  in dispc_vp_go()
1107 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5);  in dispc_vp_go()
1151 				       u32 hw_videoport, u32 default_color)  in dispc_vp_set_default_color()  argument
1157 	dispc_ovr_write(dispc, hw_videoport,  in dispc_vp_set_default_color()
1159 	dispc_ovr_write(dispc, hw_videoport,  in dispc_vp_set_default_color()
1164 					 u32 hw_videoport,  in dispc_vp_mode_valid()  argument
1171 	bus_type = dispc->feat->vp_bus_type[hw_videoport];  in dispc_vp_mode_valid()
1237 int dispc_vp_enable_clk(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_enable_clk()  argument
1239 	int ret = clk_prepare_enable(dispc->vp_clk[hw_videoport]);  in dispc_vp_enable_clk()
1248 void dispc_vp_disable_clk(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_disable_clk()  argument
1250 	clk_disable_unprepare(dispc->vp_clk[hw_videoport]);  in dispc_vp_disable_clk()
1265 int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_set_clk_rate()  argument
1271 	r = clk_set_rate(dispc->vp_clk[hw_videoport], rate);  in dispc_vp_set_clk_rate()
1274 			hw_videoport, rate);  in dispc_vp_set_clk_rate()
1278 	new_rate = clk_get_rate(dispc->vp_clk[hw_videoport]);  in dispc_vp_set_clk_rate()
1283 			 hw_videoport, new_rate, rate);  in dispc_vp_set_clk_rate()
1286 		hw_videoport, clk_get_rate(dispc->vp_clk[hw_videoport]), rate);  in dispc_vp_set_clk_rate()
1293 				    u32 hw_plane, u32 hw_videoport,  in dispc_k2g_ovr_set_plane()  argument
1302 				      u32 hw_plane, u32 hw_videoport,  in dispc_am65x_ovr_set_plane()  argument
1305 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1307 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1309 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1314 				      u32 hw_plane, u32 hw_videoport,  in dispc_j721e_ovr_set_plane()  argument
1317 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_j721e_ovr_set_plane()
1319 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer),  in dispc_j721e_ovr_set_plane()
1321 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer),  in dispc_j721e_ovr_set_plane()
1326 			 u32 hw_videoport, u32 x, u32 y, u32 layer)  in dispc_ovr_set_plane()  argument
1330 		dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1335 		dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1339 		dispc_j721e_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1349 			    u32 hw_videoport, u32 layer, bool enable)  in dispc_ovr_enable_layer()  argument
1354 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_ovr_enable_layer()
1969 		      u32 hw_videoport)  in dispc_plane_check()  argument
2040 		       u32 hw_videoport)  in dispc_plane_setup()  argument
2288 					   u32 hw_videoport)  in dispc_k2g_vp_write_gamma_table()  argument
2290 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_k2g_vp_write_gamma_table()
2294 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_k2g_vp_write_gamma_table()
2304 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_GAMMA_TABLE,  in dispc_k2g_vp_write_gamma_table()
2310 					     u32 hw_videoport)  in dispc_am65x_vp_write_gamma_table()  argument
2312 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_am65x_vp_write_gamma_table()
2316 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_am65x_vp_write_gamma_table()
2326 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v);  in dispc_am65x_vp_write_gamma_table()
2331 					     u32 hw_videoport)  in dispc_j721e_vp_write_gamma_table()  argument
2333 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_j721e_vp_write_gamma_table()
2337 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_j721e_vp_write_gamma_table()
2348 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v);  in dispc_j721e_vp_write_gamma_table()
2353 				       u32 hw_videoport)  in dispc_vp_write_gamma_table()  argument
2357 		dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2361 		dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2364 		dispc_j721e_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2378 			       u32 hw_videoport,  in dispc_vp_set_gamma()  argument
2382 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_vp_set_gamma()
2388 		__func__, hw_videoport, length, hwlen);  in dispc_vp_set_gamma()
2424 	dispc_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_set_gamma()
2471 static void dispc_k2g_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k2g_vp_write_csc()  argument
2484 		dispc_vp_write(dispc, hw_videoport, dispc_vp_cpr_coef_reg[i],  in dispc_k2g_vp_write_csc()
2488 static void dispc_k2g_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k2g_vp_set_ctm()  argument
2497 		dispc_k2g_vp_write_csc(dispc, hw_videoport, &cpr);  in dispc_k2g_vp_set_ctm()
2501 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG,  in dispc_k2g_vp_set_ctm()
2536 static void dispc_k3_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k3_vp_write_csc()  argument
2550 		dispc_vp_write(dispc, hw_videoport, dispc_vp_csc_coef_reg[i],  in dispc_k3_vp_write_csc()
2554 static void dispc_k3_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k3_vp_set_ctm()  argument
2563 		dispc_k3_vp_write_csc(dispc, hw_videoport, &csc);  in dispc_k3_vp_set_ctm()
2567 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG,  in dispc_k3_vp_set_ctm()
2572 				    u32 hw_videoport,  in dispc_vp_set_color_mgmt()  argument
2588 	dispc_vp_set_gamma(dispc, hw_videoport, lut, length);  in dispc_vp_set_color_mgmt()
2594 		dispc_k2g_vp_set_ctm(dispc, hw_videoport, ctm);  in dispc_vp_set_color_mgmt()
2596 		dispc_k3_vp_set_ctm(dispc, hw_videoport, ctm);  in dispc_vp_set_color_mgmt()
2599 void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_setup()  argument
2602 	dispc_vp_set_default_color(dispc, hw_videoport, 0);  in dispc_vp_setup()
2603 	dispc_vp_set_color_mgmt(dispc, hw_videoport, state, newmodeset);  in dispc_vp_setup()