Lines Matching +full:lvds +full:- +full:encoder
1 // SPDX-License-Identifier: GPL-2.0-only
91 static void tegra_rgb_encoder_disable(struct drm_encoder *encoder) in tegra_rgb_encoder_disable() argument
93 struct tegra_output *output = encoder_to_output(encoder); in tegra_rgb_encoder_disable()
96 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); in tegra_rgb_encoder_disable()
97 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_disable()
100 static void tegra_rgb_encoder_enable(struct drm_encoder *encoder) in tegra_rgb_encoder_enable() argument
102 struct tegra_output *output = encoder_to_output(encoder); in tegra_rgb_encoder_enable()
106 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); in tegra_rgb_encoder_enable()
109 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); in tegra_rgb_encoder_enable()
112 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
115 tegra_dc_writel(rgb->dc, value, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
120 tegra_dc_writel(rgb->dc, value, DC_DISP_DISP_INTERFACE_CONTROL); in tegra_rgb_encoder_enable()
122 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_enable()
127 if (!rgb->pll_d2_out0) in tegra_rgb_pll_rate_change_allowed()
130 if (!clk_is_match(rgb->clk_parent, rgb->pll_d_out0) && in tegra_rgb_pll_rate_change_allowed()
131 !clk_is_match(rgb->clk_parent, rgb->pll_d2_out0)) in tegra_rgb_pll_rate_change_allowed()
138 tegra_rgb_encoder_atomic_check(struct drm_encoder *encoder, in tegra_rgb_encoder_atomic_check() argument
142 struct tegra_output *output = encoder_to_output(encoder); in tegra_rgb_encoder_atomic_check()
143 struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); in tegra_rgb_encoder_atomic_check()
144 unsigned long pclk = crtc_state->mode.clock * 1000; in tegra_rgb_encoder_atomic_check()
173 div = ((clk_get_rate(rgb->clk) * 2) / pclk) - 2; in tegra_rgb_encoder_atomic_check()
177 err = tegra_dc_state_setup_clock(dc, crtc_state, rgb->clk_parent, in tegra_rgb_encoder_atomic_check()
180 dev_err(output->dev, "failed to setup CRTC state: %d\n", err); in tegra_rgb_encoder_atomic_check()
204 np = of_get_child_by_name(dc->dev->of_node, "rgb"); in tegra_dc_rgb_probe()
206 return -ENODEV; in tegra_dc_rgb_probe()
208 err = devm_add_action_or_reset(dc->dev, tegra_dc_of_node_put, np); in tegra_dc_rgb_probe()
213 return -ENODEV; in tegra_dc_rgb_probe()
215 rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL); in tegra_dc_rgb_probe()
217 return -ENOMEM; in tegra_dc_rgb_probe()
219 rgb->output.dev = dc->dev; in tegra_dc_rgb_probe()
220 rgb->output.of_node = np; in tegra_dc_rgb_probe()
221 rgb->dc = dc; in tegra_dc_rgb_probe()
223 err = tegra_output_probe(&rgb->output); in tegra_dc_rgb_probe()
227 rgb->clk = devm_clk_get(dc->dev, NULL); in tegra_dc_rgb_probe()
228 if (IS_ERR(rgb->clk)) { in tegra_dc_rgb_probe()
229 dev_err(dc->dev, "failed to get clock\n"); in tegra_dc_rgb_probe()
230 err = PTR_ERR(rgb->clk); in tegra_dc_rgb_probe()
234 rgb->clk_parent = devm_clk_get(dc->dev, "parent"); in tegra_dc_rgb_probe()
235 if (IS_ERR(rgb->clk_parent)) { in tegra_dc_rgb_probe()
236 dev_err(dc->dev, "failed to get parent clock\n"); in tegra_dc_rgb_probe()
237 err = PTR_ERR(rgb->clk_parent); in tegra_dc_rgb_probe()
241 err = clk_set_parent(rgb->clk, rgb->clk_parent); in tegra_dc_rgb_probe()
243 dev_err(dc->dev, "failed to set parent clock: %d\n", err); in tegra_dc_rgb_probe()
247 rgb->pll_d_out0 = clk_get_sys(NULL, "pll_d_out0"); in tegra_dc_rgb_probe()
248 if (IS_ERR(rgb->pll_d_out0)) { in tegra_dc_rgb_probe()
249 err = PTR_ERR(rgb->pll_d_out0); in tegra_dc_rgb_probe()
250 dev_err(dc->dev, "failed to get pll_d_out0: %d\n", err); in tegra_dc_rgb_probe()
254 if (dc->soc->has_pll_d2_out0) { in tegra_dc_rgb_probe()
255 rgb->pll_d2_out0 = clk_get_sys(NULL, "pll_d2_out0"); in tegra_dc_rgb_probe()
256 if (IS_ERR(rgb->pll_d2_out0)) { in tegra_dc_rgb_probe()
257 err = PTR_ERR(rgb->pll_d2_out0); in tegra_dc_rgb_probe()
258 dev_err(dc->dev, "failed to get pll_d2_out0: %d\n", err); in tegra_dc_rgb_probe()
263 dc->rgb = &rgb->output; in tegra_dc_rgb_probe()
268 clk_put(rgb->pll_d_out0); in tegra_dc_rgb_probe()
270 tegra_output_remove(&rgb->output); in tegra_dc_rgb_probe()
278 if (!dc->rgb) in tegra_dc_rgb_remove()
281 rgb = to_rgb(dc->rgb); in tegra_dc_rgb_remove()
282 clk_put(rgb->pll_d2_out0); in tegra_dc_rgb_remove()
283 clk_put(rgb->pll_d_out0); in tegra_dc_rgb_remove()
285 tegra_output_remove(dc->rgb); in tegra_dc_rgb_remove()
286 dc->rgb = NULL; in tegra_dc_rgb_remove()
291 struct tegra_output *output = dc->rgb; in tegra_dc_rgb_init()
295 if (!dc->rgb) in tegra_dc_rgb_init()
296 return -ENODEV; in tegra_dc_rgb_init()
298 drm_simple_encoder_init(drm, &output->encoder, DRM_MODE_ENCODER_LVDS); in tegra_dc_rgb_init()
299 drm_encoder_helper_add(&output->encoder, in tegra_dc_rgb_init()
303 * Wrap directly-connected panel into DRM bridge in order to let in tegra_dc_rgb_init()
306 if (output->panel) { in tegra_dc_rgb_init()
307 output->bridge = devm_drm_panel_bridge_add(output->dev, in tegra_dc_rgb_init()
308 output->panel); in tegra_dc_rgb_init()
309 if (IS_ERR(output->bridge)) { in tegra_dc_rgb_init()
310 dev_err(output->dev, in tegra_dc_rgb_init()
312 output->bridge); in tegra_dc_rgb_init()
313 return PTR_ERR(output->bridge); in tegra_dc_rgb_init()
316 output->panel = NULL; in tegra_dc_rgb_init()
320 * Tegra devices that have LVDS panel utilize LVDS encoder bridge in tegra_dc_rgb_init()
321 * for converting up to 28 LCD LVTTL lanes into 5/4 LVDS lanes that in tegra_dc_rgb_init()
324 * Encoder usually have a power-down control which needs to be enabled in tegra_dc_rgb_init()
326 * use an older device-tree version didn't model the bridge, assuming in tegra_dc_rgb_init()
327 * that encoder is turned ON by default, while today's DRM allows us in tegra_dc_rgb_init()
328 * to model LVDS encoder properly. in tegra_dc_rgb_init()
330 * Newer device-trees utilize LVDS encoder bridge, which provides in tegra_dc_rgb_init()
333 * For older device-trees we wrapped panel into the panel-bridge. in tegra_dc_rgb_init()
335 if (output->bridge) { in tegra_dc_rgb_init()
336 err = drm_bridge_attach(&output->encoder, output->bridge, in tegra_dc_rgb_init()
341 connector = drm_bridge_connector_init(drm, &output->encoder); in tegra_dc_rgb_init()
343 dev_err(output->dev, in tegra_dc_rgb_init()
349 drm_connector_attach_encoder(connector, &output->encoder); in tegra_dc_rgb_init()
354 dev_err(output->dev, "failed to initialize output: %d\n", err); in tegra_dc_rgb_init()
363 output->encoder.possible_crtcs = drm_crtc_mask(&dc->base); in tegra_dc_rgb_init()
370 if (dc->rgb) in tegra_dc_rgb_exit()
371 tegra_output_exit(dc->rgb); in tegra_dc_rgb_exit()