Lines Matching +full:reset +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0+
16 * After the CRTC soft reset, the vblank counter would be reset to zero.
23 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_soft_reset()
30 /* Soft reset bit, active low */ in lsdc_crtc0_soft_reset()
49 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_soft_reset()
56 /* Soft reset bit, active low */ in lsdc_crtc1_soft_reset()
75 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_enable()
81 * This may happen in extremely rare cases, but a soft reset can in lsdc_crtc0_enable()
86 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc0_enable()
95 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_disable()
104 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_enable()
108 * This may happen in extremely rare cases, but a soft reset can in lsdc_crtc1_enable()
114 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc1_enable()
123 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_disable()
134 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_scan_pos()
145 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_scan_pos()
156 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_enable_vblank()
163 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_disable_vblank()
170 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_enable_vblank()
177 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_disable_vblank()
184 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_flip()
191 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_flip()
199 * bandwidth compared with the clone (mirroring) display mode provided by
205 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_clone()
212 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_clone()
218 const struct drm_display_mode *mode) in lsdc_crtc0_set_mode() argument
220 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_set_mode()
223 (mode->crtc_htotal << 16) | mode->crtc_hdisplay); in lsdc_crtc0_set_mode()
226 (mode->crtc_vtotal << 16) | mode->crtc_vdisplay); in lsdc_crtc0_set_mode()
229 (mode->crtc_hsync_end << 16) | mode->crtc_hsync_start | HSYNC_EN); in lsdc_crtc0_set_mode()
232 (mode->crtc_vsync_end << 16) | mode->crtc_vsync_start | VSYNC_EN); in lsdc_crtc0_set_mode()
236 const struct drm_display_mode *mode) in lsdc_crtc1_set_mode() argument
238 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_set_mode()
241 (mode->crtc_htotal << 16) | mode->crtc_hdisplay); in lsdc_crtc1_set_mode()
244 (mode->crtc_vtotal << 16) | mode->crtc_vdisplay); in lsdc_crtc1_set_mode()
247 (mode->crtc_hsync_end << 16) | mode->crtc_hsync_start | HSYNC_EN); in lsdc_crtc1_set_mode()
250 (mode->crtc_vsync_end << 16) | mode->crtc_vsync_start | VSYNC_EN); in lsdc_crtc1_set_mode()
261 * Only touch CRTC hardware-related parts.
266 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_reset()
273 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_reset()
289 .reset = lsdc_crtc0_reset,
301 .reset = lsdc_crtc1_reset,
306 * The 32-bit hardware vblank counter has been available since LS7A2000
308 * it will be reset only if the CRTC is being soft reset.
315 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_get_vblank_count()
322 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_get_vblank_count()
337 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_set_dma_step()
349 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_set_dma_step()
371 .reset = lsdc_crtc0_reset,
385 .reset = lsdc_crtc1_reset,
392 const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops; in lsdc_crtc_reset()
395 if (crtc->state) in lsdc_crtc_reset()
396 crtc->funcs->atomic_destroy_state(crtc, crtc->state); in lsdc_crtc_reset()
403 __drm_atomic_helper_crtc_reset(crtc, &priv_crtc_state->base); in lsdc_crtc_reset()
405 /* Reset the CRTC hardware, this is required for S3 support */ in lsdc_crtc_reset()
406 ops->reset(lcrtc); in lsdc_crtc_reset()
414 __drm_atomic_helper_crtc_destroy_state(&priv_state->base); in lsdc_crtc_atomic_destroy_state()
429 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_priv_state->base); in lsdc_crtc_atomic_duplicate_state()
431 old_priv_state = to_lsdc_crtc_state(crtc->state); in lsdc_crtc_atomic_duplicate_state()
433 memcpy(&new_priv_state->pparms, &old_priv_state->pparms, in lsdc_crtc_atomic_duplicate_state()
434 sizeof(new_priv_state->pparms)); in lsdc_crtc_atomic_duplicate_state()
436 return &new_priv_state->base; in lsdc_crtc_atomic_duplicate_state()
443 /* 32-bit hardware vblank counter */ in lsdc_crtc_get_vblank_counter()
444 return lcrtc->hw_ops->get_vblank_counter(lcrtc); in lsdc_crtc_get_vblank_counter()
451 if (!lcrtc->has_vblank) in lsdc_crtc_enable_vblank()
452 return -EINVAL; in lsdc_crtc_enable_vblank()
454 lcrtc->hw_ops->enable_vblank(lcrtc); in lsdc_crtc_enable_vblank()
463 if (!lcrtc->has_vblank) in lsdc_crtc_disable_vblank()
466 lcrtc->hw_ops->disable_vblank(lcrtc); in lsdc_crtc_disable_vblank()
472 * For the sake of convenience, plane-related registers are also add here.
531 struct drm_info_node *node = (struct drm_info_node *)m->private; in lsdc_crtc_show_regs()
532 struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data; in lsdc_crtc_show_regs()
533 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc_show_regs()
536 for (i = 0; i < lcrtc->nreg; i++) { in lsdc_crtc_show_regs()
537 const struct lsdc_reg32 *preg = &lcrtc->preg[i]; in lsdc_crtc_show_regs()
538 u32 offset = preg->offset; in lsdc_crtc_show_regs()
541 preg->name, offset, lsdc_rreg32(ldev, offset)); in lsdc_crtc_show_regs()
549 struct drm_info_node *node = (struct drm_info_node *)m->private; in lsdc_crtc_show_scan_position()
550 struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data; in lsdc_crtc_show_scan_position()
553 lcrtc->hw_ops->get_scan_pos(lcrtc, &x, &y); in lsdc_crtc_show_scan_position()
561 struct drm_info_node *node = (struct drm_info_node *)m->private; in lsdc_crtc_show_vblank_counter()
562 struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data; in lsdc_crtc_show_vblank_counter()
564 if (lcrtc->hw_ops->get_vblank_counter) in lsdc_crtc_show_vblank_counter()
565 seq_printf(m, "%s vblank counter: %08u\n\n", lcrtc->base.name, in lsdc_crtc_show_vblank_counter()
566 lcrtc->hw_ops->get_vblank_counter(lcrtc)); in lsdc_crtc_show_vblank_counter()
573 struct drm_info_node *node = (struct drm_info_node *)m->private; in lsdc_pixpll_show_clock()
574 struct lsdc_crtc *lcrtc = (struct lsdc_crtc *)node->info_ent->data; in lsdc_pixpll_show_clock()
575 struct lsdc_pixpll *pixpll = &lcrtc->pixpll; in lsdc_pixpll_show_clock()
576 const struct lsdc_pixpll_funcs *funcs = pixpll->funcs; in lsdc_pixpll_show_clock()
577 struct drm_crtc *crtc = &lcrtc->base; in lsdc_pixpll_show_clock()
578 struct drm_display_mode *mode = &crtc->state->mode; in lsdc_pixpll_show_clock() local
582 out_khz = funcs->get_rate(pixpll); in lsdc_pixpll_show_clock()
584 seq_printf(m, "%s: %dx%d@%d\n", crtc->name, in lsdc_pixpll_show_clock()
585 mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode)); in lsdc_pixpll_show_clock()
587 seq_printf(m, "Pixel clock required: %d kHz\n", mode->clock); in lsdc_pixpll_show_clock()
589 seq_printf(m, "Diff: %d kHz\n", out_khz - mode->clock); in lsdc_pixpll_show_clock()
591 funcs->print(pixpll, &printer); in lsdc_pixpll_show_clock()
615 seq_puts(m, "soft_reset: soft reset this CRTC\n"); in lsdc_crtc_man_op_show()
626 struct drm_crtc *crtc = inode->i_private; in lsdc_crtc_man_op_open()
636 struct seq_file *m = file->private_data; in lsdc_crtc_man_op_write()
637 struct lsdc_crtc *lcrtc = m->private; in lsdc_crtc_man_op_write()
638 const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops; in lsdc_crtc_man_op_write()
641 if (len > sizeof(buf) - 1) in lsdc_crtc_man_op_write()
642 return -EINVAL; in lsdc_crtc_man_op_write()
645 return -EFAULT; in lsdc_crtc_man_op_write()
650 ops->soft_reset(lcrtc); in lsdc_crtc_man_op_write()
652 ops->enable(lcrtc); in lsdc_crtc_man_op_write()
654 ops->disable(lcrtc); in lsdc_crtc_man_op_write()
656 ops->flip(lcrtc); in lsdc_crtc_man_op_write()
658 ops->clone(lcrtc); in lsdc_crtc_man_op_write()
676 struct drm_minor *minor = crtc->dev->primary; in lsdc_crtc_late_register()
677 unsigned int index = dispipe->index; in lsdc_crtc_late_register()
680 lcrtc->preg = lsdc_crtc_regs_array[index]; in lsdc_crtc_late_register()
681 lcrtc->nreg = ARRAY_SIZE(lsdc_crtc_regs_array[index]); in lsdc_crtc_late_register()
682 lcrtc->p_info_list = lsdc_crtc_debugfs_list[index]; in lsdc_crtc_late_register()
683 lcrtc->n_info_list = ARRAY_SIZE(lsdc_crtc_debugfs_list[index]); in lsdc_crtc_late_register()
685 for (i = 0; i < lcrtc->n_info_list; ++i) in lsdc_crtc_late_register()
686 lcrtc->p_info_list[i].data = lcrtc; in lsdc_crtc_late_register()
688 drm_debugfs_create_files(lcrtc->p_info_list, lcrtc->n_info_list, in lsdc_crtc_late_register()
689 crtc->debugfs_entry, minor); in lsdc_crtc_late_register()
692 debugfs_create_file("ops", 0644, crtc->debugfs_entry, lcrtc, in lsdc_crtc_late_register()
705 pparms = &priv_state->pparms; in lsdc_crtc_atomic_print_state()
707 drm_printf(p, "\tInput clock divider = %u\n", pparms->div_ref); in lsdc_crtc_atomic_print_state()
708 drm_printf(p, "\tMedium clock multiplier = %u\n", pparms->loopc); in lsdc_crtc_atomic_print_state()
709 drm_printf(p, "\tOutput clock divider = %u\n", pparms->div_out); in lsdc_crtc_atomic_print_state()
713 .reset = lsdc_crtc_reset,
727 .reset = lsdc_crtc_reset,
742 lsdc_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) in lsdc_crtc_mode_valid() argument
744 struct drm_device *ddev = crtc->dev; in lsdc_crtc_mode_valid()
746 const struct lsdc_desc *descp = ldev->descp; in lsdc_crtc_mode_valid()
749 if (mode->hdisplay > descp->max_width) in lsdc_crtc_mode_valid()
752 if (mode->vdisplay > descp->max_height) in lsdc_crtc_mode_valid()
755 if (mode->clock > descp->max_pixel_clk) { in lsdc_crtc_mode_valid()
756 drm_dbg_kms(ddev, "mode %dx%d, pixel clock=%d is too high\n", in lsdc_crtc_mode_valid()
757 mode->hdisplay, mode->vdisplay, mode->clock); in lsdc_crtc_mode_valid()
762 pitch = mode->hdisplay * 4; in lsdc_crtc_mode_valid()
764 if (pitch % descp->pitch_align) { in lsdc_crtc_mode_valid()
766 descp->pitch_align, pitch); in lsdc_crtc_mode_valid()
777 struct lsdc_pixpll *pixpll = &lcrtc->pixpll; in lsdc_pixpll_atomic_check()
778 const struct lsdc_pixpll_funcs *pfuncs = pixpll->funcs; in lsdc_pixpll_atomic_check()
780 unsigned int clock = state->mode.clock; in lsdc_pixpll_atomic_check()
783 ret = pfuncs->compute(pixpll, clock, &priv_state->pparms); in lsdc_pixpll_atomic_check()
785 drm_warn(crtc->dev, "Failed to find PLL params for %ukHz\n", in lsdc_pixpll_atomic_check()
787 return -EINVAL; in lsdc_pixpll_atomic_check()
798 if (!crtc_state->enable) in lsdc_crtc_helper_atomic_check()
807 const struct lsdc_crtc_hw_ops *crtc_hw_ops = lcrtc->hw_ops; in lsdc_crtc_mode_set_nofb()
808 struct lsdc_pixpll *pixpll = &lcrtc->pixpll; in lsdc_crtc_mode_set_nofb()
809 const struct lsdc_pixpll_funcs *pixpll_funcs = pixpll->funcs; in lsdc_crtc_mode_set_nofb()
810 struct drm_crtc_state *state = crtc->state; in lsdc_crtc_mode_set_nofb()
811 struct drm_display_mode *mode = &state->mode; in lsdc_crtc_mode_set_nofb() local
814 pixpll_funcs->update(pixpll, &priv_state->pparms); in lsdc_crtc_mode_set_nofb()
816 if (crtc_hw_ops->set_dma_step) { in lsdc_crtc_mode_set_nofb()
817 unsigned int width_in_bytes = mode->hdisplay * 4; in lsdc_crtc_mode_set_nofb()
833 crtc_hw_ops->set_dma_step(lcrtc, dma_step); in lsdc_crtc_mode_set_nofb()
836 crtc_hw_ops->set_mode(lcrtc, mode); in lsdc_crtc_mode_set_nofb()
841 struct drm_device *ddev = crtc->dev; in lsdc_crtc_send_vblank()
844 if (!crtc->state || !crtc->state->event) in lsdc_crtc_send_vblank()
849 spin_lock_irqsave(&ddev->event_lock, flags); in lsdc_crtc_send_vblank()
850 drm_crtc_send_vblank_event(crtc, crtc->state->event); in lsdc_crtc_send_vblank()
851 crtc->state->event = NULL; in lsdc_crtc_send_vblank()
852 spin_unlock_irqrestore(&ddev->event_lock, flags); in lsdc_crtc_send_vblank()
860 if (lcrtc->has_vblank) in lsdc_crtc_atomic_enable()
863 lcrtc->hw_ops->enable(lcrtc); in lsdc_crtc_atomic_enable()
871 if (lcrtc->has_vblank) in lsdc_crtc_atomic_disable()
874 lcrtc->hw_ops->disable(lcrtc); in lsdc_crtc_atomic_disable()
886 spin_lock_irq(&crtc->dev->event_lock); in lsdc_crtc_atomic_flush()
887 if (crtc->state->event) { in lsdc_crtc_atomic_flush()
889 drm_crtc_arm_vblank_event(crtc, crtc->state->event); in lsdc_crtc_atomic_flush()
891 drm_crtc_send_vblank_event(crtc, crtc->state->event); in lsdc_crtc_atomic_flush()
892 crtc->state->event = NULL; in lsdc_crtc_atomic_flush()
894 spin_unlock_irq(&crtc->dev->event_lock); in lsdc_crtc_atomic_flush()
903 const struct drm_display_mode *mode) in lsdc_crtc_get_scanout_position() argument
906 const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops; in lsdc_crtc_get_scanout_position()
910 vsw = mode->crtc_vsync_end - mode->crtc_vsync_start; in lsdc_crtc_get_scanout_position()
911 vbp = mode->crtc_vtotal - mode->crtc_vsync_end; in lsdc_crtc_get_scanout_position()
914 vactive_end = vactive_start + mode->crtc_vdisplay; in lsdc_crtc_get_scanout_position()
917 vfp_end = mode->crtc_vtotal; in lsdc_crtc_get_scanout_position()
922 ops->get_scan_pos(lcrtc, &x, &y); in lsdc_crtc_get_scanout_position()
925 y = y - vfp_end - vactive_start; in lsdc_crtc_get_scanout_position()
927 y -= vactive_start; in lsdc_crtc_get_scanout_position()
958 ret = lsdc_pixpll_init(&lcrtc->pixpll, ddev, index); in ls7a1000_crtc_init()
964 lcrtc->ldev = to_lsdc(ddev); in ls7a1000_crtc_init()
965 lcrtc->has_vblank = has_vblank; in ls7a1000_crtc_init()
966 lcrtc->hw_ops = &ls7a1000_crtc_hw_ops[index]; in ls7a1000_crtc_init()
970 "LS-CRTC-%d", index); in ls7a1000_crtc_init()
997 ret = lsdc_pixpll_init(&lcrtc->pixpll, ddev, index); in ls7a2000_crtc_init()
1003 lcrtc->ldev = to_lsdc(ddev); in ls7a2000_crtc_init()
1004 lcrtc->has_vblank = has_vblank; in ls7a2000_crtc_init()
1005 lcrtc->hw_ops = &ls7a2000_crtc_hw_ops[index]; in ls7a2000_crtc_init()
1009 "LS-CRTC-%u", index); in ls7a2000_crtc_init()