1 // SPDX-License-Identifier: GPL-2.0+
3  * Generic driver for memory-mapped GPIO controllers.
10  * ..The simplest form of a GPIO controller that the driver supports is``
11  *  `.just a single "data" register, where GPIO state can be read and/or `
16 __________|~$@~~~        %~    /o*o*o*o*o*o\   .. Implementing such a GPIO .
22  * .   big-endian notation, just`.  .. A bit more sophisticated controllers ,
23  *  . register the device with -be`. .with a pair of set/clear-bit registers ,
29  * .. The expectation is that in at least some cases .    ,-~~~-,
30  *  .this will be used with roll-your-own ASIC/FPGA .`     \   /
55 #include <linux/gpio/driver.h>
129 	if (gc->be_bits)  in bgpio_line2mask()
130 		return BIT(gc->bgpio_bits - 1 - line);  in bgpio_line2mask()
134 static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)  in bgpio_get_set()  argument
136 	unsigned long pinmask = bgpio_line2mask(gc, gpio);  in bgpio_get_set()
137 	bool dir = !!(gc->bgpio_dir & pinmask);  in bgpio_get_set()
140 		return !!(gc->read_reg(gc->reg_set) & pinmask);  in bgpio_get_set()
142 		return !!(gc->read_reg(gc->reg_dat) & pinmask);  in bgpio_get_set()
146  * This assumes that the bits in the GPIO register are in native endianness.
158 	set_mask = *mask & gc->bgpio_dir;  in bgpio_get_set_multiple()
159 	get_mask = *mask & ~gc->bgpio_dir;  in bgpio_get_set_multiple()
162 		*bits |= gc->read_reg(gc->reg_set) & set_mask;  in bgpio_get_set_multiple()
164 		*bits |= gc->read_reg(gc->reg_dat) & get_mask;  in bgpio_get_set_multiple()
169 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)  in bgpio_get()  argument
171 	return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio));  in bgpio_get()
175  * This only works if the bits in the GPIO register are in native endianness.
182 	*bits |= gc->read_reg(gc->reg_dat) & *mask;  in bgpio_get_multiple()
200 	for_each_set_bit(bit, mask, gc->ngpio)  in bgpio_get_multiple_be()
204 	val = gc->read_reg(gc->reg_dat) & readmask;  in bgpio_get_multiple_be()
210 	for_each_set_bit(bit, &val, gc->ngpio)  in bgpio_get_multiple_be()
216 static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)  in bgpio_set_none()  argument
220 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)  in bgpio_set()  argument
222 	unsigned long mask = bgpio_line2mask(gc, gpio);  in bgpio_set()
225 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set()
228 		gc->bgpio_data |= mask;  in bgpio_set()
230 		gc->bgpio_data &= ~mask;  in bgpio_set()
232 	gc->write_reg(gc->reg_dat, gc->bgpio_data);  in bgpio_set()
234 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set()
237 static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,  in bgpio_set_with_clear()  argument
240 	unsigned long mask = bgpio_line2mask(gc, gpio);  in bgpio_set_with_clear()
243 		gc->write_reg(gc->reg_set, mask);  in bgpio_set_with_clear()
245 		gc->write_reg(gc->reg_clr, mask);  in bgpio_set_with_clear()
248 static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)  in bgpio_set_set()  argument
250 	unsigned long mask = bgpio_line2mask(gc, gpio);  in bgpio_set_set()
253 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set_set()
256 		gc->bgpio_data |= mask;  in bgpio_set_set()
258 		gc->bgpio_data &= ~mask;  in bgpio_set_set()
260 	gc->write_reg(gc->reg_set, gc->bgpio_data);  in bgpio_set_set()
262 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set_set()
275 	for_each_set_bit(i, mask, gc->bgpio_bits) {  in bgpio_multiple_get_masks()
291 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set_multiple_single_reg()
295 	gc->bgpio_data |= set_mask;  in bgpio_set_multiple_single_reg()
296 	gc->bgpio_data &= ~clear_mask;  in bgpio_set_multiple_single_reg()
298 	gc->write_reg(reg, gc->bgpio_data);  in bgpio_set_multiple_single_reg()
300 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set_multiple_single_reg()
306 	bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);  in bgpio_set_multiple()
312 	bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);  in bgpio_set_multiple_set()
324 		gc->write_reg(gc->reg_set, set_mask);  in bgpio_set_multiple_with_clear()
326 		gc->write_reg(gc->reg_clr, clear_mask);  in bgpio_set_multiple_with_clear()
329 static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)  in bgpio_simple_dir_in()  argument
334 static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio,  in bgpio_dir_out_err()  argument
337 	return -EINVAL;  in bgpio_dir_out_err()
340 static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,  in bgpio_simple_dir_out()  argument
343 	gc->set(gc, gpio, val);  in bgpio_simple_dir_out()
348 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  in bgpio_dir_in()  argument
352 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_dir_in()
354 	gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);  in bgpio_dir_in()
356 	if (gc->reg_dir_in)  in bgpio_dir_in()
357 		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_dir_in()
358 	if (gc->reg_dir_out)  in bgpio_dir_in()
359 		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);  in bgpio_dir_in()
361 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_dir_in()
366 static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)  in bgpio_get_dir()  argument
369 	if (gc->bgpio_dir_unreadable) {  in bgpio_get_dir()
370 		if (gc->bgpio_dir & bgpio_line2mask(gc, gpio))  in bgpio_get_dir()
375 	if (gc->reg_dir_out) {  in bgpio_get_dir()
376 		if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio))  in bgpio_get_dir()
381 	if (gc->reg_dir_in)  in bgpio_get_dir()
382 		if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio)))  in bgpio_get_dir()
388 static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)  in bgpio_dir_out()  argument
392 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_dir_out()
394 	gc->bgpio_dir |= bgpio_line2mask(gc, gpio);  in bgpio_dir_out()
396 	if (gc->reg_dir_in)  in bgpio_dir_out()
397 		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_dir_out()
398 	if (gc->reg_dir_out)  in bgpio_dir_out()
399 		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);  in bgpio_dir_out()
401 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_dir_out()
404 static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,  in bgpio_dir_out_dir_first()  argument
407 	bgpio_dir_out(gc, gpio, val);  in bgpio_dir_out_dir_first()
408 	gc->set(gc, gpio, val);  in bgpio_dir_out_dir_first()
412 static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio,  in bgpio_dir_out_val_first()  argument
415 	gc->set(gc, gpio, val);  in bgpio_dir_out_val_first()
416 	bgpio_dir_out(gc, gpio, val);  in bgpio_dir_out_val_first()
425 	switch (gc->bgpio_bits) {  in bgpio_setup_accessors()
427 		gc->read_reg	= bgpio_read8;  in bgpio_setup_accessors()
428 		gc->write_reg	= bgpio_write8;  in bgpio_setup_accessors()
432 			gc->read_reg	= bgpio_read16be;  in bgpio_setup_accessors()
433 			gc->write_reg	= bgpio_write16be;  in bgpio_setup_accessors()
435 			gc->read_reg	= bgpio_read16;  in bgpio_setup_accessors()
436 			gc->write_reg	= bgpio_write16;  in bgpio_setup_accessors()
441 			gc->read_reg	= bgpio_read32be;  in bgpio_setup_accessors()
442 			gc->write_reg	= bgpio_write32be;  in bgpio_setup_accessors()
444 			gc->read_reg	= bgpio_read32;  in bgpio_setup_accessors()
445 			gc->write_reg	= bgpio_write32;  in bgpio_setup_accessors()
453 			return -EINVAL;  in bgpio_setup_accessors()
455 			gc->read_reg	= bgpio_read64;  in bgpio_setup_accessors()
456 			gc->write_reg	= bgpio_write64;  in bgpio_setup_accessors()
461 		dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);  in bgpio_setup_accessors()
462 		return -EINVAL;  in bgpio_setup_accessors()
469  * Create the device and allocate the resources.  For setting GPIO's there are
472  *	- single input/output register resource (named "dat").
473  *	- set/clear pair (named "set" and "clr").
474  *	- single output register resource and single input resource ("set" and
482  * For setting the GPIO direction, there are three supported configurations:
484  *	- simple bidirection GPIO that requires no configuration.
485  *	- an output direction register (named "dirout") where a 1 bit
486  *	indicates the GPIO is an output.
487  *	- an input direction register (named "dirin") where a 1 bit indicates
488  *	the GPIO is an input.
497 	gc->reg_dat = dat;  in bgpio_setup_io()
498 	if (!gc->reg_dat)  in bgpio_setup_io()
499 		return -EINVAL;  in bgpio_setup_io()
502 		gc->reg_set = set;  in bgpio_setup_io()
503 		gc->reg_clr = clr;  in bgpio_setup_io()
504 		gc->set = bgpio_set_with_clear;  in bgpio_setup_io()
505 		gc->set_multiple = bgpio_set_multiple_with_clear;  in bgpio_setup_io()
507 		gc->reg_set = set;  in bgpio_setup_io()
508 		gc->set = bgpio_set_set;  in bgpio_setup_io()
509 		gc->set_multiple = bgpio_set_multiple_set;  in bgpio_setup_io()
511 		gc->set = bgpio_set_none;  in bgpio_setup_io()
512 		gc->set_multiple = NULL;  in bgpio_setup_io()
514 		gc->set = bgpio_set;  in bgpio_setup_io()
515 		gc->set_multiple = bgpio_set_multiple;  in bgpio_setup_io()
520 		gc->get = bgpio_get_set;  in bgpio_setup_io()
521 		if (!gc->be_bits)  in bgpio_setup_io()
522 			gc->get_multiple = bgpio_get_set_multiple;  in bgpio_setup_io()
524 		 * We deliberately avoid assigning the ->get_multiple() call  in bgpio_setup_io()
527 		 * simply too much complexity, let the GPIO core fall back to  in bgpio_setup_io()
531 		gc->get = bgpio_get;  in bgpio_setup_io()
532 		if (gc->be_bits)  in bgpio_setup_io()
533 			gc->get_multiple = bgpio_get_multiple_be;  in bgpio_setup_io()
535 			gc->get_multiple = bgpio_get_multiple;  in bgpio_setup_io()
547 		gc->reg_dir_out = dirout;  in bgpio_setup_direction()
548 		gc->reg_dir_in = dirin;  in bgpio_setup_direction()
550 			gc->direction_output = bgpio_dir_out_dir_first;  in bgpio_setup_direction()
552 			gc->direction_output = bgpio_dir_out_val_first;  in bgpio_setup_direction()
553 		gc->direction_input = bgpio_dir_in;  in bgpio_setup_direction()
554 		gc->get_direction = bgpio_get_dir;  in bgpio_setup_direction()
557 			gc->direction_output = bgpio_dir_out_err;  in bgpio_setup_direction()
559 			gc->direction_output = bgpio_simple_dir_out;  in bgpio_setup_direction()
560 		gc->direction_input = bgpio_simple_dir_in;  in bgpio_setup_direction()
568 	if (gpio_pin < chip->ngpio)  in bgpio_request()
571 	return -EINVAL;  in bgpio_request()
575  * bgpio_init() - Initialize generic GPIO accessor functions
576  * @gc: the GPIO chip to set up
577  * @dev: the parent device of the new GPIO chip (compulsory)
579  * @dat: MMIO address for the register to READ the value of the GPIO lines, it
582  * @set: MMIO address for the register to SET the value of the GPIO lines, it is
583  *	expected that we write the line with 1 in this register to drive the GPIO line
585  * @clr: MMIO address for the register to CLEAR the value of the GPIO lines, it is
586  *	expected that we write the line with 1 in this register to drive the GPIO line
588  *	will be assumed to also clear the GPIO lines, by actively writing the line
609 		return -EINVAL;  in bgpio_init()
611 	gc->bgpio_bits = sz * 8;  in bgpio_init()
612 	if (gc->bgpio_bits > BITS_PER_LONG)  in bgpio_init()
613 		return -EINVAL;  in bgpio_init()
615 	raw_spin_lock_init(&gc->bgpio_lock);  in bgpio_init()
616 	gc->parent = dev;  in bgpio_init()
617 	gc->label = dev_name(dev);  in bgpio_init()
618 	gc->base = -1;  in bgpio_init()
619 	gc->request = bgpio_request;  in bgpio_init()
620 	gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN);  in bgpio_init()
624 		gc->ngpio = gc->bgpio_bits;  in bgpio_init()
638 	gc->bgpio_data = gc->read_reg(gc->reg_dat);  in bgpio_init()
639 	if (gc->set == bgpio_set_set &&  in bgpio_init()
641 		gc->bgpio_data = gc->read_reg(gc->reg_set);  in bgpio_init()
644 		gc->bgpio_dir_unreadable = true;  in bgpio_init()
649 	if ((gc->reg_dir_out || gc->reg_dir_in) &&  in bgpio_init()
651 		if (gc->reg_dir_out)  in bgpio_init()
652 			gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);  in bgpio_init()
653 		else if (gc->reg_dir_in)  in bgpio_init()
654 			gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);  in bgpio_init()
661 		if (gc->reg_dir_out && gc->reg_dir_in)  in bgpio_init()
662 			gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_init()
684 		return IOMEM_ERR_PTR(-EINVAL);  in bgpio_map()
686 	return devm_ioremap_resource(&pdev->dev, r);  in bgpio_map()
691 	{ .compatible = "brcm,bcm6345-gpio" },
692 	{ .compatible = "wd,mbl-gpio" },
693 	{ .compatible = "ni,169445-nand-gpio" },
703 	if (!of_match_device(bgpio_of_match, &pdev->dev))  in bgpio_parse_dt()
706 	pdata = devm_kzalloc(&pdev->dev, sizeof(struct bgpio_pdata),  in bgpio_parse_dt()
709 		return ERR_PTR(-ENOMEM);  in bgpio_parse_dt()
711 	pdata->base = -1;  in bgpio_parse_dt()
713 	if (of_device_is_big_endian(pdev->dev.of_node))  in bgpio_parse_dt()
716 	if (of_property_read_bool(pdev->dev.of_node, "no-output"))  in bgpio_parse_dt()
731 	struct device *dev = &pdev->dev;  in bgpio_pdev_probe()
750 		flags = pdev->id_entry->driver_data;  in bgpio_pdev_probe()
755 		return -EINVAL;  in bgpio_pdev_probe()
779 	gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);  in bgpio_pdev_probe()
781 		return -ENOMEM;  in bgpio_pdev_probe()
788 		if (pdata->label)  in bgpio_pdev_probe()
789 			gc->label = pdata->label;  in bgpio_pdev_probe()
790 		gc->base = pdata->base;  in bgpio_pdev_probe()
791 		if (pdata->ngpio > 0)  in bgpio_pdev_probe()
792 			gc->ngpio = pdata->ngpio;  in bgpio_pdev_probe()
797 	return devm_gpiochip_add_data(&pdev->dev, gc, NULL);  in bgpio_pdev_probe()
802 		.name		= "basic-mmio-gpio",
805 		.name		= "basic-mmio-gpio-be",
814 		.name = "basic-mmio-gpio",
825 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");