Lines Matching defs:mtr
105 u16 mtr[MAX_SLOTS][MAX_BRANCHES]; /* Memory Technlogy Reg */ member
172 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 8)) argument
173 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 7)) argument
174 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument
175 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 5)) ? 8 : 4) argument
176 #define MTR_DIMM_RANKS(mtr) (((mtr) & (1 << 4)) ? 1 : 0) argument
177 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
179 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
180 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
181 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument
590 int mtr, ans, addrBits, channel; in decode_mtr() local
750 int mtr; in i7300_init_csrows() local