Lines Matching +full:grant +full:- +full:dma
1 // SPDX-License-Identifier: GPL-2.0-only
3 * MOXA ART SoCs DMA Engine support.
11 #include <linux/dma-mapping.h>
28 #include "virt-dma.h"
63 * 101: -1 (Burst=0), -4 (Burst=1)
64 * 110: -2 (Burst=0), -8 (Burst=1)
65 * 111: -4 (Burst=0), -16 (Burst=1)
83 * Request signal select source/destination address for DMA hardware handshake.
85 * The request line number is a property of the DMA controller itself,
86 * e.g. MMC must always request channels where dma_slave_config->slave_id is 5.
88 * 0: No request / Grant signal
89 * 1-15: Request / Grant signal
164 return &chan->dev->device; in chan2dev()
192 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_terminate_all()
194 if (ch->desc) { in moxart_terminate_all()
195 moxart_dma_desc_free(&ch->desc->vd); in moxart_terminate_all()
196 ch->desc = NULL; in moxart_terminate_all()
199 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_terminate_all()
201 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_terminate_all()
203 vchan_get_all_descriptors(&ch->vc, &head); in moxart_terminate_all()
204 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_terminate_all()
205 vchan_dma_desc_free_list(&ch->vc, &head); in moxart_terminate_all()
216 ch->cfg = *cfg; in moxart_slave_config()
218 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_slave_config()
223 switch (ch->cfg.src_addr_width) { in moxart_slave_config()
226 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
233 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
240 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
246 return -EINVAL; in moxart_slave_config()
249 if (ch->cfg.direction == DMA_MEM_TO_DEV) { in moxart_slave_config()
252 ctrl |= (ch->line_reqno << 16 & in moxart_slave_config()
257 ctrl |= (ch->line_reqno << 24 & in moxart_slave_config()
261 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_slave_config()
280 dev_err(chan2dev(chan), "%s: invalid DMA direction\n", in moxart_prep_slave_sg()
286 dev_addr = ch->cfg.src_addr; in moxart_prep_slave_sg()
287 dev_width = ch->cfg.src_addr_width; in moxart_prep_slave_sg()
289 dev_addr = ch->cfg.dst_addr; in moxart_prep_slave_sg()
290 dev_width = ch->cfg.dst_addr_width; in moxart_prep_slave_sg()
313 d->dma_dir = dir; in moxart_prep_slave_sg()
314 d->dev_addr = dev_addr; in moxart_prep_slave_sg()
315 d->es = es; in moxart_prep_slave_sg()
318 d->sg[i].addr = sg_dma_address(sgent); in moxart_prep_slave_sg()
319 d->sg[i].len = sg_dma_len(sgent); in moxart_prep_slave_sg()
322 d->sglen = sg_len; in moxart_prep_slave_sg()
324 ch->error = 0; in moxart_prep_slave_sg()
326 return vchan_tx_prep(&ch->vc, &d->vd, tx_flags); in moxart_prep_slave_sg()
332 struct moxart_dmadev *mdc = ofdma->of_dma_data; in moxart_of_xlate()
336 chan = dma_get_any_slave_channel(&mdc->dma_slave); in moxart_of_xlate()
341 ch->line_reqno = dma_spec->args[0]; in moxart_of_xlate()
351 __func__, ch->ch_num); in moxart_alloc_chan_resources()
352 ch->allocated = 1; in moxart_alloc_chan_resources()
361 vchan_free_chan_resources(&ch->vc); in moxart_free_chan_resources()
364 __func__, ch->ch_num); in moxart_free_chan_resources()
365 ch->allocated = 0; in moxart_free_chan_resources()
371 writel(src_addr, ch->base + REG_OFF_ADDRESS_SOURCE); in moxart_dma_set_params()
372 writel(dst_addr, ch->base + REG_OFF_ADDRESS_DEST); in moxart_dma_set_params()
377 struct moxart_desc *d = ch->desc; in moxart_set_transfer_params()
378 unsigned int sglen_div = es_bytes[d->es]; in moxart_set_transfer_params()
380 d->dma_cycles = len >> sglen_div; in moxart_set_transfer_params()
386 writel(d->dma_cycles, ch->base + REG_OFF_CYCLES); in moxart_set_transfer_params()
388 dev_dbg(chan2dev(&ch->vc.chan), "%s: set %u DMA cycles (len=%u)\n", in moxart_set_transfer_params()
389 __func__, d->dma_cycles, len); in moxart_set_transfer_params()
396 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_start_dma()
398 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_start_dma()
403 struct moxart_desc *d = ch->desc; in moxart_dma_start_sg()
404 struct moxart_sg *sg = ch->desc->sg + idx; in moxart_dma_start_sg()
406 if (ch->desc->dma_dir == DMA_MEM_TO_DEV) in moxart_dma_start_sg()
407 moxart_dma_set_params(ch, sg->addr, d->dev_addr); in moxart_dma_start_sg()
408 else if (ch->desc->dma_dir == DMA_DEV_TO_MEM) in moxart_dma_start_sg()
409 moxart_dma_set_params(ch, d->dev_addr, sg->addr); in moxart_dma_start_sg()
411 moxart_set_transfer_params(ch, sg->len); in moxart_dma_start_sg()
421 vd = vchan_next_desc(&ch->vc); in moxart_dma_start_desc()
424 ch->desc = NULL; in moxart_dma_start_desc()
428 list_del(&vd->node); in moxart_dma_start_desc()
430 ch->desc = to_moxart_dma_desc(&vd->tx); in moxart_dma_start_desc()
431 ch->sgidx = 0; in moxart_dma_start_desc()
441 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_issue_pending()
442 if (vchan_issue_pending(&ch->vc) && !ch->desc) in moxart_issue_pending()
444 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_issue_pending()
453 for (size = i = completed_sgs; i < d->sglen; i++) in moxart_dma_desc_size()
454 size += d->sg[i].len; in moxart_dma_desc_size()
464 size = moxart_dma_desc_size(ch->desc, ch->sgidx); in moxart_dma_desc_size_in_flight()
465 cycles = readl(ch->base + REG_OFF_CYCLES); in moxart_dma_desc_size_in_flight()
466 completed_cycles = (ch->desc->dma_cycles - cycles); in moxart_dma_desc_size_in_flight()
467 size -= completed_cycles << es_bytes[ch->desc->es]; in moxart_dma_desc_size_in_flight()
469 dev_dbg(chan2dev(&ch->vc.chan), "%s: size=%zu\n", __func__, size); in moxart_dma_desc_size_in_flight()
489 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_tx_status()
490 vd = vchan_find_desc(&ch->vc, cookie); in moxart_tx_status()
492 d = to_moxart_dma_desc(&vd->tx); in moxart_tx_status()
493 txstate->residue = moxart_dma_desc_size(d, 0); in moxart_tx_status()
494 } else if (ch->desc && ch->desc->vd.tx.cookie == cookie) { in moxart_tx_status()
495 txstate->residue = moxart_dma_desc_size_in_flight(ch); in moxart_tx_status()
497 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_tx_status()
499 if (ch->error) in moxart_tx_status()
505 static void moxart_dma_init(struct dma_device *dma, struct device *dev) in moxart_dma_init() argument
507 dma->device_prep_slave_sg = moxart_prep_slave_sg; in moxart_dma_init()
508 dma->device_alloc_chan_resources = moxart_alloc_chan_resources; in moxart_dma_init()
509 dma->device_free_chan_resources = moxart_free_chan_resources; in moxart_dma_init()
510 dma->device_issue_pending = moxart_issue_pending; in moxart_dma_init()
511 dma->device_tx_status = moxart_tx_status; in moxart_dma_init()
512 dma->device_config = moxart_slave_config; in moxart_dma_init()
513 dma->device_terminate_all = moxart_terminate_all; in moxart_dma_init()
514 dma->dev = dev; in moxart_dma_init()
516 INIT_LIST_HEAD(&dma->channels); in moxart_dma_init()
522 struct moxart_chan *ch = &mc->slave_chans[0]; in moxart_dma_interrupt()
526 dev_dbg(chan2dev(&ch->vc.chan), "%s\n", __func__); in moxart_dma_interrupt()
529 if (!ch->allocated) in moxart_dma_interrupt()
532 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_dma_interrupt()
534 dev_dbg(chan2dev(&ch->vc.chan), "%s: ch=%p ch->base=%p ctrl=%x\n", in moxart_dma_interrupt()
535 __func__, ch, ch->base, ctrl); in moxart_dma_interrupt()
539 if (ch->desc) { in moxart_dma_interrupt()
540 spin_lock(&ch->vc.lock); in moxart_dma_interrupt()
541 if (++ch->sgidx < ch->desc->sglen) { in moxart_dma_interrupt()
542 moxart_dma_start_sg(ch, ch->sgidx); in moxart_dma_interrupt()
544 vchan_cookie_complete(&ch->desc->vd); in moxart_dma_interrupt()
545 moxart_dma_start_desc(&ch->vc.chan); in moxart_dma_interrupt()
547 spin_unlock(&ch->vc.lock); in moxart_dma_interrupt()
553 ch->error = 1; in moxart_dma_interrupt()
556 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_dma_interrupt()
564 struct device *dev = &pdev->dev; in moxart_probe()
565 struct device_node *node = dev->of_node; in moxart_probe()
574 return -ENOMEM; in moxart_probe()
579 return -EINVAL; in moxart_probe()
586 dma_cap_zero(mdc->dma_slave.cap_mask); in moxart_probe()
587 dma_cap_set(DMA_SLAVE, mdc->dma_slave.cap_mask); in moxart_probe()
588 dma_cap_set(DMA_PRIVATE, mdc->dma_slave.cap_mask); in moxart_probe()
590 moxart_dma_init(&mdc->dma_slave, dev); in moxart_probe()
592 ch = &mdc->slave_chans[0]; in moxart_probe()
594 ch->ch_num = i; in moxart_probe()
595 ch->base = dma_base_addr + i * REG_OFF_CHAN_SIZE; in moxart_probe()
596 ch->allocated = 0; in moxart_probe()
598 ch->vc.desc_free = moxart_dma_desc_free; in moxart_probe()
599 vchan_init(&ch->vc, &mdc->dma_slave); in moxart_probe()
601 dev_dbg(dev, "%s: chs[%d]: ch->ch_num=%u ch->base=%p\n", in moxart_probe()
602 __func__, i, ch->ch_num, ch->base); in moxart_probe()
608 "moxart-dma-engine", mdc); in moxart_probe()
613 mdc->irq = irq; in moxart_probe()
615 ret = dma_async_device_register(&mdc->dma_slave); in moxart_probe()
624 dma_async_device_unregister(&mdc->dma_slave); in moxart_probe()
637 devm_free_irq(&pdev->dev, m->irq, m); in moxart_remove()
639 dma_async_device_unregister(&m->dma_slave); in moxart_remove()
641 if (pdev->dev.of_node) in moxart_remove()
642 of_dma_controller_free(pdev->dev.of_node); in moxart_remove()
648 { .compatible = "moxa,moxart-dma" },
657 .name = "moxart-dma-engine",
675 MODULE_DESCRIPTION("MOXART DMA engine driver");