Lines Matching +full:use +full:- +full:minimum +full:- +full:ecc
1 # SPDX-License-Identifier: GPL-2.0-only
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
48 Use VIA PadLock for SHA1/SHA256 algorithms.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
101 kernel or userspace applications may use these functions.
119 AES cipher algorithms for use with protected key.
121 Select this option if you want to use the paes cipher
122 for example to use protected key encrypted devices.
129 Select this option if you want to use the s390 pseudo random number
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
133 pseudo-random-number device through the char device /dev/prandom.
149 sub-units. One set provides the Modular Arithmetic Unit,
204 Say 'Y' here to use the Freescale Security Engine (SEC)
219 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
228 Say 'Y' here to use the Freescale Security Engine (SEC)
250 This option provides the kernel-side support for the TRNG hardware
258 you want to use the OMAP modules for any of the crypto algorithms.
273 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
287 want to use the OMAP module for AES algorithms.
297 want to use the OMAP module for DES and 3DES algorithms. Currently
319 This driver provides kernel-side support through the
324 module will be called exynos-rng.
349 needed for small and zero-size messages.
373 Select this if you want to use the Atmel modules for
386 Select this if you want to use the Atmel module for
390 will be called atmel-aes.
399 Select this if you want to use the Atmel module for
403 will be called atmel-tdes.
412 Select this if you want to use the Atmel module for
416 will be called atmel-sha.
423 tristate "Support for Microchip / Atmel ECC hw accelerator"
429 Microhip / Atmel ECC hw accelerator.
430 Select this if you want to use the Microchip / Atmel module for
434 will be called atmel-ecc.
444 Select this if you want to use the Microchip / Atmel SHA204A
449 will be called atmel-sha204a.
473 co-processor on the die.
476 will be called mxs-dcp.
528 (default), hashes-only, or skciphers-only.
531 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
535 algorithms, sharing the load with the CPU. Enabling skciphers-only
545 - AES (CBC, CTR, ECB, XTS)
546 - 3DES (CBC, ECB)
547 - DES (CBC, ECB)
548 - SHA1, HMAC-SHA1
549 - SHA256, HMAC-SHA256
552 bool "Symmetric-key ciphers only"
555 Enable symmetric-key ciphers only:
556 - AES (CBC, CTR, ECB, XTS)
557 - 3DES (ECB, CBC)
558 - DES (ECB, CBC)
565 - SHA1, HMAC-SHA1
566 - SHA256, HMAC-SHA256
573 - authenc()
574 - ccm(aes)
575 - rfc4309(ccm(aes))
579 int "Default maximum request size to use software for AES"
588 Considering the 256-bit ciphers, software is 2-3 times faster than
589 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
590 With 128-bit keys, the break-even point would be around 1024-bytes.
593 cost in CPU usage. The minimum recommended setting is 16-bytes
594 (1 AES block), since AES-GCM will fail if you set it lower.
597 Note that 192-bit keys are not supported by the hardware and are
610 module will be called qcom-rng. If unsure, say N.
669 Xilinx ZynqMP has AES-GCM engine used for symmetric key
671 accelerator. Select this if you want to use the ZynqMP module
681 Select this if you want to use the ZynqMP module
722 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
726 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
729 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
742 Enables the driver for the on-chip crypto accelerator
772 Choose this if you wish to use hardware acceleration of
794 used for crypto offload. Select this if you want to use hardware