241 static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch)  in sh_cmt_read_cmstr()  argument
243 	if (ch->iostart)  in sh_cmt_read_cmstr()
244 		return ch->cmt->info->read_control(ch->iostart, 0);  in sh_cmt_read_cmstr()
246 		return ch->cmt->info->read_control(ch->cmt->mapbase, 0);  in sh_cmt_read_cmstr()
249 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmstr()  argument
251 	u32 old_value = sh_cmt_read_cmstr(ch);  in sh_cmt_write_cmstr()
254 		if (ch->iostart) {  in sh_cmt_write_cmstr()
255 			ch->cmt->info->write_control(ch->iostart, 0, value);  in sh_cmt_write_cmstr()
256 			udelay(ch->cmt->reg_delay);  in sh_cmt_write_cmstr()
258 			ch->cmt->info->write_control(ch->cmt->mapbase, 0, value);  in sh_cmt_write_cmstr()
259 			udelay(ch->cmt->reg_delay);  in sh_cmt_write_cmstr()
264 static inline u32 sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)  in sh_cmt_read_cmcsr()  argument
266 	return ch->cmt->info->read_control(ch->ioctrl, CMCSR);  in sh_cmt_read_cmcsr()
269 static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcsr()  argument
271 	u32 old_value = sh_cmt_read_cmcsr(ch);  in sh_cmt_write_cmcsr()
274 		ch->cmt->info->write_control(ch->ioctrl, CMCSR, value);  in sh_cmt_write_cmcsr()
275 		udelay(ch->cmt->reg_delay);  in sh_cmt_write_cmcsr()
279 static inline u32 sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)  in sh_cmt_read_cmcnt()  argument
281 	return ch->cmt->info->read_count(ch->ioctrl, CMCNT);  in sh_cmt_read_cmcnt()
284 static inline int sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcnt()  argument
287 	unsigned int cmcnt_delay = DIV_ROUND_UP(3 * ch->cmt->reg_delay, 2);  in sh_cmt_write_cmcnt()
290 	if (ch->cmt->info->model > SH_CMT_16BIT) {  in sh_cmt_write_cmcnt()
293 						   1, cmcnt_delay, false, ch);  in sh_cmt_write_cmcnt()
298 	ch->cmt->info->write_count(ch->ioctrl, CMCNT, value);  in sh_cmt_write_cmcnt()
303 static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcor()  argument
305 	u32 old_value = ch->cmt->info->read_count(ch->ioctrl, CMCOR);  in sh_cmt_write_cmcor()
308 		ch->cmt->info->write_count(ch->ioctrl, CMCOR, value);  in sh_cmt_write_cmcor()
309 		udelay(ch->cmt->reg_delay);  in sh_cmt_write_cmcor()
313 static u32 sh_cmt_get_counter(struct sh_cmt_channel *ch, u32 *has_wrapped)  in sh_cmt_get_counter()  argument
318 	o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;  in sh_cmt_get_counter()
323 		v1 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
324 		v2 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
325 		v3 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
326 		o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;  in sh_cmt_get_counter()
334 static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start)  in sh_cmt_start_stop_ch()  argument
340 	raw_spin_lock_irqsave(&ch->cmt->lock, flags);  in sh_cmt_start_stop_ch()
341 	value = sh_cmt_read_cmstr(ch);  in sh_cmt_start_stop_ch()
344 		value |= 1 << ch->timer_bit;  in sh_cmt_start_stop_ch()
346 		value &= ~(1 << ch->timer_bit);  in sh_cmt_start_stop_ch()
348 	sh_cmt_write_cmstr(ch, value);  in sh_cmt_start_stop_ch()
349 	raw_spin_unlock_irqrestore(&ch->cmt->lock, flags);  in sh_cmt_start_stop_ch()
352 static int sh_cmt_enable(struct sh_cmt_channel *ch)  in sh_cmt_enable()  argument
356 	dev_pm_syscore_device(&ch->cmt->pdev->dev, true);  in sh_cmt_enable()
359 	ret = clk_enable(ch->cmt->clk);  in sh_cmt_enable()
361 		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n",  in sh_cmt_enable()
362 			ch->index);  in sh_cmt_enable()
367 	sh_cmt_start_stop_ch(ch, 0);  in sh_cmt_enable()
370 	if (ch->cmt->info->width == 16) {  in sh_cmt_enable()
371 		sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE |  in sh_cmt_enable()
374 		u32 cmtout = ch->cmt->info->model <= SH_CMT_48BIT ?  in sh_cmt_enable()
376 		sh_cmt_write_cmcsr(ch, cmtout | SH_CMT32_CMCSR_CMM |  in sh_cmt_enable()
381 	sh_cmt_write_cmcor(ch, 0xffffffff);  in sh_cmt_enable()
382 	ret = sh_cmt_write_cmcnt(ch, 0);  in sh_cmt_enable()
384 	if (ret || sh_cmt_read_cmcnt(ch)) {  in sh_cmt_enable()
385 		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n",  in sh_cmt_enable()
386 			ch->index);  in sh_cmt_enable()
392 	sh_cmt_start_stop_ch(ch, 1);  in sh_cmt_enable()
396 	clk_disable(ch->cmt->clk);  in sh_cmt_enable()
402 static void sh_cmt_disable(struct sh_cmt_channel *ch)  in sh_cmt_disable()  argument
405 	sh_cmt_start_stop_ch(ch, 0);  in sh_cmt_disable()
408 	sh_cmt_write_cmcsr(ch, 0);  in sh_cmt_disable()
411 	clk_disable(ch->cmt->clk);  in sh_cmt_disable()
413 	dev_pm_syscore_device(&ch->cmt->pdev->dev, false);  in sh_cmt_disable()
423 static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch,  in sh_cmt_clock_event_program_verify()  argument
426 	u32 value = ch->next_match_value;  in sh_cmt_clock_event_program_verify()
432 	now = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clock_event_program_verify()
433 	ch->flags |= FLAG_REPROGRAM; /* force reprogram */  in sh_cmt_clock_event_program_verify()
440 		ch->flags |= FLAG_SKIPEVENT;  in sh_cmt_clock_event_program_verify()
452 		if (new_match > ch->max_match_value)  in sh_cmt_clock_event_program_verify()
453 			new_match = ch->max_match_value;  in sh_cmt_clock_event_program_verify()
455 		sh_cmt_write_cmcor(ch, new_match);  in sh_cmt_clock_event_program_verify()
457 		now = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clock_event_program_verify()
458 		if (has_wrapped && (new_match > ch->match_value)) {  in sh_cmt_clock_event_program_verify()
465 			ch->flags |= FLAG_SKIPEVENT;  in sh_cmt_clock_event_program_verify()
476 			ch->match_value = new_match;  in sh_cmt_clock_event_program_verify()
487 			ch->match_value = new_match;  in sh_cmt_clock_event_program_verify()
503 			dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n",  in sh_cmt_clock_event_program_verify()
504 				 ch->index);  in sh_cmt_clock_event_program_verify()
509 static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)  in __sh_cmt_set_next()  argument
511 	if (delta > ch->max_match_value)  in __sh_cmt_set_next()
512 		dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n",  in __sh_cmt_set_next()
513 			 ch->index);  in __sh_cmt_set_next()
515 	ch->next_match_value = delta;  in __sh_cmt_set_next()
516 	sh_cmt_clock_event_program_verify(ch, 0);  in __sh_cmt_set_next()
519 static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)  in sh_cmt_set_next()  argument
523 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_set_next()
524 	__sh_cmt_set_next(ch, delta);  in sh_cmt_set_next()
525 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_set_next()
530 	struct sh_cmt_channel *ch = dev_id;  in sh_cmt_interrupt()  local
534 	sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) &  in sh_cmt_interrupt()
535 			   ch->cmt->info->clear_bits);  in sh_cmt_interrupt()
541 	if (ch->flags & FLAG_CLOCKSOURCE)  in sh_cmt_interrupt()
542 		ch->total_cycles += ch->match_value + 1;  in sh_cmt_interrupt()
544 	if (!(ch->flags & FLAG_REPROGRAM))  in sh_cmt_interrupt()
545 		ch->next_match_value = ch->max_match_value;  in sh_cmt_interrupt()
547 	ch->flags |= FLAG_IRQCONTEXT;  in sh_cmt_interrupt()
549 	if (ch->flags & FLAG_CLOCKEVENT) {  in sh_cmt_interrupt()
550 		if (!(ch->flags & FLAG_SKIPEVENT)) {  in sh_cmt_interrupt()
551 			if (clockevent_state_oneshot(&ch->ced)) {  in sh_cmt_interrupt()
552 				ch->next_match_value = ch->max_match_value;  in sh_cmt_interrupt()
553 				ch->flags |= FLAG_REPROGRAM;  in sh_cmt_interrupt()
556 			ch->ced.event_handler(&ch->ced);  in sh_cmt_interrupt()
560 	ch->flags &= ~FLAG_SKIPEVENT;  in sh_cmt_interrupt()
562 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_interrupt()
564 	if (ch->flags & FLAG_REPROGRAM) {  in sh_cmt_interrupt()
565 		ch->flags &= ~FLAG_REPROGRAM;  in sh_cmt_interrupt()
566 		sh_cmt_clock_event_program_verify(ch, 1);  in sh_cmt_interrupt()
568 		if (ch->flags & FLAG_CLOCKEVENT)  in sh_cmt_interrupt()
569 			if ((clockevent_state_shutdown(&ch->ced))  in sh_cmt_interrupt()
570 			    || (ch->match_value == ch->next_match_value))  in sh_cmt_interrupt()
571 				ch->flags &= ~FLAG_REPROGRAM;  in sh_cmt_interrupt()
574 	ch->flags &= ~FLAG_IRQCONTEXT;  in sh_cmt_interrupt()
576 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_interrupt()
581 static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag)  in sh_cmt_start()  argument
587 		pm_runtime_get_sync(&ch->cmt->pdev->dev);  in sh_cmt_start()
589 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_start()
591 	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) {  in sh_cmt_start()
593 			pm_runtime_get_sync(&ch->cmt->pdev->dev);  in sh_cmt_start()
594 		ret = sh_cmt_enable(ch);  in sh_cmt_start()
599 	ch->flags |= flag;  in sh_cmt_start()
602 	if (ch->cmt->num_channels == 1 &&  in sh_cmt_start()
603 	    flag == FLAG_CLOCKSOURCE && (!(ch->flags & FLAG_CLOCKEVENT)))  in sh_cmt_start()
604 		__sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_start()
606 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_start()
611 static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag)  in sh_cmt_stop()  argument
616 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_stop()
618 	f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE);  in sh_cmt_stop()
619 	ch->flags &= ~flag;  in sh_cmt_stop()
621 	if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) {  in sh_cmt_stop()
622 		sh_cmt_disable(ch);  in sh_cmt_stop()
624 			pm_runtime_put(&ch->cmt->pdev->dev);  in sh_cmt_stop()
628 	if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE))  in sh_cmt_stop()
629 		__sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_stop()
631 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_stop()
634 		pm_runtime_put(&ch->cmt->pdev->dev);  in sh_cmt_stop()
644 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_read()  local
647 	if (ch->cmt->num_channels == 1) {  in sh_cmt_clocksource_read()
652 		raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_clocksource_read()
653 		value = ch->total_cycles;  in sh_cmt_clocksource_read()
654 		raw = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clocksource_read()
657 			raw += ch->match_value + 1;  in sh_cmt_clocksource_read()
658 		raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_clocksource_read()
663 	return sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clocksource_read()
669 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_enable()  local
671 	WARN_ON(ch->cs_enabled);  in sh_cmt_clocksource_enable()
673 	ch->total_cycles = 0;  in sh_cmt_clocksource_enable()
675 	ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_enable()
677 		ch->cs_enabled = true;  in sh_cmt_clocksource_enable()
684 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_disable()  local
686 	WARN_ON(!ch->cs_enabled);  in sh_cmt_clocksource_disable()
688 	sh_cmt_stop(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_disable()
689 	ch->cs_enabled = false;  in sh_cmt_clocksource_disable()
694 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_suspend()  local
696 	if (!ch->cs_enabled)  in sh_cmt_clocksource_suspend()
699 	sh_cmt_stop(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_suspend()
700 	dev_pm_genpd_suspend(&ch->cmt->pdev->dev);  in sh_cmt_clocksource_suspend()
705 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_resume()  local
707 	if (!ch->cs_enabled)  in sh_cmt_clocksource_resume()
710 	dev_pm_genpd_resume(&ch->cmt->pdev->dev);  in sh_cmt_clocksource_resume()
711 	sh_cmt_start(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_resume()
714 static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,  in sh_cmt_register_clocksource()  argument
717 	struct clocksource *cs = &ch->cs;  in sh_cmt_register_clocksource()
726 	cs->mask = CLOCKSOURCE_MASK(ch->cmt->info->width);  in sh_cmt_register_clocksource()
729 	dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n",  in sh_cmt_register_clocksource()
730 		 ch->index);  in sh_cmt_register_clocksource()
732 	clocksource_register_hz(cs, ch->cmt->rate);  in sh_cmt_register_clocksource()
741 static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic)  in sh_cmt_clock_event_start()  argument
743 	sh_cmt_start(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_start()
746 		sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1);  in sh_cmt_clock_event_start()
748 		sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_clock_event_start()
753 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_shutdown()  local
755 	sh_cmt_stop(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_shutdown()
762 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_set_state()  local
766 		sh_cmt_stop(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_set_state()
768 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for %s clock events\n",  in sh_cmt_clock_event_set_state()
769 		 ch->index, periodic ? "periodic" : "oneshot");  in sh_cmt_clock_event_set_state()
770 	sh_cmt_clock_event_start(ch, periodic);  in sh_cmt_clock_event_set_state()
787 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_next()  local
792 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_clock_event_next()
794 	if (likely(ch->flags & FLAG_IRQCONTEXT))  in sh_cmt_clock_event_next()
795 		ch->next_match_value = delta - 1;  in sh_cmt_clock_event_next()
797 		__sh_cmt_set_next(ch, delta - 1);  in sh_cmt_clock_event_next()
799 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_clock_event_next()
806 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_suspend()  local
808 	dev_pm_genpd_suspend(&ch->cmt->pdev->dev);  in sh_cmt_clock_event_suspend()
809 	clk_unprepare(ch->cmt->clk);  in sh_cmt_clock_event_suspend()
814 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_resume()  local
816 	clk_prepare(ch->cmt->clk);  in sh_cmt_clock_event_resume()
817 	dev_pm_genpd_resume(&ch->cmt->pdev->dev);  in sh_cmt_clock_event_resume()
820 static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch,  in sh_cmt_register_clockevent()  argument
823 	struct clock_event_device *ced = &ch->ced;  in sh_cmt_register_clockevent()
827 	irq = platform_get_irq(ch->cmt->pdev, ch->index);  in sh_cmt_register_clockevent()
833 			  dev_name(&ch->cmt->pdev->dev), ch);  in sh_cmt_register_clockevent()
835 		dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n",  in sh_cmt_register_clockevent()
836 			ch->index, irq);  in sh_cmt_register_clockevent()
854 	ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift);  in sh_cmt_register_clockevent()
855 	ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);  in sh_cmt_register_clockevent()
856 	ced->max_delta_ticks = ch->max_match_value;  in sh_cmt_register_clockevent()
860 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",  in sh_cmt_register_clockevent()
861 		 ch->index);  in sh_cmt_register_clockevent()
867 static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,  in sh_cmt_register()  argument
873 		ch->cmt->has_clockevent = true;  in sh_cmt_register()
874 		ret = sh_cmt_register_clockevent(ch, name);  in sh_cmt_register()
880 		ch->cmt->has_clocksource = true;  in sh_cmt_register()
881 		sh_cmt_register_clocksource(ch, name);  in sh_cmt_register()
887 static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,  in sh_cmt_setup_channel()  argument
898 	ch->cmt = cmt;  in sh_cmt_setup_channel()
899 	ch->index = index;  in sh_cmt_setup_channel()
900 	ch->hwidx = hwidx;  in sh_cmt_setup_channel()
901 	ch->timer_bit = hwidx;  in sh_cmt_setup_channel()
910 		ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6;  in sh_cmt_setup_channel()
914 		ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;  in sh_cmt_setup_channel()
918 		ch->iostart = cmt->mapbase + ch->hwidx * 0x100;  in sh_cmt_setup_channel()
919 		ch->ioctrl = ch->iostart + 0x10;  in sh_cmt_setup_channel()
920 		ch->timer_bit = 0;  in sh_cmt_setup_channel()
929 	if (cmt->info->width == (sizeof(ch->max_match_value) * 8))  in sh_cmt_setup_channel()
930 		ch->max_match_value = ~0;  in sh_cmt_setup_channel()
932 		ch->max_match_value = (1 << cmt->info->width) - 1;  in sh_cmt_setup_channel()
934 	ch->match_value = ch->max_match_value;  in sh_cmt_setup_channel()
935 	raw_spin_lock_init(&ch->lock);  in sh_cmt_setup_channel()
937 	ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),  in sh_cmt_setup_channel()
940 		dev_err(&cmt->pdev->dev, "ch%u: registration failed\n",  in sh_cmt_setup_channel()
941 			ch->index);  in sh_cmt_setup_channel()
944 	ch->cs_enabled = false;  in sh_cmt_setup_channel()