clk/spear/spear1340_clock.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  * arch/arm/mach-spear13xx/spear1340_clock.c
167 	{.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */
175 /* vco-pll4 rate configuration table, in ascending order of rates */
179 	{.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */
190 	{.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
202  * 250, 332, 400 or 500 MHz considering different possibilites of input
205  * --------------------------------------------------------------------
207  * --------------------------------------------------------------------
208  * 400			200		100			0x04000
209  * 400			250		125			0x03333
210  * 400			332		166			0x0268D
211  * 400			400		200			0x02000
212  * --------------------------------------------------------------------
216  * 500			400		200			0x02800
218  * --------------------------------------------------------------------
222  * 600			400		200			0x03000
224  * --------------------------------------------------------------------
228  * 664			400		200			0x0351E
230  * --------------------------------------------------------------------
234  * 800			400		200			0x04000
236  * --------------------------------------------------------------------
460 	clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,  in spear1340_clk_init()
466 	/* vco-pll */  in spear1340_clk_init()
877 	clk_register_clkdev(clk, NULL, "b2400000.i2s-play");  in spear1340_clk_init()
882 	clk_register_clkdev(clk, NULL, "b2000000.i2s-rec");  in spear1340_clk_init()
927 	clk_register_clkdev(clk, NULL, "mali");  in spear1340_clk_init()
949 	clk_register_clkdev(clk, NULL, "d0000000.spdif-out");  in spear1340_clk_init()
961 	clk_register_clkdev(clk, NULL, "d0100000.spdif-in");  in spear1340_clk_init()