Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson-G12A Clock Controller Driver
13 #include <linux/clk-provider.h>
20 #include "clk-mpll.h"
21 #include "clk-pll.h"
22 #include "clk-regmap.h"
23 #include "clk-cpu-dyndiv.h"
24 #include "vid-pll-div.h"
25 #include "meson-eeclk.h"
28 #include <dt-bindings/clock/g12a-clkc.h>
33 .data = &(struct meson_clk_pll_data){
36 .shift = 28,
41 .shift = 0,
46 .shift = 10,
51 .shift = 0,
56 .shift = 31,
61 .shift = 29,
76 .data = &(struct clk_regmap_div_data){
78 .shift = 16,
102 .data = &(struct meson_clk_pll_data){
105 .shift = 28,
110 .shift = 0,
115 .shift = 10,
120 .shift = 31,
125 .shift = 29,
143 .data = &(struct clk_regmap_div_data){
145 .shift = 16,
161 .data = &(struct meson_clk_pll_data){
164 .shift = 28,
169 .shift = 0,
174 .shift = 10,
179 .shift = 31,
184 .shift = 29,
202 .data = &(struct clk_regmap_div_data){
204 .shift = 16,
220 .data = &(struct clk_regmap_gate_data){
237 .data = &(struct clk_regmap_gate_data){
293 .data = &(struct clk_regmap_gate_data){
311 * b) CCF has a clock hand-off mechanism to make the sure the
330 .data = &(struct clk_regmap_gate_data){
347 * b) CCF has a clock hand-off mechanism to make the sure the
356 .data = &(struct clk_regmap_mux_data){
359 .shift = 0,
377 .data = &(struct clk_regmap_mux_data){
380 .shift = 16,
391 /* This sub-tree is used a parking clock */
398 .data = &(struct meson_clk_cpu_dyndiv_data){
401 .shift = 4,
406 .shift = 26,
423 .data = &(struct clk_regmap_mux_data){
426 .shift = 2,
443 .data = &(struct clk_regmap_div_data){
445 .shift = 20,
460 .data = &(struct clk_regmap_mux_data){
463 .shift = 18,
473 /* This sub-tree is used a parking clock */
480 .data = &(struct clk_regmap_mux_data){
483 .shift = 10,
500 .data = &(struct clk_regmap_mux_data){
503 .shift = 11,
520 .data = &(struct clk_regmap_mux_data){
523 .shift = 11,
540 .data = &(struct clk_regmap_mux_data){
543 .shift = 0,
561 .data = &(struct meson_clk_cpu_dyndiv_data){
564 .shift = 4,
569 .shift = 26,
586 .data = &(struct clk_regmap_mux_data){
589 .shift = 2,
606 .data = &(struct clk_regmap_mux_data){
609 .shift = 16,
620 /* This sub-tree is used a parking clock */
627 .data = &(struct clk_regmap_div_data){
629 .shift = 20,
644 .data = &(struct clk_regmap_mux_data){
647 .shift = 18,
657 /* This sub-tree is used a parking clock */
664 .data = &(struct clk_regmap_mux_data){
667 .shift = 10,
684 .data = &(struct clk_regmap_mux_data){
687 .shift = 11,
706 .data = &(struct clk_regmap_mux_data){
709 .shift = 0,
726 .data = &(struct clk_regmap_mux_data){
729 .shift = 16,
746 .data = &(struct clk_regmap_div_data){
748 .shift = 4,
763 .data = &(struct clk_regmap_mux_data){
766 .shift = 2,
781 .data = &(struct clk_regmap_div_data){
783 .shift = 20,
798 .data = &(struct clk_regmap_mux_data){
801 .shift = 18,
816 .data = &(struct clk_regmap_mux_data){
819 .shift = 10,
834 .data = &(struct clk_regmap_mux_data){
837 .shift = 11,
852 .data = &(struct clk_regmap_mux_data){
855 .shift = 24,
870 .data = &(struct clk_regmap_mux_data){
873 .shift = 25,
888 .data = &(struct clk_regmap_mux_data){
891 .shift = 26,
906 .data = &(struct clk_regmap_mux_data){
909 .shift = 27,
923 unsigned long event, void *data) in g12a_cpu_clk_mux_notifier_cb() argument
948 unsigned long event, void *data) in g12a_cpu_clk_postmux_notifier_cb() argument
959 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
960 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
961 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
962 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
963 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
965 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
966 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
970 clk_hw_set_parent(nb_data->cpu_clk_premux1, in g12a_cpu_clk_postmux_notifier_cb()
971 nb_data->xtal); in g12a_cpu_clk_postmux_notifier_cb()
974 clk_hw_set_parent(nb_data->cpu_clk_postmux1, in g12a_cpu_clk_postmux_notifier_cb()
975 nb_data->cpu_clk_premux1); in g12a_cpu_clk_postmux_notifier_cb()
978 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
979 nb_data->cpu_clk_postmux1); in g12a_cpu_clk_postmux_notifier_cb()
984 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
985 * \- cpu_clk_postmux1 in g12a_cpu_clk_postmux_notifier_cb()
986 * \- cpu_clk_premux1 in g12a_cpu_clk_postmux_notifier_cb()
987 * \- xtal in g12a_cpu_clk_postmux_notifier_cb()
1002 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
1003 nb_data->cpu_clk_postmux0); in g12a_cpu_clk_postmux_notifier_cb()
1008 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
1009 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
1010 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
1011 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1012 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1014 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1015 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1051 unsigned long event, void *data) in g12a_sys_pll_notifier_cb() argument
1062 * \- sys_pll in g12a_sys_pll_notifier_cb()
1063 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1067 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1068 nb_data->cpu_clk_dyn); in g12a_sys_pll_notifier_cb()
1073 * \- cpu_clk_dyn in g12a_sys_pll_notifier_cb()
1074 * \- cpu_clk_dynX in g12a_sys_pll_notifier_cb()
1075 * \- cpu_clk_dynX_sel in g12a_sys_pll_notifier_cb()
1076 * \- cpu_clk_dynX_div in g12a_sys_pll_notifier_cb()
1077 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1078 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1092 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1093 nb_data->sys_pll); in g12a_sys_pll_notifier_cb()
1099 * \- sys_pll in g12a_sys_pll_notifier_cb()
1100 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1134 .data = &(struct clk_regmap_gate_data){
1153 .data = &(struct clk_regmap_gate_data){
1198 .data = &(struct clk_regmap_div_data){
1200 .shift = 3,
1213 .data = &(struct clk_regmap_gate_data){
1232 .data = &(struct clk_regmap_div_data){
1234 .shift = 6,
1247 .data = &(struct clk_regmap_gate_data){
1266 .data = &(struct clk_regmap_div_data){
1268 .shift = 9,
1281 .data = &(struct clk_regmap_gate_data){
1300 .data = &(struct clk_regmap_div_data){
1302 .shift = 20,
1318 .index = -1,
1325 .data = &(struct clk_regmap_gate_data){
1436 .data = &(struct clk_regmap_mux_data){
1439 .shift = 3,
1459 .data = &(struct clk_regmap_gate_data){
1479 .data = &(struct clk_regmap_mux_data){
1482 .shift = 6,
1502 .data = &(struct clk_regmap_gate_data){
1522 .data = &(struct clk_regmap_mux_data){
1525 .shift = 9,
1545 .data = &(struct clk_regmap_gate_data){
1565 .data = &(struct clk_regmap_mux_data){
1568 .shift = 20,
1588 .data = &(struct clk_regmap_gate_data){
1625 .data = &(struct meson_clk_pll_data){
1628 .shift = 28,
1633 .shift = 0,
1638 .shift = 10,
1643 .shift = 0,
1648 .shift = 31,
1653 .shift = 29,
1671 .data = &(struct clk_regmap_div_data){
1673 .shift = 16,
1690 .data = &(struct meson_clk_pll_data){
1693 .shift = 28,
1698 .shift = 0,
1703 .shift = 10,
1708 .shift = 0,
1713 .shift = 31,
1718 .shift = 29,
1735 .data = &(struct clk_regmap_div_data){
1737 .shift = 16,
1765 .data = &(struct meson_clk_pll_data){
1768 .shift = 28,
1773 .shift = 0,
1778 .shift = 10,
1783 .shift = 0,
1788 .shift = 31,
1793 .shift = 29,
1812 .data = &(struct clk_regmap_div_data){
1814 .shift = 16,
1857 .data = &(struct meson_clk_pll_data){
1860 .shift = 28,
1865 .shift = 0,
1870 .shift = 10,
1875 .shift = 0,
1880 .shift = 31,
1885 .shift = 29,
1917 .data = &(struct clk_regmap_div_data){
1919 .shift = 16,
1951 .data = &(struct meson_clk_pll_data){
1954 .shift = 28,
1959 .shift = 0,
1964 .shift = 10,
1969 .shift = 0,
1974 .shift = 30,
1979 .shift = 29,
1999 .data = &(struct clk_regmap_div_data){
2001 .shift = 16,
2017 .data = &(struct clk_regmap_div_data){
2019 .shift = 18,
2035 .data = &(struct clk_regmap_div_data){
2037 .shift = 20,
2064 .data = &(struct clk_regmap_gate_data){
2090 .data = &(struct clk_regmap_gate_data){
2116 .data = &(struct clk_regmap_gate_data){
2144 .data = &(struct clk_regmap_gate_data){
2172 .data = &(struct clk_regmap_mux_data){
2175 .shift = 5,
2206 .data = &(struct meson_clk_mpll_data){
2209 .shift = 0,
2214 .shift = 30,
2219 .shift = 20,
2224 .shift = 29,
2242 .data = &(struct clk_regmap_gate_data){
2260 .data = &(struct meson_clk_mpll_data){
2263 .shift = 0,
2268 .shift = 30,
2273 .shift = 20,
2278 .shift = 29,
2296 .data = &(struct clk_regmap_gate_data){
2314 .data = &(struct meson_clk_mpll_data){
2317 .shift = 0,
2322 .shift = 30,
2327 .shift = 20,
2332 .shift = 29,
2350 .data = &(struct clk_regmap_gate_data){
2368 .data = &(struct meson_clk_mpll_data){
2371 .shift = 0,
2376 .shift = 30,
2381 .shift = 20,
2386 .shift = 29,
2404 .data = &(struct clk_regmap_gate_data){
2429 .data = &(struct clk_regmap_mux_data){
2432 .shift = 12,
2444 .data = &(struct clk_regmap_div_data){
2446 .shift = 0,
2461 .data = &(struct clk_regmap_gate_data){
2492 .data = &(struct clk_regmap_mux_data){
2495 .shift = 9,
2507 .data = &(struct clk_regmap_div_data){
2509 .shift = 0,
2524 .data = &(struct clk_regmap_gate_data){
2541 .data = &(struct clk_regmap_mux_data){
2544 .shift = 25,
2556 .data = &(struct clk_regmap_div_data){
2558 .shift = 16,
2573 .data = &(struct clk_regmap_gate_data){
2590 .data = &(struct clk_regmap_mux_data){
2593 .shift = 9,
2605 .data = &(struct clk_regmap_div_data){
2607 .shift = 0,
2622 .data = &(struct clk_regmap_gate_data){
2640 .data = &(struct meson_vid_pll_div_data){
2643 .shift = 0,
2648 .shift = 16,
2667 .data = &(struct clk_regmap_mux_data){
2670 .shift = 18,
2686 .data = &(struct clk_regmap_gate_data){
2715 .data = &(struct clk_regmap_mux_data){
2718 .shift = 9,
2730 .data = &(struct clk_regmap_div_data){
2732 .shift = 0,
2745 .data = &(struct clk_regmap_gate_data){
2759 .data = &(struct clk_regmap_mux_data){
2762 .shift = 25,
2774 .data = &(struct clk_regmap_div_data){
2776 .shift = 16,
2789 .data = &(struct clk_regmap_gate_data){
2803 .data = &(struct clk_regmap_mux_data){
2806 .shift = 31,
2837 .data = &(struct clk_regmap_mux_data){
2840 .shift = 9,
2853 .data = &(struct clk_regmap_div_data){
2855 .shift = 0,
2871 .data = &(struct clk_regmap_gate_data){
2887 .data = &(struct clk_regmap_mux_data){
2890 .shift = 9,
2903 .data = &(struct clk_regmap_div_data){
2905 .shift = 0,
2921 .data = &(struct clk_regmap_gate_data){
2937 .data = &(struct clk_regmap_mux_data){
2940 .shift = 25,
2953 .data = &(struct clk_regmap_div_data){
2955 .shift = 16,
2971 .data = &(struct clk_regmap_gate_data){
3000 .data = &(struct clk_regmap_mux_data){
3003 .shift = 9,
3015 .data = &(struct clk_regmap_div_data){
3017 .shift = 0,
3032 .data = &(struct clk_regmap_gate_data){
3048 .data = &(struct clk_regmap_mux_data){
3051 .shift = 25,
3063 .data = &(struct clk_regmap_div_data){
3065 .shift = 16,
3080 .data = &(struct clk_regmap_gate_data){
3096 .data = &(struct clk_regmap_mux_data){
3099 .shift = 31,
3118 .data = &(struct clk_regmap_gate_data){
3143 .data = &(struct clk_regmap_mux_data){
3146 .shift = 16,
3158 .data = &(struct clk_regmap_mux_data){
3161 .shift = 16,
3173 .data = &(struct clk_regmap_gate_data){
3187 .data = &(struct clk_regmap_gate_data){
3201 .data = &(struct clk_regmap_div_data){
3203 .shift = 0,
3218 .data = &(struct clk_regmap_div_data){
3220 .shift = 0,
3235 .data = &(struct clk_regmap_gate_data){
3249 .data = &(struct clk_regmap_gate_data){
3263 .data = &(struct clk_regmap_gate_data){
3277 .data = &(struct clk_regmap_gate_data){
3291 .data = &(struct clk_regmap_gate_data){
3305 .data = &(struct clk_regmap_gate_data){
3319 .data = &(struct clk_regmap_gate_data){
3333 .data = &(struct clk_regmap_gate_data){
3347 .data = &(struct clk_regmap_gate_data){
3361 .data = &(struct clk_regmap_gate_data){
3375 .data = &(struct clk_regmap_gate_data){
3389 .data = &(struct clk_regmap_gate_data){
3521 .data = &(struct clk_regmap_mux_data){
3524 .shift = 28,
3537 .data = &(struct clk_regmap_mux_data){
3540 .shift = 20,
3553 .data = &(struct clk_regmap_mux_data){
3556 .shift = 28,
3584 .data = &(struct clk_regmap_mux_data){
3587 .shift = 16,
3600 .data = &(struct clk_regmap_gate_data){
3616 .data = &(struct clk_regmap_gate_data){
3632 .data = &(struct clk_regmap_gate_data){
3648 .data = &(struct clk_regmap_gate_data){
3677 .data = &(struct clk_regmap_mux_data){
3680 .shift = 12,
3693 .data = &(struct clk_regmap_div_data){
3695 .shift = 0,
3710 .data = &(struct clk_regmap_gate_data){
3735 .data = &(struct clk_regmap_mux_data){
3738 .shift = 9,
3751 .data = &(struct clk_regmap_div_data){
3753 .shift = 0,
3766 .data = &(struct clk_regmap_gate_data){
3781 * muxed by a glitch-free switch. The CCF can manage this glitch-free
3782 * mux because it does top-to-bottom updates the each clock tree and
3797 .data = &(struct clk_regmap_mux_data){
3800 .shift = 9,
3818 .data = &(struct clk_regmap_div_data){
3820 .shift = 0,
3835 .data = &(struct clk_regmap_gate_data){
3851 .data = &(struct clk_regmap_mux_data){
3854 .shift = 25,
3872 .data = &(struct clk_regmap_div_data){
3874 .shift = 16,
3889 .data = &(struct clk_regmap_gate_data){
3910 .data = &(struct clk_regmap_mux_data){
3913 .shift = 31,
3925 .data = &(struct clk_regmap_div_data){
3927 .shift = 0,
3941 .data = &(struct clk_regmap_gate_data){
3967 .data = &(struct clk_regmap_mux_data){
3970 .shift = 7,
3981 .data = &(struct clk_regmap_div_data){
3983 .shift = 0,
3998 .data = &(struct clk_regmap_gate_data){
4014 .data = &(struct clk_regmap_mux_data){
4017 .shift = 23,
4028 .data = &(struct clk_regmap_div_data){
4030 .shift = 16,
4045 .data = &(struct clk_regmap_gate_data){
4074 .data = &(struct clk_regmap_mux_data){
4077 .shift = 9,
4088 .data = &(struct clk_regmap_div_data){
4090 .shift = 0,
4105 .data = &(struct clk_regmap_gate_data){
4121 .data = &(struct clk_regmap_mux_data){
4124 .shift = 25,
4135 .data = &(struct clk_regmap_div_data){
4137 .shift = 16,
4152 .data = &(struct clk_regmap_gate_data){
5268 struct device *dev = &pdev->dev; in meson_g12b_dvfs_setup()
5345 struct device *dev = &pdev->dev; in meson_g12a_dvfs_setup()
5385 eeclkc_data = of_device_get_match_data(&pdev->dev); in meson_g12a_probe()
5387 return -EINVAL; in meson_g12a_probe()
5396 if (g12a_data->dvfs_setup) in meson_g12a_probe()
5397 return g12a_data->dvfs_setup(pdev); in meson_g12a_probe()
5442 .compatible = "amlogic,g12a-clkc",
5443 .data = &g12a_clkc_data.eeclkc_data
5446 .compatible = "amlogic,g12b-clkc",
5447 .data = &g12b_clkc_data.eeclkc_data
5450 .compatible = "amlogic,sm1-clkc",
5451 .data = &sm1_clkc_data.eeclkc_data
5460 .name = "g12a-clkc",