Lines Matching refs:AXG_AO_GATE
46 #define AXG_AO_GATE(_name, _reg, _bit) \ macro
63 AXG_AO_GATE(ahb, AO_CLK_GATE0, 0);
64 AXG_AO_GATE(ir_in, AO_CLK_GATE0, 1);
65 AXG_AO_GATE(i2c_m0, AO_CLK_GATE0, 2);
66 AXG_AO_GATE(i2c_s0, AO_CLK_GATE0, 3);
67 AXG_AO_GATE(uart, AO_CLK_GATE0, 4);
68 AXG_AO_GATE(prod_i2c, AO_CLK_GATE0, 5);
69 AXG_AO_GATE(uart2, AO_CLK_GATE0, 6);
70 AXG_AO_GATE(ir_out, AO_CLK_GATE0, 7);
71 AXG_AO_GATE(saradc, AO_CLK_GATE0, 8);
72 AXG_AO_GATE(mailbox, AO_CLK_GATE0_SP, 0);
73 AXG_AO_GATE(m3, AO_CLK_GATE0_SP, 1);
74 AXG_AO_GATE(ahb_sram, AO_CLK_GATE0_SP, 2);
75 AXG_AO_GATE(rti, AO_CLK_GATE0_SP, 3);
76 AXG_AO_GATE(m4_fclk, AO_CLK_GATE0_SP, 4);
77 AXG_AO_GATE(m4_hclk, AO_CLK_GATE0_SP, 5);