Lines Matching refs:RCC_APB1ENSETR
40 #define RCC_APB1ENSETR 0xA00 macro
1532 K_GATE(G_MDIO, RCC_APB1ENSETR, 31, 0),
1533 K_MGATE(G_DAC12, RCC_APB1ENSETR, 29, 0),
1534 K_MGATE(G_CEC, RCC_APB1ENSETR, 27, 0),
1535 K_MGATE(G_SPDIF, RCC_APB1ENSETR, 26, 0),
1536 K_MGATE(G_I2C5, RCC_APB1ENSETR, 24, 0),
1537 K_MGATE(G_I2C3, RCC_APB1ENSETR, 23, 0),
1538 K_MGATE(G_I2C2, RCC_APB1ENSETR, 22, 0),
1539 K_MGATE(G_I2C1, RCC_APB1ENSETR, 21, 0),
1540 K_MGATE(G_UART8, RCC_APB1ENSETR, 19, 0),
1541 K_MGATE(G_UART7, RCC_APB1ENSETR, 18, 0),
1542 K_MGATE(G_UART5, RCC_APB1ENSETR, 17, 0),
1543 K_MGATE(G_UART4, RCC_APB1ENSETR, 16, 0),
1544 K_MGATE(G_USART3, RCC_APB1ENSETR, 15, 0),
1545 K_MGATE(G_USART2, RCC_APB1ENSETR, 14, 0),
1546 K_MGATE(G_SPI3, RCC_APB1ENSETR, 12, 0),
1547 K_MGATE(G_SPI2, RCC_APB1ENSETR, 11, 0),
1548 K_MGATE(G_LPTIM1, RCC_APB1ENSETR, 9, 0),
1549 K_GATE(G_TIM14, RCC_APB1ENSETR, 8, 0),
1550 K_GATE(G_TIM13, RCC_APB1ENSETR, 7, 0),
1551 K_GATE(G_TIM12, RCC_APB1ENSETR, 6, 0),
1552 K_GATE(G_TIM7, RCC_APB1ENSETR, 5, 0),
1553 K_GATE(G_TIM6, RCC_APB1ENSETR, 4, 0),
1554 K_GATE(G_TIM5, RCC_APB1ENSETR, 3, 0),
1555 K_GATE(G_TIM4, RCC_APB1ENSETR, 2, 0),
1556 K_GATE(G_TIM3, RCC_APB1ENSETR, 1, 0),
1557 K_GATE(G_TIM2, RCC_APB1ENSETR, 0, 0),
1867 STM32_TIM(TIM2_K, "tim2_k", "ck1_tim", RCC_APB1ENSETR, 0),
1868 STM32_TIM(TIM3_K, "tim3_k", "ck1_tim", RCC_APB1ENSETR, 1),
1869 STM32_TIM(TIM4_K, "tim4_k", "ck1_tim", RCC_APB1ENSETR, 2),
1870 STM32_TIM(TIM5_K, "tim5_k", "ck1_tim", RCC_APB1ENSETR, 3),
1871 STM32_TIM(TIM6_K, "tim6_k", "ck1_tim", RCC_APB1ENSETR, 4),
1872 STM32_TIM(TIM7_K, "tim7_k", "ck1_tim", RCC_APB1ENSETR, 5),
1873 STM32_TIM(TIM12_K, "tim12_k", "ck1_tim", RCC_APB1ENSETR, 6),
1874 STM32_TIM(TIM13_K, "tim13_k", "ck1_tim", RCC_APB1ENSETR, 7),
1875 STM32_TIM(TIM14_K, "tim14_k", "ck1_tim", RCC_APB1ENSETR, 8),